Using Testbenches in Quartus with Questa Intel FPGA edition

How to use a testbench to verify your design in Quartus Prime using the Intel FPGA edition software.

[@alsn0]

Amazing channel

[@nigelberrie428]

Again an excellent, practical run-through, again very useful. Thank you for your excellent videos.

[@IgorChudakov]

I hought Questa is a new kind of simulation 🙂 Kind of native like Vivado has. Looks like it is the old modelsim with some easy way to control the simulation instead of using TCL. Not exactly what I expected, but this is ok.
Thanks for the video

[@ninjaiceflame]

Epic

[@benjaminharkinezhad5791]

Is there a guide or manual for the commands you used in the TCL and wave.do files?

[@Aligreta]

Hi!
In my case, i see no change on reg variables... All remains x