New Tools, New Possibilities - 3D Printing for Lab-on-a-Chip | Greg Nordin | TEDxBYU

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  • เผยแพร่เมื่อ 25 พ.ย. 2024

ความคิดเห็น • 21

  • @tanveersingh8290
    @tanveersingh8290 4 ปีที่แล้ว +6

    Just some mind bending stuff this video deserves more views.

  • @Top10MusicLists
    @Top10MusicLists 6 ปีที่แล้ว +4

    This is incredible. Can't believe what these guys were able to do.

  • @emmanueloluga9770
    @emmanueloluga9770 2 ปีที่แล้ว

    The future can truly be revolutionized.

  • @jonabirdd
    @jonabirdd 5 ปีที่แล้ว +2

    A printer on a desk used to make a lab on a chip. Pure awesome.

  • @mechadense
    @mechadense 2 ปีที่แล้ว

    8:06 Hua Gong "intimately involved in making the printer"

  • @gregbrown5554
    @gregbrown5554 6 ปีที่แล้ว

    I've been pondering this type of technology for many years.

  • @darthvader5300
    @darthvader5300 5 ปีที่แล้ว +2

    Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope!
    In the early 1980s CMOS being explained in this way is different to what we personally got from a Japanese engineer who said "basically CMOS is more like a layering process but you must first determine what you need so that you will know exactly what is needed to be done first" It is like creating a multi-layered cake.
    That is the problem with education today, they try to make things unnecessarily complicated and sophisticated when they can make their explanation so simple WITHOUT LOSING THE GIST OF THE ENTIRE SUBJECT itself.
    This is why Japanese education is far more effective to the point that they made CMOS technology so simple that it allowed them to use simple designs, larger size components, and compensate by using larger size silicon chips the size of small average letters.
    They did that in the early 1980s which is why they have beaten the U.S IC chip makers in the international market competition. Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips.
    Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope!
    Now with maskless ion beam lithography and electron beam lithography and hybrid ion beam-electron beam lithography using laser guided guidance systems for positioning and alignment, they have made CMOS far effective in cost effectiveness and achive zero defects/zeo rejects status.

  • @ProfessorRainman
    @ProfessorRainman 5 ปีที่แล้ว +2

    This is Nobel Prize worthy for sure

  • @mechadense
    @mechadense 3 ปีที่แล้ว

    12:20 OpenSCAD FTW :)

  • @hadisvakili9186
    @hadisvakili9186 5 ปีที่แล้ว

    Fantastic

  • @Eors
    @Eors 6 ปีที่แล้ว

    Technology makes life better'

  • @PacoOtis
    @PacoOtis 5 ปีที่แล้ว

    Wow!

    • @darthvader5300
      @darthvader5300 5 ปีที่แล้ว +1

      Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope!
      In the early 1980s CMOS being explained in this way is different to what we personally got from a Japanese engineer who said "basically CMOS is more like a layering process but you must first determine what you need so that you will know exactly what is needed to be done first" It is like creating a multi-layered cake.
      That is the problem with education today, they try to make things unnecessarily complicated and sophisticated when they can make their explanation so simple WITHOUT LOSING THE GIST OF THE ENTIRE SUBJECT itself.
      This is why Japanese education is far more effective to the point that they made CMOS technology so simple that it allowed them to use simple designs, larger size components, and compensate by using larger size silicon chips the size of small average letters.
      They did that in the early 1980s which is why they have beaten the U.S IC chip makers in the international market competition. Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips.
      Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope!
      Now with maskless ion beam lithography and electron beam lithography and hybrid ion beam-electron beam lithography using laser guided guidance systems for positioning and alignment, they have made CMOS far effective in cost effectiveness and achive zero defects/zeo rejects status.

  • @badallmann
    @badallmann 4 ปีที่แล้ว

    crispr-on-a-chip

  • @jonkelly5562
    @jonkelly5562 3 ปีที่แล้ว

    This is what Thermos was supposed to be.

  • @Cacti_hipster
    @Cacti_hipster 4 ปีที่แล้ว

    How long until they are 3D printing human scale full cardiovascular systems, growing organs, and simulating human-like consciousness through machine learning all tied together with skin like sensors calibrated for prosthetics? Cylons anyone?
    Edit: Sidebar, I am not an expert in any of these areas just a 20 year old with some curiosity

  • @Sweloe
    @Sweloe 6 ปีที่แล้ว +5

    I'm thinking of other applications to become rich.

  • @SynthToshi
    @SynthToshi 6 ปีที่แล้ว

    cryptodaddys could use this....

  • @sharadkumarsingh8972
    @sharadkumarsingh8972 4 ปีที่แล้ว

    12 Comments on a 12K views video