Alright Akhil, The mentioned value of resistance in technology LEF or in .tf is the typical resistance value for each metal layers. But yes there is variations in resistance in different RC corners.
Hi Akhil, Masterslice layer is typically poly layers and only needed if the Macro has pins on Poly layer. If masterslice layer is defined , one cut layer must be defined between masterslice layer and first routing layer.
Hi Arun, As per the LEF reference manual FOREIGN foreignCellName [pt [orient]] Specifies the foreign (GDSII) structure name to use when placing an instance of the macro. The optional pt coordinate specifies the macro origin (lower left corner when the macro is in north orientation) offset from the foreign origin. The FOREIGN statement has a default offset value of 0 0, if pt is not specified. The optional orient value specifies the orientation of the foreign cell when the macro is in north orientation. The default orient value is N (North).
Very useful sir your shared information, Thanks for sharing your Knowledge with us
Thanks @Radhika!
Keep supporting...
Hii Uthkarsh dse topics are soo useful for freshers.
Hi @bhargavi,
Thanks for you recommendation!
Very good video, very helpful. Thanks
You're welcome!
Where can we see the which technology we are using like 5nm chip or 7nm chi etc...??
Can you please explain what is implant layer in LEF file? and where its used?
hi in .lib file also we have cell names,units and pin details and in .lef file also we have the same so, what is the diff?
What is difference between .lef and .tf? how they exactly have some difference?
Hey please answer
Hello Sir,
what is the unit of Resistance(RPERSQ) is it nenometer or something else?
Hi Shivam,
Resistance is always measured in Ohm.
thank you from China
You are most welcome Jet li. Keep learning keep supporting.
which file contains information related to frequency?
Hi Abhinav,
All the clock constraints for PnR come in form of SDC file from synthesis team.
Thank you
Very useful videos. Can you make a tutorial videos on Static Timing Analysis? It will be very useful.
Thanks @DILLIGANESH
Sure I have a plan to explain STA very soon.
Can you also upload a video tutorial on how to generate LEF file in Virtuoso?
Ok, I will try.
Hi.. resistance value of metals layer will be different for each RC corner .
And resistance in tech lef has only 1 resistance value
Alright Akhil, The mentioned value of resistance in technology LEF or in .tf is the typical resistance value for each metal layers. But yes there is variations in resistance in different RC corners.
Thanx for the video. Which tool do you use to edit LEF files?
what is the masterslice and where is it used ? ( point 6th in technology lef)
Hi Akhil,
Masterslice layer is typically poly layers and only needed if the Macro has pins on Poly layer.
If masterslice layer is defined , one cut layer must be defined between masterslice layer and first routing layer.
Can you please share me the .lef file that would be helpful for my project
What is via in .tf file?
How to download this pdf in teligram
Hi Kranthi,
Sorry those slides are not downloadable. better to make your own note if needed from video.
Sir.....can you please make a tutorial on DRT analysis in Cadence...?
nice sir ,small request sir do video on double patterning
Thanks Gurram. keep supporting. We will do that.
thank you sir
Most welcome
Can you convert a technology LEF file into a .tf file?
can you help me with that?
What is meant by foreign in Lef
Hi Arun,
As per the LEF reference manual
FOREIGN foreignCellName [pt [orient]]
Specifies the foreign (GDSII) structure name to use when placing an instance of the macro. The optional pt coordinate specifies the
macro origin (lower left corner when the macro is in north orientation) offset from the foreign origin. The FOREIGN statement has a default
offset value of 0 0, if pt is not specified. The optional orient value specifies the orientation of the foreign cell when the macro is in north orientation. The default orient value is N (North).
Can u upload one video on SPEF file? I have a doubt in that.
Hi Gaurav,
Thanks for reminding. I will explain SPEF file soon.
what a detailing
Question is not clear. please ask along with some reference.
@@TeamVLSI it's not a question I am saying very good detailing
Ohhh Thanks a lot.