I'm afraid your design is wrong, you can't overlap two metal layers beause this will cause an undesired shortcircuit in your design. You should have done an Euler graph analysis and you will realize that you have to split the gate in two in order to do the layout because there is no Euler path for the full gate.
try explaining it urself then. He is at least trying to do something useful. No shame in that. Shame on you for such an inconsiderate response to someone who is trying to teach you something.
I'm afraid your design is wrong, you can't overlap two metal layers beause this will cause an undesired shortcircuit in your design. You should have done an Euler graph analysis and you will realize that you have to split the gate in two in order to do the layout because there is no Euler path for the full gate.
Jaume AF thank you for highlighting the error.
Jaume AF yes he is wrong
Connection is only considered if x Mark is done on wire
Awesome 👌
Using Euler's path will help.
thanks.
also don't we have to show the gate(red)?
i don't get it completely
You should re-arrange your circuit inputs and assign a flow of current
Bad explanation. You said it that you chose D and S randomly and you also said that you done so you are fast to write which side is D and S.
Then how u choose them?
thanx...sir can we take S & D any side?
Thanks alot bro you explained it so well
Thank you bro you explained it so well great job god bless you
how do you do this but for or
You can’t overlap metals you need a via if your gana do that.
too much "shall we"
He is explaining things too slow! Lagging
Very poor it’s totally wrong ... 🥴
its very confusing u can not explain it well enough,,,,,,, shame on u
try explaining it urself then. He is at least trying to do something useful. No shame in that. Shame on you for such an inconsiderate response to someone who is trying to teach you something.
This explaination is not that clear, but I really didn't expected such as dumbass comment.