It's even worse than that. Just 10 years ago Intel was releasing their top tier 8 core Xeon CPUs, at 135W tdp. 5 years ago AMD released first gen Epyc with 32 cores. Now we have 96.
I remember my first quad CPU motherboard. Not a quad core. I had to buy 4 CPUs. It called it my vacuum cleaner because it sounded like one. That was around 2006, and the idea of multiple cores on a chip was just barely coming out. Now I have 12 CPUs on a chip, yet I can hear my fridge across the house better than my PC.
How do you get so many different things done?! Every video is a treat! You support creators, develop ZFS diagnostics on the side, build systems for Linux core devs, build and benchmark various systems. Level1Forums, the podcast and a million other things. Do you even sleep? And how do you earn most of your money? Is it through TH-cam? Consulting?
Lisa was so happy at the streamed AMD event today - great video coverage Wendell, thank you very much. Seems to crush Xeons even more plus those great features (so much is wonderful - for me the further expanded confidential VMs seems very interesting). Just wow and for example already deployed at Azure -> just great. Cheers and keep this wonderful and interesting channel as it is, Pepe
ARM server CPUs are actually better than this 4th gen EPYC: 1) 7nm -> 5nm TSMC ........... -30% power consumption (42% more cores at iso-frequency) 2) Zen3 EPYC SP4 280W TDP -> SP5 with 360W TDP ......... 29% more (so 29% more cores at iso-frequency) ----------------------------------------------------------------------------------------------- ===== total 1.83 core count multiplier they would get from shrinked Zen 3 (1.42 * 1.29 = 1.83) 4) so total performance increase by new Zen 4 micro-architecture (Zen3 -> Zen4) is pretty small (AMD basically did the same trick as at desktop - massive increase of TDP and clock frequencies is the major trick) 5) SP5 has TDP of 400W (short peak 700W) and there is 1000W power supply per socket, and 24 DDR5 modules will consume around 150W, so total power consumption of CPU + RAM = 510 W .... SP5 is much larger than SP4 including TDP 6) Performance: 192-core/384-thread dual socket Zen 4 EPYC = 1790 pts in SPECint2017 7) Performance thread: 1790 / 384t = 4.66 pts/thread Now compare that to Nvidia server 144-core Super GRACE CPU (based on ARM Neoverse V2 core): 6) Performance: 144-core/144-thread dual CPU ARM Neoverse V2 = 740 pts in SPECint2017 7) Performance thread: 740 / 144 = 5.14 pts/thread ......... 5.14 / 4.66 = 1.10 ........ Grace is 10% faster per thread than Zen 4. ARM Grace is 10% faster per thread than Zen 4..... that's not a small number. Considering 96-core EPYC 9654 has boost 3.7 GHz and all-core 3.5 GHz, while ARM chips like 64-core Graviton 3 runs at 2.6 GHz. Grace's clocks are not known however around 3.0 - 3.3 GHz is reasonable estimation. This means ARM has IPC higher than these 10%. Consumer ARM Cortex X3 has 14% higher IPC than Zen 4 in Geekbench 5. Neoverse V2 core in Grace (and upcoming Graviton 4) is based on X3 core. But V2 has 2 MB L2 cache in compare to 1 MB in X3. So IPC might be even a bit higher than 14%. ___________________________________ Be very cautious about stock investment. AMD beating Intel in trouble doesn't mean AMD will not be smashed by ARM servers. Especially when I see $11,000 USD price tag on AMD EPYC. ARM CPUs can be manufactured under $1000 USD while providing better performance and lower power consumption, and lower die area. Both Intel and AMD will be in trouble soon. BTW: Remember that any x86 is CISC but runs inside as RISC. That extra and unnecessary translation CISC-to-RISC will always hurt performance and efficiency. Plus CISC variable length instruction encoding (x86 instruction might have anything between 1 byte to 15 bytes) really hurts how many instruction can be decoded per cycle because 6th instruction can be between 6th byte and 90th byte = 84 possibilities. While RISC ARM instruction has always 4 bytes so decoding/prefetch of any quantity of instructions per cycle is simple and super efficient. That's math and good instruction set matters a lot. Generally any CISC is obsolete for these technical reasons. M68000, VAX, Z80 or MOS6502 are CISC and died long time ago. x86 is here today because they managed to make it RISC inside and because Intel managed to kill main RISC competitors like Alpha (bought and shut down), HP PA-RISC (shut down in favour of Itanium) and also huge PC popularity with unlimited TDP. But with massive multicore systems today there is not place for CISC-to-RISC translation energy wasting. Unnecessary wasting. x86 is sinking Titanic. Nobody knows how long time this sinking will take however every engineer knows it will happened. ARM server has more than 10% server share and that was gained in one year (mostly Graviton 2 systems). But now there are 128-core Ampere Altra MAX, Graviton 3 on 5nm TSMC and upcoming storm of new CPUs: Nvidia Grace, Graviton 4, Ampere One, Qualcomm Nuvia and maybe even CPUs from Google and MS. Storm is coming... - Sarah Connor (this time it's not a Skynet/Genisis)
@@arm-power Name and pfp check out, this is definitely marketing material. No current architecture, no performance paradigm currently in large scale use is equipped for the next steps in computing. X86, ARM, RISC-V, GPGPU, fixed accelerators, none of them are properly offering three-dimensional compute structures. We are running into the absolute limits of 2.5D circuit design and we've barely touched the potential of bonded layers with through-silicon vias. But all of that aside SPECINT is a measure of raw throughput and has nothing to do with task-oriented compute loads. In real performance a single 84-core Zen 4 chip can often match dual 64-core Zen 3 processors. This is due to the faster memory and all of the other small changes throughout. In some cases the performance increase from AVX is closer to ten times when comparing 96-core Zen 4 against 64-core Zen 3. TDP is tunable and there are two other whole platforms, the density-optimized Bergamot and the cost-optimized Siena. Neither you nor I know enough about them yet. NVidia Grace is a different story. The Grace Hopper superchip is a 1000W TDP scenario and will be compared against AMD Instinct mixed-mode APUs. The Grace-Grace CPU superchip will have its chance to compete but I am expecting high TDPs and case-specific system performance. You can check numbers on Phoronix but at least against dual-socket Altra the new Zen 4 is kinda scary. Also in terms of the case you laid out, CISC-to-RISC conversion now usually takes place in a single clock cycle as the instruction hits the pipeline. And CISC instructions can require less storage space and memory bandwidth. The biggest difference is that ARM has always been driven by power efficiency goals and X86 forgot about those goals to chase after absolute performance. We're currently seeing convergence as both architectures become increasingly similar in terms of manufacturing process and design goals. X86 chasing efficiency and ARM chasing performance. Also an H100 Hopper single card appeared to be priced around $35K usd with the Grace Hopper expected to be monumentally more expensive. And the Grace-Grace superchip is not expected to be a $1000 CPU. You'll be comparing $100K+ systems against each other, probably. Please stop trying to spread disinformation.
@@arm-power I followed up and ran some publicly available numbers. The 128-core Altra Max was listed at $5800 usd and 250w TDP or about 2w per thread. In testing it traded blows with the Epyc 7763 which has similar memory channels, PCIe lanes and in fact watts-per-thread. Main difference being the ARM CPU itself costing less but the costs of moving to the new platform being significant with little to no gains in performance or efficiency. The 32-core 7F53 could even match or beat the Altra Max in some tests, and the 7773X also needs to be considered. The new top chip in Genoa is 96 cores, 192 threads at 360w default package limit (1.875w per thread). This chip annihilates Milan in many tests and the new 32-core F series is far faster than previous F series. I have not seen a good, blow-by-blow direct comparison but it looks like Altra Max 128 cores would lose in both raw performance, performance per thread and maybe even performance per watt. Grace has an estimated performance of 370 per 144-core package, so yes about 750 for a Grace-Grace superchip. Divided by 288 threads, not 144. That would be roughly 2.6 points per thread which is maybe 60-65% of AMD's points per thread based on AMD official numbers. Third party vendors say that the score should be closer to 1900 in their testing which would be a ratio of about five points per thread for AMD. If the 128 core Altra Max with reduced CPU cache sizes needed 250W TDP on N7, the 288 core Grace-Grace superchip could draw 600w and still get such a low core ratio. Genoa's 32-core F series part is a thousand dollars cheaper and can beat the Altra Max in several tests, but Bergamot is where the direct comparison will take place.
@@passintogracegoldenyearnin6310 1) 2018 Cortex A76 (Altra max / Neoverse N1) has IPC similar to Zen 1 (2017). 2) 2020 Cortex X1 (Graviton 3 / Neoverse V1) has IPC 50% higher A76 and about 5% higher than Zen 3 (2020). 3) 2022 Cortex X3 (Grace / Neoverse V2) has IPC 20% higher X1, so approx 10% higher than Zen 4. That's the real data, yours are wrong. SMT almost halves x86 IPC which is already behind ARM Neoverse. 64-core Graviton 3 @ fixed 2.6 GHz is super dangerous already today - slightly faster than Zen 3 Milan (despite SMT , 280W TDP and boost clock) but G3 consuming only 100W. Loot at Phoronix tests. Now Grace (and Graviton 4 possibly) based on X3/V2 core with 2MB L2 cache will have IPC between Zen 4 and Zen 5. X3 is absolute x86 annihilator. When you look how good results Altra and Graviton 2 server chips reached despite old A76/Neoverse N1 (with IPC of Zen 1 but N1 core is tiny 1.4 mm2 including 1 MB L2 cache, for comparison Zen 2 is 3.5 mm2, both 7nm) then imagine X3/V2 with 80% higher IPC. No SMT means very high performance per thread despite low N1 Zen1-like IPC. And ARM has up to 2048-bit SIMD SVE2 vectors with matrix instructions. What x86 has? 512-bit AVX and no matrix instructions (for that you need new Intel's AMX in upcoming Sapphire Rapids). Plus ARM released new SIMD extensions: SME and SME2 (Scalable Matrix Extension) with 2048-bit and tons of new useful matrix instructions. Not sure if V2 core will support SME but if yes, even bigger leap ahead for ARM. Grace will massacre Zen 4.
@@arm-power Oh it will be interesting. Intel and ARM continue to invest in accelerators which work very well in specific optimized loads, while AMD is planning FPGA integration to allow for software-defined fixed function circuits in the data center. I plan to look deeper into what Phoronix has for Graviton 3 now that you tipped me off to the fact they did some benching. Probably within as little as five years most HPC will be done with task-based semi custom chips and we'll finally see solid efficiency gains across the whole industry. Do you think Samsung will be able to crack the consumer market with ARM-based Windows laptops? Genuine question here.
This is damn exciting! You really drive it through :) We typically use 3+ year old servers, but this is the first time i asked already what supermicro parts would cost to build already a system like this :O These can push so much performance that we could potentially do 1:10 consolidations with just "basic" servers (we have a lot of E5 v1s still in production) if just enough memory can be installed
I agree about the importance of this launch for AMD for Zen 4 CPUs across an entire spectrum of products. While the typical PC enthusiast has been complaining about MB pricing for which AMD can do almost nothing about, they fail to see how the economics of the CPUs that AMD are making is going to play out and how much better this gen is than others. You now have two lines of server CPUs and two lines of laptop APUs and this allows AMD to target use cases much better, and all this riding on TSMC N5
AMD is actually going to have 4 lines of Server CPU's. They may use the same socket, but they'll have Bergamo, Genoa, Genoa-X, and Siena. Thats 4 seperate lines of server CPU's to choose from depending on the needed use case of the customer. That flexibility is wonderful, and not something that you currently really see from intel.
Lisa Su was on Bloomberg today. Of course we learned nothing from that interview other than it must be important. This is where the real learning happens. Thanks Wendell!
I don't even know what to say. Obviously from a enterprise standpoint, it's jaw dropping. It's been a while since we've seen such a performance jump with addition of flexibility. What shocks me the most is the culture change AMD has made along with the emphasis on efficiency (especially since there is so much flexibility). Being in a banking industry, where we worry about data/transaction loss, the addition of CXL is a great addition to see. So bring on January, so we can how Intel stacks up.
Wendell, there's a good chance I'll never even be in the same room as an EPYC system in my life, but your enthusiasm for it really makes my day anyway.
It's not that crazy a thought. These things depreciate hard over a few years, it cost me a couple grand to put a 32 core Rome server with 256GB RAM together.
He is trying to stay sane and talk abt it. It must be a really Happy Day for him and the AMD fans. Peace :-) 192 Cores (2 Procs), 6TB ECC per Socket... This is God level H/W.
I love this man...... "If you've ever come to the Level1 forums for help with your open-source project... AND I LET YOU REMOTE INTO A SYSTEM... chances are... it was this system" Thank you for what you do for our community Wendell.
This is such a good rundown of Genoa! I don't work with servers but this video made me excited about the products anyways. Wendell is so good at explaining stuff with excitement but still not be over the top in the presentation of said explanations and or information. Really professional and engaging! I hope all the best for you Wendell and team!
Oh boy this thing really raises x86 server stuff in the territory of older IBM Power systems. And will make datacenter much smaller, easier to run and far more efficient because you need way less power supplies, cabels, boards, power stages you name it.
I'd like to see some comparison numbers for a single 96c/192t CPU vs previous gen dual 64c setups! Unfair advantage I know, but still. As always, great job Wendell
L1Techs is my go-to channel for geeking out over insane new server parts. So cool to see AMD giving Wendell everything he needs to show off the parts and imagine the possibilities. Edit: Making a platform that "can be whatever you want it to be, baby~" is a great way to start another 5 years of AMDomination in the server space. Here's hoping Intel brings something equally attractive with Sapphire Rapids and beyond! Because competition is good for everyone.
The performance on show here by AMD is truly next level. Mind blowing sophistication commoditised. This kind of performance might get people building their own data centres again -- if you are a large consumer of compute, cloud is not cost effective (only supremely flexible, which is a different benefit).
the nice thing is that for development you don't need to go for those monster parts, you can get desktop stuff from AMD and have local development lack of that was a huge issue with the Intel market segmentation for their AVX-512 offerings
This is I think the 2nd video you've made after an AMD EPYC release where you are singing the praises about AMD and what they accomplished. That really says a lot about where AMD has come from and where they are now. I expect their market share for X86-64 server to get up to around 25% after the main Zen 4 run, and probably 30 - 35% after Zen 5. And people were being critical with AMD with Zen 2 EPYC saying things like "AMD only has xxxx amount of the server market", and I would respond saying for a small company to go from near 0 - 10% is a LOT of sales since the world of server is so large now. After Zen 5, I think Intel will start to pull back some market share IF they can keep on track with their "Intel 4" and then "Intel 20A" nodes. If they can't they're in trouble. TSMC can't manufacture enough die for Apple, AMD and Intel and they're going to prioritize Apple and AMD since they're fabless, whereas Intel is a direct competitor and wants to take market share from TSMC in the world of fabrication. So TSMC is never going to be the knight in shining armor for Intel.
@@AOTanoos22 TSMC has a better relationship with AMD than the others now though since Nvidia has tried to cancel orders and intel hasn't really bought anything from them until recently
@@WayStedYou well thats true to a certain extend, AMD and Apple will have priority as long as everybody is paying around the same and other players don’t make a significant difference. TSMC is a publicly traded company after all, their shareholders want to see more profits, especially in these days in which we’re facing a regression.
48 cores at 4.1GHz boost and 96 cores at 3.7GHz boost. Those are both insane accomplishments. (They all are. But these 2 milestones really stick out). All of the benefits of being on DDR5 almost double the efficiency and performance. I am shocked. What a time to be alive.
That’s equal too 24 dell 7010s with i7 3770. Someone should buy 24 of them for $3000 and do server performance test against this $12,000 monster lol That would be super fun
I don't need it but i want it. I can't wait for threadripper to come out with this socket. I saw the pricing and it's great, for the performance that you get, it looks like a great deal.
CXL sounds like it would also be a very good solution to some of the problems that seem to come up with multi-chip-module devices. Edit the implementation to focus a bit more on speed and performance, streamline it and bake this in as part of a Master chip's silicon instructions and do some good driver overhauls for communicating with other devices. I could easily see two, four, eight, etc. chips all working together on a PCI-E card, sharing memory tiers and caches, handling operations concurrently, and throwing out data like a hot-damn.
Great video.Lot of information. While video is 43min, I it will take 2 hours to watch it properly (as you pause on bench results). Speaking of bench graphs, it would have help, us plebs, who are not familiar with CPU naming, to have number of cores next to their name > Epyc 9374F (32c). Thanks, again, really great video.
If you ever want help to setup a WRF forecast test domain, I'm free to help. It can be a good test for longer/continuos process with heavy mpi workloads, and large cross cpu data transfers.
I really wanted to get a Genoa (or Saphire Rapids) server. As it will probably be my last on prem server, DDR5 and all the newest stuff. I had to settle for dual 32 core Milian which is still smokin compared to the dual E5-4617 w/ DDR3 it is replacing.
Thank You .. I always learn something when watching your vids .. I very much appreciate your time and the dedication you show to sharing the info .. the fact that you are having a blast and "in you element" when doing this in not lost either.
imagine in a few years when they get the DNN running and it slides down to consumer and gets incorporated into FidelityFX where the CPU boosts gaming performance as well
The Deere is about the only thing more expensive than 192 cores :) AMD might be upset if you paint their chips john deere green :) They are more a Massey company 🤔
Thankyou so much for the video..........awesome. I only have 5800x and am very happy with it but from my understanding when this PC of mine gets passed onto my wife and I go PCI 5 etc in maybe 2 years from now maybe I can also benefit from the trickle down effect as Tech trickle down does work unlike the financial markets where the pennies have run out long before they reach the lower levels. That CXL discussion sounds really cool and I wonder how long it takes before it hits the consumer market? funtimes ahead indeed.
This Epyc system is indeed a building-wrecking gorilla. I can't wait to see what both Epyc and Threadripper bring to the table between now and in the future (especially when they switch to III-V semiconductor technology to counter the growing Silicon transistor problems - that could also influence how fast they will be and how efficient).
IAM planning to buy a pc specialy meant creat high end 3d visuals , using corona ,vray d5 lumion max ue5 which cpu is best amd epyc 9654 or threadripper pro 5995wx?
Remember too, this isn't even the denser architecture, Zen4-C yet. We know about a 128 core chip coming with Bergamo, but looking at the 12 chiplets, they could likely do 144 to 192 cores per socket on Zen4-C if they keep the same number of chiplets and increase the density of cores on them to either 150% (12 cores / CCX) or 200% (16 cores / CCX).
18:35 I think module gains are even bigger than mentioned. it's standardized connector so in case of problem in that part, you can just pull it out and plop a newer version of that module, which would be both WAY cheaper than replacing the whole server, and it's more stable for users that need that 99.9 uptime, and don't have time to validate another hardware stack, because of some random bug waaaay deep in infrastructure parts they don't care about. I am sure it will not be JUST plug and play, but there is an option now, which was not there before. BTW, anyone has already tested PSQL behavior ? I would love to see those. I have a certain ROME server that, maybe, could get a little bit more OOMPH.
because this is a server CPU, so soon there would be a dual or quad socket versions of these. 192 (x2) or 384 (x4) cores / 384 (x2) or 768 (x4) threads damn alot of computing, and possibly soon servers, supercomputers, and datacenters would be smaller in physical sizes
Intel better keep those sapphire rapids under embargo forever if they don't wanna absolutely embarrass themselves. The only case Intel can win is with their hbm models and in very specific and niche workloads designed for Intel Amd is now faster than Intel per core, while having more cores and consuming less power Insane
I apologize for Tweeting this earlier, but when I listened to Forrest Norrod speaking, I was thinking - why does it seem like I know this speech pattern. And then it hit me, he says thing's like "It's fantastic!" and other stuff in similar voice and "restrained enthusiasm" as you do. I think that is one of the reasons, why I did like his part of presentation. Shame there weren't almost any details about Zen4c though. Stay Safe and be Well.
@@guy_autordie I know. It's just that I was expecting a bit on it in this presentation. not too much, but something more than "we have it and we will deploy it".
If they can run avx512 without of compiling it with or just with fresh sdk, could be interresting, with crypto acceleration,AI strings and values integers floats conversions to speach or something else, overclock and total encryption and security, without issues. Wow, the first server with pcie5 and ddr5 for rich consumers and internet businesses. I am waiting for intel to come out with their pcie5 ddr5 server chips now. They started desktop and finish with servers so it gives time to mature. Finally AMD servers can upgrade now efficiently.
![[Full] 4 ต่อ 4 Celebrity EP.910 | 22 ก.ย. 67 | one31](http://i.ytimg.com/vi/4TR3MVpOiw8/mqdefault.jpg)
"Don't reason with it. Don't argue with it. Just DOMINATE! Show them you're the pack leader." - Cesar Millan
Tsst
alpha roll those bitch--err ahem, those CPUs
Hope AMD doesn't get bitten the way Cesar does!
Being on TV is no guarantee of best practices
Shut up Cartman!
Thankfully Queen Latifa doesn't use an IT service.
Twenty years ago we were starting to see DUAL core CPUs... One of these has 96!!! I just can't get over that.
It's even worse than that. Just 10 years ago Intel was releasing their top tier 8 core Xeon CPUs, at 135W tdp. 5 years ago AMD released first gen Epyc with 32 cores. Now we have 96.
@@morosis82 It's cause Intel is a shitty company that deserves no one's money until they're bled to the point of actually having to innovate
I remember my first quad CPU motherboard. Not a quad core. I had to buy 4 CPUs. It called it my vacuum cleaner because it sounded like one. That was around 2006, and the idea of multiple cores on a chip was just barely coming out. Now I have 12 CPUs on a chip, yet I can hear my fridge across the house better than my PC.
Its always awesome to see Wendell dig into some proper hardware and explain in depth why it matters
How do you get so many different things done?! Every video is a treat! You support creators, develop ZFS diagnostics on the side, build systems for Linux core devs, build and benchmark various systems. Level1Forums, the podcast and a million other things. Do you even sleep?
And how do you earn most of your money? Is it through TH-cam? Consulting?
Lisa was so happy at the streamed AMD event today - great video coverage Wendell, thank you very much. Seems to crush Xeons even more plus those great features (so much is wonderful - for me the further expanded confidential VMs seems very interesting). Just wow and for example already deployed at Azure -> just great.
Cheers and keep this wonderful and interesting channel as it is, Pepe
ARM server CPUs are actually better than this 4th gen EPYC:
1) 7nm -> 5nm TSMC ........... -30% power consumption (42% more cores at iso-frequency)
2) Zen3 EPYC SP4 280W TDP -> SP5 with 360W TDP ......... 29% more (so 29% more cores at iso-frequency)
-----------------------------------------------------------------------------------------------
===== total 1.83 core count multiplier they would get from shrinked Zen 3 (1.42 * 1.29 = 1.83)
4) so total performance increase by new Zen 4 micro-architecture (Zen3 -> Zen4) is pretty small (AMD basically did the same trick as at desktop - massive increase of TDP and clock frequencies is the major trick)
5) SP5 has TDP of 400W (short peak 700W) and there is 1000W power supply per socket, and 24 DDR5 modules will consume around 150W, so total power consumption of CPU + RAM = 510 W .... SP5 is much larger than SP4 including TDP
6) Performance: 192-core/384-thread dual socket Zen 4 EPYC = 1790 pts in SPECint2017
7) Performance thread: 1790 / 384t = 4.66 pts/thread
Now compare that to Nvidia server 144-core Super GRACE CPU (based on ARM Neoverse V2 core):
6) Performance: 144-core/144-thread dual CPU ARM Neoverse V2 = 740 pts in SPECint2017
7) Performance thread: 740 / 144 = 5.14 pts/thread ......... 5.14 / 4.66 = 1.10 ........ Grace is 10% faster per thread than Zen 4.
ARM Grace is 10% faster per thread than Zen 4..... that's not a small number. Considering 96-core EPYC 9654 has boost 3.7 GHz and all-core 3.5 GHz, while ARM chips like 64-core Graviton 3 runs at 2.6 GHz. Grace's clocks are not known however around 3.0 - 3.3 GHz is reasonable estimation. This means ARM has IPC higher than these 10%.
Consumer ARM Cortex X3 has 14% higher IPC than Zen 4 in Geekbench 5. Neoverse V2 core in Grace (and upcoming Graviton 4) is based on X3 core. But V2 has 2 MB L2 cache in compare to 1 MB in X3. So IPC might be even a bit higher than 14%.
___________________________________
Be very cautious about stock investment. AMD beating Intel in trouble doesn't mean AMD will not be smashed by ARM servers. Especially when I see $11,000 USD price tag on AMD EPYC. ARM CPUs can be manufactured under $1000 USD while providing better performance and lower power consumption, and lower die area. Both Intel and AMD will be in trouble soon.
BTW: Remember that any x86 is CISC but runs inside as RISC. That extra and unnecessary translation CISC-to-RISC will always hurt performance and efficiency. Plus CISC variable length instruction encoding (x86 instruction might have anything between 1 byte to 15 bytes) really hurts how many instruction can be decoded per cycle because 6th instruction can be between 6th byte and 90th byte = 84 possibilities. While RISC ARM instruction has always 4 bytes so decoding/prefetch of any quantity of instructions per cycle is simple and super efficient. That's math and good instruction set matters a lot. Generally any CISC is obsolete for these technical reasons. M68000, VAX, Z80 or MOS6502 are CISC and died long time ago. x86 is here today because they managed to make it RISC inside and because Intel managed to kill main RISC competitors like Alpha (bought and shut down), HP PA-RISC (shut down in favour of Itanium) and also huge PC popularity with unlimited TDP. But with massive multicore systems today there is not place for CISC-to-RISC translation energy wasting. Unnecessary wasting. x86 is sinking Titanic. Nobody knows how long time this sinking will take however every engineer knows it will happened. ARM server has more than 10% server share and that was gained in one year (mostly Graviton 2 systems). But now there are 128-core Ampere Altra MAX, Graviton 3 on 5nm TSMC and upcoming storm of new CPUs: Nvidia Grace, Graviton 4, Ampere One, Qualcomm Nuvia and maybe even CPUs from Google and MS.
Storm is coming...
- Sarah Connor (this time it's not a Skynet/Genisis)
@@arm-power Name and pfp check out, this is definitely marketing material.
No current architecture, no performance paradigm currently in large scale use is equipped for the next steps in computing. X86, ARM, RISC-V, GPGPU, fixed accelerators, none of them are properly offering three-dimensional compute structures. We are running into the absolute limits of 2.5D circuit design and we've barely touched the potential of bonded layers with through-silicon vias.
But all of that aside SPECINT is a measure of raw throughput and has nothing to do with task-oriented compute loads. In real performance a single 84-core Zen 4 chip can often match dual 64-core Zen 3 processors. This is due to the faster memory and all of the other small changes throughout. In some cases the performance increase from AVX is closer to ten times when comparing 96-core Zen 4 against 64-core Zen 3. TDP is tunable and there are two other whole platforms, the density-optimized Bergamot and the cost-optimized Siena. Neither you nor I know enough about them yet. NVidia Grace is a different story. The Grace Hopper superchip is a 1000W TDP scenario and will be compared against AMD Instinct mixed-mode APUs. The Grace-Grace CPU superchip will have its chance to compete but I am expecting high TDPs and case-specific system performance. You can check numbers on Phoronix but at least against dual-socket Altra the new Zen 4 is kinda scary. Also in terms of the case you laid out, CISC-to-RISC conversion now usually takes place in a single clock cycle as the instruction hits the pipeline. And CISC instructions can require less storage space and memory bandwidth. The biggest difference is that ARM has always been driven by power efficiency goals and X86 forgot about those goals to chase after absolute performance. We're currently seeing convergence as both architectures become increasingly similar in terms of manufacturing process and design goals. X86 chasing efficiency and ARM chasing performance.
Also an H100 Hopper single card appeared to be priced around $35K usd with the Grace Hopper expected to be monumentally more expensive. And the Grace-Grace superchip is not expected to be a $1000 CPU. You'll be comparing $100K+ systems against each other, probably. Please stop trying to spread disinformation.
@@arm-power I followed up and ran some publicly available numbers. The 128-core Altra Max was listed at $5800 usd and 250w TDP or about 2w per thread. In testing it traded blows with the Epyc 7763 which has similar memory channels, PCIe lanes and in fact watts-per-thread. Main difference being the ARM CPU itself costing less but the costs of moving to the new platform being significant with little to no gains in performance or efficiency. The 32-core 7F53 could even match or beat the Altra Max in some tests, and the 7773X also needs to be considered. The new top chip in Genoa is 96 cores, 192 threads at 360w default package limit (1.875w per thread). This chip annihilates Milan in many tests and the new 32-core F series is far faster than previous F series. I have not seen a good, blow-by-blow direct comparison but it looks like Altra Max 128 cores would lose in both raw performance, performance per thread and maybe even performance per watt.
Grace has an estimated performance of 370 per 144-core package, so yes about 750 for a Grace-Grace superchip. Divided by 288 threads, not 144. That would be roughly 2.6 points per thread which is maybe 60-65% of AMD's points per thread based on AMD official numbers. Third party vendors say that the score should be closer to 1900 in their testing which would be a ratio of about five points per thread for AMD. If the 128 core Altra Max with reduced CPU cache sizes needed 250W TDP on N7, the 288 core Grace-Grace superchip could draw 600w and still get such a low core ratio. Genoa's 32-core F series part is a thousand dollars cheaper and can beat the Altra Max in several tests, but Bergamot is where the direct comparison will take place.
@@passintogracegoldenyearnin6310 1) 2018 Cortex A76 (Altra max / Neoverse N1) has IPC similar to Zen 1 (2017).
2) 2020 Cortex X1 (Graviton 3 / Neoverse V1) has IPC 50% higher A76 and about 5% higher than Zen 3 (2020).
3) 2022 Cortex X3 (Grace / Neoverse V2) has IPC 20% higher X1, so approx 10% higher than Zen 4.
That's the real data, yours are wrong. SMT almost halves x86 IPC which is already behind ARM Neoverse. 64-core Graviton 3 @ fixed 2.6 GHz is super dangerous already today - slightly faster than Zen 3 Milan (despite SMT , 280W TDP and boost clock) but G3 consuming only 100W. Loot at Phoronix tests.
Now Grace (and Graviton 4 possibly) based on X3/V2 core with 2MB L2 cache will have IPC between Zen 4 and Zen 5. X3 is absolute x86 annihilator. When you look how good results Altra and Graviton 2 server chips reached despite old A76/Neoverse N1 (with IPC of Zen 1 but N1 core is tiny 1.4 mm2 including 1 MB L2 cache, for comparison Zen 2 is 3.5 mm2, both 7nm) then imagine X3/V2 with 80% higher IPC. No SMT means very high performance per thread despite low N1 Zen1-like IPC.
And ARM has up to 2048-bit SIMD SVE2 vectors with matrix instructions. What x86 has? 512-bit AVX and no matrix instructions (for that you need new Intel's AMX in upcoming Sapphire Rapids).
Plus ARM released new SIMD extensions: SME and SME2 (Scalable Matrix Extension) with 2048-bit and tons of new useful matrix instructions. Not sure if V2 core will support SME but if yes, even bigger leap ahead for ARM.
Grace will massacre Zen 4.
@@arm-power Oh it will be interesting. Intel and ARM continue to invest in accelerators which work very well in specific optimized loads, while AMD is planning FPGA integration to allow for software-defined fixed function circuits in the data center. I plan to look deeper into what Phoronix has for Graviton 3 now that you tipped me off to the fact they did some benching. Probably within as little as five years most HPC will be done with task-based semi custom chips and we'll finally see solid efficiency gains across the whole industry.
Do you think Samsung will be able to crack the consumer market with ARM-based Windows laptops? Genuine question here.
Fun to see that we're back to servers having more memory per socket than a reasonably sized hard drive ;)
As you well know by now, AMD EPYC 9004 will be a monster for many workloads. Great video, Wendell!
This is damn exciting! You really drive it through :)
We typically use 3+ year old servers, but this is the first time i asked already what supermicro parts would cost to build already a system like this :O
These can push so much performance that we could potentially do 1:10 consolidations with just "basic" servers (we have a lot of E5 v1s still in production) if just enough memory can be installed
We can literally move entire clusters to a single dual socket rack. It’s nuts
I agree about the importance of this launch for AMD for Zen 4 CPUs across an entire spectrum of products.
While the typical PC enthusiast has been complaining about MB pricing for which AMD can do almost nothing about, they fail to see how the economics of the CPUs that AMD are making is going to play out and how much better this gen is than others. You now have two lines of server CPUs and two lines of laptop APUs and this allows AMD to target use cases much better, and all this riding on TSMC N5
AMD is actually going to have 4 lines of Server CPU's. They may use the same socket, but they'll have Bergamo, Genoa, Genoa-X, and Siena. Thats 4 seperate lines of server CPU's to choose from depending on the needed use case of the customer. That flexibility is wonderful, and not something that you currently really see from intel.
Lisa Su was on Bloomberg today. Of course we learned nothing from that interview other than it must be important.
This is where the real learning happens. Thanks Wendell!
I don't even know what to say. Obviously from a enterprise standpoint, it's jaw dropping. It's been a while since we've seen such a performance jump with addition of flexibility. What shocks me the most is the culture change AMD has made along with the emphasis on efficiency (especially since there is so much flexibility). Being in a banking industry, where we worry about data/transaction loss, the addition of CXL is a great addition to see. So bring on January, so we can how Intel stacks up.
Wendell, there's a good chance I'll never even be in the same room as an EPYC system in my life, but your enthusiasm for it really makes my day anyway.
It's not that crazy a thought. These things depreciate hard over a few years, it cost me a couple grand to put a 32 core Rome server with 256GB RAM together.
@Stargazer on Ceres, I would agree with this in everyway...
15:43 this is what needs to happen more and more, shared learning and confirmation at single resource point
He is trying to stay sane and talk abt it. It must be a really Happy Day for him and the AMD fans. Peace :-) 192 Cores (2 Procs), 6TB ECC per Socket... This is God level H/W.
I love this man...... "If you've ever come to the Level1 forums for help with your open-source project... AND I LET YOU REMOTE INTO A SYSTEM... chances are... it was this system"
Thank you for what you do for our community Wendell.
This is such a good rundown of Genoa! I don't work with servers but this video made me excited about the products anyways. Wendell is so good at explaining stuff with excitement but still not be over the top in the presentation of said explanations and or information. Really professional and engaging! I hope all the best for you Wendell and team!
This type of thing never comes up in my healthcare job.
Wendell’s enthusiasm makes my time away from work better 😊
Thanks to the crew at L1 :)
33:49 this kind of configurable interconnect has been seen in some retail previous generation epyc platforms that STH covered
Oh boy this thing really raises x86 server stuff in the territory of older IBM Power systems. And will make datacenter much smaller, easier to run and far more efficient because you need way less power supplies, cabels, boards, power stages you name it.
Man these new chips are rad, one thing I love about being an MS partner is the licenses I can test with. Can't wait to see your tests.
I'd like to see some comparison numbers for a single 96c/192t CPU vs previous gen dual 64c setups! Unfair advantage I know, but still. As always, great job Wendell
L1Techs is my go-to channel for geeking out over insane new server parts. So cool to see AMD giving Wendell everything he needs to show off the parts and imagine the possibilities.
Edit: Making a platform that "can be whatever you want it to be, baby~" is a great way to start another 5 years of AMDomination in the server space. Here's hoping Intel brings something equally attractive with Sapphire Rapids and beyond! Because competition is good for everyone.
The performance on show here by AMD is truly next level. Mind blowing sophistication commoditised. This kind of performance might get people building their own data centres again -- if you are a large consumer of compute, cloud is not cost effective (only supremely flexible, which is a different benefit).
Never stop making videos. This is such awesome coverage!
Once avx512 catches up, it's going to be nuts.
the nice thing is that for development you don't need to go for those monster parts, you can get desktop stuff from AMD and have local development
lack of that was a huge issue with the Intel market segmentation for their AVX-512 offerings
I'd love to get this hardware in a nice quiet 4U server for home in a few years. Still got a 2x4 core opteron box with 64GB RAM running from 2008 lol
h8sgl died so i got am4 :D
This is I think the 2nd video you've made after an AMD EPYC release where you are singing the praises about AMD and what they accomplished. That really says a lot about where AMD has come from and where they are now. I expect their market share for X86-64 server to get up to around 25% after the main Zen 4 run, and probably 30 - 35% after Zen 5.
And people were being critical with AMD with Zen 2 EPYC saying things like "AMD only has xxxx amount of the server market", and I would respond saying for a small company to go from near 0 - 10% is a LOT of sales since the world of server is so large now.
After Zen 5, I think Intel will start to pull back some market share IF they can keep on track with their "Intel 4" and then "Intel 20A" nodes. If they can't they're in trouble. TSMC can't manufacture enough die for Apple, AMD and Intel and they're going to prioritize Apple and AMD since they're fabless, whereas Intel is a direct competitor and wants to take market share from TSMC in the world of fabrication. So TSMC is never going to be the knight in shining armor for Intel.
TSMC is going to priorities whoever pays the most, not if they’re fabless or not.
@@AOTanoos22 TSMC has a better relationship with AMD than the others now though since Nvidia has tried to cancel orders and intel hasn't really bought anything from them until recently
@@WayStedYou well thats true to a certain extend, AMD and Apple will have priority as long as everybody is paying around the same and other players don’t make a significant difference. TSMC is a publicly traded company after all, their shareholders want to see more profits, especially in these days in which we’re facing a regression.
The thumbnail and the little 3 seconds clip that plays when you mouse over the thumbnail are just perfect.
48 cores at 4.1GHz boost and 96 cores at 3.7GHz boost. Those are both insane accomplishments. (They all are. But these 2 milestones really stick out).
All of the benefits of being on DDR5 almost double the efficiency and performance. I am shocked. What a time to be alive.
That’s equal too 24 dell 7010s with i7 3770.
Someone should buy 24 of them for $3000 and do server performance test against this $12,000 monster lol
That would be super fun
OMG Wendel was within spitting distance of my work next to AMD and I didn't get to meet him. So sad. Literally drive by the AMD office every day.
I need this in my life!
I don't need it but i want it.
I can't wait for threadripper to come out with this socket.
I saw the pricing and it's great, for the performance that you get, it looks like a great deal.
Threadripper probably won't be this socket. However, I think a Threadripper with zen4c could be pretty interesting.
THE BEST HARDWARE DIVE EVER!! Love the Channel. This explains all the EPYC stock of Mobo and early Epycs on Ebay.
seeing Jake from LTT and Dr Ian Cutress is cherry on top of a LEVEL ONE video ahaha ;)
Thanks guys
LOOOOOVE the 40,000ft helicopter view + gritty detail. Very nice presentation!
CXL sounds like it would also be a very good solution to some of the problems that seem to come up with multi-chip-module devices. Edit the implementation to focus a bit more on speed and performance, streamline it and bake this in as part of a Master chip's silicon instructions and do some good driver overhauls for communicating with other devices. I could easily see two, four, eight, etc. chips all working together on a PCI-E card, sharing memory tiers and caches, handling operations concurrently, and throwing out data like a hot-damn.
That sounds a lot like UCIe.
I love to watch you Wendel as you remind me of my oldest brother, who was a 'computer mother' back in the 70 - 90's.
Thanks for the info dump on this new product line from AMD.
Great video.Lot of information. While video is 43min, I it will take 2 hours to watch it properly (as you pause on bench results). Speaking of bench graphs, it would have help, us plebs, who are not familiar with CPU naming, to have number of cores next to their name > Epyc 9374F (32c).
Thanks, again, really great video.
Also, they'll now sell you thermal compound in cartridges along with a caulking gun to apply it 😀
this video literally helped me get a job. I used the content of this video to be an IT system engineer for northrop.
If you ever want help to setup a WRF forecast test domain, I'm free to help. It can be a good test for longer/continuos process with heavy mpi workloads, and large cross cpu data transfers.
I really wanted to get a Genoa (or Saphire Rapids) server. As it will probably be my last on prem server, DDR5 and all the newest stuff. I had to settle for dual 32 core Milian which is still smokin compared to the dual E5-4617 w/ DDR3 it is replacing.
I was just on your forums talking about flexible pcie lane configuration this month and here's CXL - my dreams come true.
Wonderful video! Very good contextualization of why Genoa is so amazing... Behind just the top line numbers.
Thank You .. I always learn something when watching your vids .. I very much appreciate your time and the dedication you show to sharing the info .. the fact that you are having a blast and "in you element" when doing this in not lost either.
Jake from LTT in the beginning is hilarious. Assume they have a video coming soon as well🤣🤣
You're looking much slimmer these days Wendell, and you look fantastic mate! Much love from Singapore
5:26 Loved the over 9000 reference
0:13 A Wild Jake has appeared
Wendell is for real! He knows his stuff too, not just hardware but software as well. He definitely passes the litmus test.
imagine in a few years when they get the DNN running and it slides down to consumer and gets incorporated into FidelityFX where the CPU boosts gaming performance as well
Perfect "Tech Evangelist" thumb nail, ... keep up the good work :-)
wow, that is pretty intense. will be interesting to see what this is capable of creating and learning
Me as a sysadmin trying to figure out a way to convince my CIO that we need some of these to run our Citrix apps😂
And here I am running a 4 core haswell server still. But it does what it's supposed to
Damn these CPUs look good! On that note, looking good Wendell!
Man, they let Jake out of Canadia?
Smuggled...
Nice, I will put this right next to my brand new John Deere...(I wish)
The Deere is about the only thing more expensive than 192 cores :) AMD might be upset if you paint their chips john deere green :) They are more a Massey company 🤔
@@danielsnyder2288 Well, partner, I like me them chiplets.
Your Equipment Room is shaping up, Wendell! Congratulations...🇺🇸 😎👍☕
I can't wait to buy this used in 10 years 😆
Wonder if or when an sTRX5 version of this will come out for the TR workstation line.
Wow this is amazing, 12 memory channels, 192 cores 😎. Still no FPGA on there ?
With that PCIe Bandwidth you could argue that a FPGA could just be added as PCIe Device.
Can I ask if it runs Cyberpunk 2077 at Maxed Settings with Ray Tracing though? 😆 So much compute power! Mind blown!
Just across the street from where I used to work Freescale/Motorola Fab now NXP, Lisa Sue used to work there also before AMD.
Amazing what AMD has revealed recently.
who needs sleep when Wendell drops a video.
5:28 "Is it really over 9000?"
*hands Wendell a scouter to make sure* (:
Thankyou so much for the video..........awesome.
I only have 5800x and am very happy with it but from my understanding when this PC of mine gets passed onto my wife and I go PCI 5 etc in maybe 2 years from now maybe I can also benefit from the trickle down effect as Tech trickle down does work unlike the financial markets where the pennies have run out long before they reach the lower levels.
That CXL discussion sounds really cool and I wonder how long it takes before it hits the consumer market? funtimes ahead indeed.
This Epyc system is indeed a building-wrecking gorilla. I can't wait to see what both Epyc and Threadripper bring to the table between now and in the future (especially when they switch to III-V semiconductor technology to counter the growing Silicon transistor problems - that could also influence how fast they will be and how efficient).
IAM planning to buy a pc specialy meant creat high end 3d visuals , using corona ,vray d5 lumion max ue5 which cpu is best amd epyc 9654 or threadripper pro 5995wx?
EPYC server: 50,000 USD
MSSQL server licence: 1,000,000 USD.
omfg.
If only we had PCIE flexibility on the consumer platforms..
Wonder what a Zen4 Threadripper is going to be like given the regular 16c R9 and those Epycs already show potential for greatness...
AMD is on fire! And so is Level1Techs with this video. 😃👍🏻
Pure tech porn. This is not Level One anymore, this is Level God.
Remember too, this isn't even the denser architecture, Zen4-C yet. We know about a 128 core chip coming with Bergamo, but looking at the 12 chiplets, they could likely do 144 to 192 cores per socket on Zen4-C if they keep the same number of chiplets and increase the density of cores on them to either 150% (12 cores / CCX) or 200% (16 cores / CCX).
Don't forget the 'X' versions with lots of cache.
I'm weirdly proud of the fact that such a great new platform takes then name of my hometown haha
18:35 I think module gains are even bigger than mentioned.
it's standardized connector so in case of problem in that part, you can just pull it out and plop a newer version of that module, which would be both WAY cheaper than replacing the whole server, and it's more stable for users that need that 99.9 uptime, and don't have time to validate another hardware stack, because of some random bug waaaay deep in infrastructure parts they don't care about. I am sure it will not be JUST plug and play, but there is an option now, which was not there before.
BTW, anyone has already tested PSQL behavior ? I would love to see those. I have a certain ROME server that, maybe, could get a little bit more OOMPH.
Looking forward to a sweat spot for VDI server bundle with these new AMD EPYC
because this is a server CPU, so soon there would be a dual or quad socket versions of these.
192 (x2) or 384 (x4) cores / 384 (x2) or 768 (x4) threads
damn alot of computing, and possibly soon servers, supercomputers, and datacenters would be smaller in physical sizes
Where do you get workstation motherboards and cases for Epyc?
15:25, Apologies in advance for the OT: What's the make and model of your huge screen?
looks like a LG oled.
Thanks for the vid. Would love to see it in 4k@60. Any reasons it's only 1080?
This launches and here I am with my lowly E5-2667 V2 and V4 based servers. I need more money 😁
Intel better keep those sapphire rapids under embargo forever if they don't wanna absolutely embarrass themselves. The only case Intel can win is with their hbm models and in very specific and niche workloads designed for Intel
Amd is now faster than Intel per core, while having more cores and consuming less power
Insane
Go AMD, Go Red Hat, and Go Open Notes!
Best content i've seen in a long time!
So fast Wendell!
I LOVE this idea!
But I'd have to plug it into two circuits I think.
But this would process my CPU-driven 3D artwork fast!
I apologize for Tweeting this earlier, but when I listened to Forrest Norrod speaking, I was thinking - why does it seem like I know this speech pattern. And then it hit me, he says thing's like "It's fantastic!" and other stuff in similar voice and "restrained enthusiasm" as you do. I think that is one of the reasons, why I did like his part of presentation.
Shame there weren't almost any details about Zen4c though.
Stay Safe and be Well.
Tom (moore's Law is dead) have leaked some specs and what is about as of today.
@@guy_autordie I know. It's just that I was expecting a bit on it in this presentation. not too much, but something more than "we have it and we will deploy it".
Only 96 core cpus? why so few cores?
I'm still waiting for they include 32gb of hbm33 memory with the CPU chip.
Mi300 was talked about today
@@chriswright8074 I barely read anything about that
Wendell, talking about tech coming from AMD. Meanwhile, I'm too distracted hyperfocusing on that Ubuntu update dialogue.
How does Far Cry (Software Render) run on this? :)
This is how you engage with the PC community. We love this shit. When I rebuild in December, I'm getting a 5600x3D. Dr. Lisa Su for President!!
I was waiting for the "And were doing a AMD Test Platform giveaway!" ;)
So how much would a fully tricked-out Daytona box cost?
Judging by the content and AMD calendar I assume that Wendell is still alive. So glad. Thought he was dead for real hahahaha
Wait, you mentioned linking to the AMD tuning PDFs, but I'm not seeing them anywhere. Am I blind?
If they can run avx512 without of compiling it with or just with fresh sdk, could be interresting, with crypto acceleration,AI strings and values integers floats conversions to speach or something else, overclock and total encryption and security, without issues. Wow, the first server with pcie5 and ddr5 for rich consumers and internet businesses. I am waiting for intel to come out with their pcie5 ddr5 server chips now. They started desktop and finish with servers so it gives time to mature. Finally AMD servers can upgrade now efficiently.