Turbo9 - Pipelined 6809 Microprocessor IP
ฝัง
- เผยแพร่เมื่อ 3 ก.ค. 2024
- Join Kevin Phillipson and Michael Rywalt as they explain the design of the Turbo9 Microprocessor IP. The Turbo9 is a compact high performance microprocessor IP that executes the Motorola 6809 instruction set. It is a modern implementation using a pipelined micro-architecture to give performance matching or exceeding modern RISC microprocessors while being smaller and more compact.
Kevin Phillipson has a BSEE and a MSEE from the University of Florida and is currently pursuing a PhD from UF. Michael Rywalt has a BSCS and a BSSE from Florida Institute of Technology and is currently pursuing a MSEE from UF. The Turbo9 is the basis of their research.
Link to Kevin's TH-cam Channel: / @turbo9team
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6809 - great choice with a highly optimized instruction set.
This shows that those Motorola guys were right after all. The 6809 deserves to be one of the few CISC architectures to get a microcode translation architecture like x86 did.
I'm still sad that they abandoned 6809 in favor of extending 6800 for future chips (68HC11 etc.)
I don't think they made a mistake in focusing on the 6805. That made them a lot of money and they were able to extend the IPA and keep it relevant. It's still a good architecture, even though I would have added a separate parameter stack when they added the push and pop (PSH/PUL) instructions to the 68HCS08 derivative. (Or, actually, I would have added it at least as early as 146805.)
I also don't think they made a mistake in extending the 6800 architecture in the 6801, except that I would have split the 6801 into the one we have and another that moved some op-codes around to squeeze in direct-page addressing mode unary instructions, and added at least one address line to allow moving the direct page out of the absolute address map. (Among other things.) I think the market would have supported both directions.
They did make a mistake in failing to supply the 6809 as an SOC core to general customers, and in failing to extend it. Just adding segment registers and a few more small tweaks (completing the DP addressing, adding the FDIV and IDIV instructions that the 68HC11 got) would have pitted the 6809 head-to-head against the 8088.
Very interesting material on producing a modern design for an older (but much loved) ISA aimed at a industrial-grade implementation. I wish the team - and the TurboR - much success.
From the PoV of the retro hobbyist, and as touched on in the video, it would be harder to reap the benefits as a ‘drop in’ due to the timing dependence of ‘80s software, but one could easily imagine a new ‘retro style’ machine using this, a Dragon or CoCo ‘++’ if you will.
Thanks for a great presentation!
That's why there are operating systems. I'm hoping for a version of NitrOS-9 that can run on Turbo9.
CoCo software is generally a lot less timing tight (for whatever reason) than a lot of other 8-bit machines
@@JamesJones-zt2yx It should just run.
Well, sort-of. A few drivers would need to be modified, to deal with timing issues.
6809 is a great cpu
The best thing about this is that you could/can run a real operating system; OS-9.
Will Turbo9 fit into ice40?
We have not synthesized the Turbo9 for any of the Lattice Ice40 family, but it should fit in one of the versions... LUT/Logic cell utilization is hard to translate between Altera/Xilinx/etc technologies, but a good measure of device utilization is number of flops. The Turbo9 uses less than 500 flops. Keep an eye on our youtube page for the pending GitHub release. Thanks!
Very nice talk...
Is the IP downloadable from anywhere?
It would be interesting to see how this compares to the 65C816 in terms of efficiency
- the '816 looks to be very efficient, but you need to keep track of the Mode bits
Also, any thoughts on extending it beyond 16-bit addressing
- I think this was one of the limiting factors for the oriinal 6809.. the world wanted to move beyond 64K by the time it arrived...
@turbo9team Should be able to answer your question.