This is the sort of channel we need more of on YT. Sharing information about more advanced projects and applications. Looking forward to the future videos.
Hey man, I've just found your channel, and as an electrical engineering student that wants to get into the space industry a lot more, I want to thank you for these really good and information heavy videos! I've been binge watching your videos and have come to learn a lot of interesting information on things that I had no idea about, and have seen a lot of crucial problems when making cube sats. Thanks again for the videos and please keep making them :)
Hey! Thanks so much for the kind words, that means a lot =) It's great to know that this stuff is useful for someone getting into the space industry. Best of luck with your studies, and I'll definitely keep the videos coming! Feel free to drop any questions or topics you'd like to see covered in future videos
out of everything, your CAN will most certainly work. I have people using seen untwisted wires for can bus and they work just fine for small node lengths. if you manufacture this with JLCPCB they wont charge you for via in pad service. I dont know about others, but as this is going on a satellite you might have to go to other vendors that uses more exotic materials and process to manufacture pcbs. but for one off prototype JLCpcb should be sufficient. Listen to the recent podcast from The Amp Hour, its on cubesat.
That would of course be great, I'm eager to find out! =) I sent this to PCBWay for manufacturing (they also make all the CNC parts) and you're right, for flight hardware a different substrate may be needed (they also offer Rogers). But that's still a few years away :) Thanks for the comment and also the telling me about that TAH episode, will definitely check it ou!
I know you said that there could be a couple of videos more before the break, but just in case for whatever reason this turns out to be the last video of season 1: Enjoy your break!!! We'll see you in February!
About the BGA routing, check if there are layouting application notes. on 0.8mm pitch BGAs dog-bone fanout should work, lower than 0.6 via-in-pad is probably neccessary. Since ease of service and ease of soldering is a priority in my Formula Student project we just avoid BGAs alltogether, so i dont have any practical experience with BGAs
Thanks! I should probably have thought of that myself after spending hours looking at these data sheets for the schematic xD Turns out there actually are layout examples for both uModules I used. So in r2 I will probably go with those... I just assembled the first charger PCB this afternoon, going to test it tomorrow :)
OK, the directives that Dario gave you are very good, stitching via is easy, one GND go really next to each high speed signal via, that is all. The size of the via is the same as what you are using for the signal. And you do have to remove whatever is on layers 2 and 3, unless you know when, you should not put anything there. On a 4 layer board you can use 18mil of distance between high speed lines . All digital lines should be considered high speed unless you are clear otherwise. Analog lines are low speed, except RF. Don't forgot to put a decoupling capacitor, you can used 10uf 0402 and you will be ok. And forget about layers 2 board, use only 4 layers.
Thank you for taking the time to comment! Yes, there is a lot to improve for r2. Two questions: Is there a reason why you would prefer 0402 over 0603 as decoupling caps (other than limited space)? And you would even go with a 4 layer board if the layout is feasible on 2 layers? For EMI performance or are there any other reasons? Thanks again!
from my formula student experience with CAN bus, i think the non-differential pair routing is not much of an issue, CAN bus is fairly robust and as long as you dont have a lot of EMI (like in a self made EV for example ^^) i would assume its fine as-is.
9:02 i think you're misinterpreting "unspecified signal impedance requirements", you say it's not applicable to your signals that don't have controlled impedance requirements, when that's exactly what that condition is referring to. this is saying "for signals that don't state a specific controlled impedance requirement, aim for 50 ohms", or in other words, most of the signals on the board. I'm far from an EMI expert (just a hobbyist), and I def find controlled impedance intimidating too, but there are online calculators you can use, they ask you for a bunch of info about the stackup (which should be available from your fab, in fact a lot of fabs have their own calculator that inputs this data for you), whether the signal is single-ended or differential, and your desired impedance, and it'll tell you the trace width and spacing (technically, you pick a value for either width or spacing and it gives you the other one, then you fiddle with the values till you get something that fits well into your design). No idea if the advice to use 50 ohms by default is valid, but given how harsh the environment is up there, it seems reasonable to me to have *some* default controlled impedance for non-specified signals. also: controlled impedance is weird, because you usually have some amount of unavoidable discontinuities in the trace impedance. unless the chip package, connector, and any other components in the signal path have been designed specifically to perfectly match your board stackup, the geometry of the pads probably won't perfectly match the width/spacing needed for your stackup. if you wanna get really fancy, you can smooth the transitions between the non-ideal pad sizes and the correct trace sizes, but there's gonna be a couple mm here and there where the impedance is a bit off. (not to mention the connectors themselves, take a look at ethernet for example, the spec's maximum cable length is predicated on a maximum number of jacks it can pass through because each jack is a discontinuity). As far as I can tell, this seems to just be accepted and budgeted for in signal integrity requirements, but i don't know the specifics of how that works / how to calculate whether you're within tolerance (especially since in space your tolerances are probably more strict than the official spec!) I would expect all the signals on the board (definitely i2c, probably CAN as well) to work just fine, and the issues will be in emission of and susceptibility to EMI, and possibly error rate if you're driving the CAN bus rly fast. so, stuff you def need to fix before flight but will likely work well enough for initial tests. i2c especially should be functional, as long as the actual circuit is correct and you're not driving the clock in the MHz. and if i understand your CAN pass-through correctly, you have maybe a few mm of track total that the signal passes through, so the size of the discontinuity is pretty small (in a lot of designs i've seen, there's usually a couple mm of wrong impedance breaking signals out of a footprint). no idea how that discontinuity scales across multiple boards stacked together though, that might add up to a problem.
Hey! Thank you so much for taking the time to comment in this level of detail, this is super helpful! I did understand the "unspecified signal impedance requirements" in the same way you mentioned - it's just that I don't always succeed in expressing myself coherently in these unscripted parts... I appreciate you mentioning this though. So for r2 I will definitely look into impedance control and use the approach you suggested (get in tha ballpark using online calculator and then tweak track sizes and spacings to fit in the design). That's an interesting vantage point, I have never thought of connectors being much of a problem for SI, rather cable/trace length between them and EMI. So I suppose in my design, the limiting factor may actually be the number of M.2 connectors a signal may go through in the stack up. Interesting! I dont' plan to run anything in the MHz range. For I2C, the usual 400 kHz mode will be plenty I think. You also brought up something I read a few times now, but never quite understood: Why do you think LEO would be a harsh environment regarding EMI? Would ionizing radiation (solar / cosmic background radiation) have an influence? Because thinking about just how empty it is up there, it would seem to be a much more benign environemnt regarding EMI than say an average office building. About smoothing transition between pad sizes and traces: Would you tend to step-up trace widths (like Phil Salmony tends to do) or use teardrops? Thanks again for the input. I will start a Discord next season, would be awesome to see you there :)
@@buildacubesat so to be clear this is all just anecdotal advice from my relatively limited experience as a hobbyist. my main assumption around stricter requirements in space is just, a vague sense of "radiation" being a problem, and the much higher cost of failure, since a lot of otherwise recoverable or easily fixable error states are potentially mission-ending when you can't physically access the device. i think what you're saying about it being much quieter up there is probably true, and ionizing radiation is a totally different thing from EMI, so i'm likely overstating the problem, i guess i was mainly just going off the general association between aerospace and stricter standards. I have not done any research into transitioning btwn trace sizes, my main intent was just to point out that lots of applications seem to get by with just accepting those small discontinuities. but i definitely think it's worth exploring how to optimize that, i just don't know much about that myself.
my intuition would say test your i2c bus at 400kHz, but also some much lower frequency (whatever the lowest your application can afford is) and use that in the final version, just to give you a nice big margin of safety. also: some of i2c devices implement CRC checksum functionality, you can check for that and make use of it where available to give you extra assurance
@@spambot7110 Sure, I understand that and your comments are still very much appreciated :) I want to look more into EMI/SI for space next year and ideally have a CubeSat dev as a guest on the channel who may be able to share some insights. For now, until the high altitude balloon test flight in June, I am going with a 'good enough if it works' approach to keep the momentum going, and then after that, I will start going over each subsystem with a fine-toothed comb and move into a space-worthy design direction. Well-reasoned comments like yours will be great to refer back to in the future, so thanks again for taking the time.
@@buildacubesat oh i just thought of something, when you see the length matching squiggles in a trace, when it's a differential pair of traces and the squiggle is on just one of them (for skew correction), that's another impedance deviation. so, i still don't know how to quantify it, but clearly there's a way to budget for it
Thanks for the shout-out, Manuel! Glad you found the tips useful. :)
Good luck with your project!
Best,
Dario
This is the sort of channel we need more of on YT. Sharing information about more advanced projects and applications. Looking forward to the future videos.
I forgot to mention that most of the SMD parts on the back are part of the LDO section.
Hope you like the video!
Hey man, I've just found your channel, and as an electrical engineering student that wants to get into the space industry a lot more, I want to thank you for these really good and information heavy videos!
I've been binge watching your videos and have come to learn a lot of interesting information on things that I had no idea about, and have seen a lot of crucial problems when making cube sats.
Thanks again for the videos and please keep making them :)
Hey! Thanks so much for the kind words, that means a lot =) It's great to know that this stuff is useful for someone getting into the space industry.
Best of luck with your studies, and I'll definitely keep the videos coming! Feel free to drop any questions or topics you'd like to see covered in future videos
out of everything, your CAN will most certainly work. I have people using seen untwisted wires for can bus and they work just fine for small node lengths.
if you manufacture this with JLCPCB they wont charge you for via in pad service. I dont know about others, but as this is going on a satellite you might have to go to other vendors that uses more exotic materials and process to manufacture pcbs. but for one off prototype JLCpcb should be sufficient. Listen to the recent podcast from The Amp Hour, its on cubesat.
That would of course be great, I'm eager to find out! =) I sent this to PCBWay for manufacturing (they also make all the CNC parts) and you're right, for flight hardware a different substrate may be needed (they also offer Rogers). But that's still a few years away :) Thanks for the comment and also the telling me about that TAH episode, will definitely check it ou!
Man! I really appreciate your content. Keep it up!
I know you said that there could be a couple of videos more before the break, but just in case for whatever reason this turns out to be the last video of season 1:
Enjoy your break!!!
We'll see you in February!
Thanks man! I really appreciate you sticking with the channel through the first season 🛰
About the BGA routing, check if there are layouting application notes. on 0.8mm pitch BGAs dog-bone fanout should work, lower than 0.6 via-in-pad is probably neccessary. Since ease of service and ease of soldering is a priority in my Formula Student project we just avoid BGAs alltogether, so i dont have any practical experience with BGAs
Thanks! I should probably have thought of that myself after spending hours looking at these data sheets for the schematic xD Turns out there actually are layout examples for both uModules I used. So in r2 I will probably go with those... I just assembled the first charger PCB this afternoon, going to test it tomorrow :)
Thanks for sharing. What version of kicad are you using coz I see it supports dark theme
Thanks for watching! I am using 8.0.6 and the theme options are located in Preferences -> Preferences... -> PCB Editor -> Colors
OK, the directives that Dario gave you are very good, stitching via is easy, one GND go really next to each high speed signal via, that is all. The size of the via is the same as what you are using for the signal.
And you do have to remove whatever is on layers 2 and 3, unless you know when, you should not put anything there.
On a 4 layer board you can use 18mil of distance between high speed lines .
All digital lines should be considered high speed unless you are clear otherwise.
Analog lines are low speed, except RF.
Don't forgot to put a decoupling capacitor, you can used 10uf 0402 and you will be ok.
And forget about layers 2 board, use only 4 layers.
Thank you for taking the time to comment! Yes, there is a lot to improve for r2. Two questions: Is there a reason why you would prefer 0402 over 0603 as decoupling caps (other than limited space)? And you would even go with a 4 layer board if the layout is feasible on 2 layers? For EMI performance or are there any other reasons? Thanks again!
from my formula student experience with CAN bus, i think the non-differential pair routing is not much of an issue, CAN bus is fairly robust and as long as you dont have a lot of EMI (like in a self made EV for example ^^) i would assume its fine as-is.
Ok, that's good to hear! I'm really looking forward to putting this to the test though.
You made micromodule out of micromodule, :D. Will the buck module with parts on both sides fit into the hole on main board? Looks very nice overall.
Yeah basically, babushka-style xD Thanks! Yes, I placed all components in a 20 x 20 mm area, so if I didn't mess up too badly, this should work.
Hey what software is this? and is it same for your satellite design or these are two different software for designing satellite design and pcb design?
That's KiCad. It's an open source software for electronics design. You should check it out, there is a ton of tutorials for it on YT.
9:02 i think you're misinterpreting "unspecified signal impedance requirements", you say it's not applicable to your signals that don't have controlled impedance requirements, when that's exactly what that condition is referring to. this is saying "for signals that don't state a specific controlled impedance requirement, aim for 50 ohms", or in other words, most of the signals on the board.
I'm far from an EMI expert (just a hobbyist), and I def find controlled impedance intimidating too, but there are online calculators you can use, they ask you for a bunch of info about the stackup (which should be available from your fab, in fact a lot of fabs have their own calculator that inputs this data for you), whether the signal is single-ended or differential, and your desired impedance, and it'll tell you the trace width and spacing (technically, you pick a value for either width or spacing and it gives you the other one, then you fiddle with the values till you get something that fits well into your design). No idea if the advice to use 50 ohms by default is valid, but given how harsh the environment is up there, it seems reasonable to me to have *some* default controlled impedance for non-specified signals.
also: controlled impedance is weird, because you usually have some amount of unavoidable discontinuities in the trace impedance. unless the chip package, connector, and any other components in the signal path have been designed specifically to perfectly match your board stackup, the geometry of the pads probably won't perfectly match the width/spacing needed for your stackup. if you wanna get really fancy, you can smooth the transitions between the non-ideal pad sizes and the correct trace sizes, but there's gonna be a couple mm here and there where the impedance is a bit off. (not to mention the connectors themselves, take a look at ethernet for example, the spec's maximum cable length is predicated on a maximum number of jacks it can pass through because each jack is a discontinuity). As far as I can tell, this seems to just be accepted and budgeted for in signal integrity requirements, but i don't know the specifics of how that works / how to calculate whether you're within tolerance (especially since in space your tolerances are probably more strict than the official spec!)
I would expect all the signals on the board (definitely i2c, probably CAN as well) to work just fine, and the issues will be in emission of and susceptibility to EMI, and possibly error rate if you're driving the CAN bus rly fast. so, stuff you def need to fix before flight but will likely work well enough for initial tests. i2c especially should be functional, as long as the actual circuit is correct and you're not driving the clock in the MHz. and if i understand your CAN pass-through correctly, you have maybe a few mm of track total that the signal passes through, so the size of the discontinuity is pretty small (in a lot of designs i've seen, there's usually a couple mm of wrong impedance breaking signals out of a footprint). no idea how that discontinuity scales across multiple boards stacked together though, that might add up to a problem.
Hey!
Thank you so much for taking the time to comment in this level of detail, this is super helpful! I did understand the "unspecified signal impedance requirements" in the same way you mentioned - it's just that I don't always succeed in expressing myself coherently in these unscripted parts... I appreciate you mentioning this though.
So for r2 I will definitely look into impedance control and use the approach you suggested (get in tha ballpark using online calculator and then tweak track sizes and spacings to fit in the design).
That's an interesting vantage point, I have never thought of connectors being much of a problem for SI, rather cable/trace length between them and EMI. So I suppose in my design, the limiting factor may actually be the number of M.2 connectors a signal may go through in the stack up. Interesting! I dont' plan to run anything in the MHz range. For I2C, the usual 400 kHz mode will be plenty I think.
You also brought up something I read a few times now, but never quite understood: Why do you think LEO would be a harsh environment regarding EMI? Would ionizing radiation (solar / cosmic background radiation) have an influence? Because thinking about just how empty it is up there, it would seem to be a much more benign environemnt regarding EMI than say an average office building.
About smoothing transition between pad sizes and traces: Would you tend to step-up trace widths (like Phil Salmony tends to do) or use teardrops?
Thanks again for the input. I will start a Discord next season, would be awesome to see you there :)
@@buildacubesat so to be clear this is all just anecdotal advice from my relatively limited experience as a hobbyist. my main assumption around stricter requirements in space is just, a vague sense of "radiation" being a problem, and the much higher cost of failure, since a lot of otherwise recoverable or easily fixable error states are potentially mission-ending when you can't physically access the device. i think what you're saying about it being much quieter up there is probably true, and ionizing radiation is a totally different thing from EMI, so i'm likely overstating the problem, i guess i was mainly just going off the general association between aerospace and stricter standards.
I have not done any research into transitioning btwn trace sizes, my main intent was just to point out that lots of applications seem to get by with just accepting those small discontinuities. but i definitely think it's worth exploring how to optimize that, i just don't know much about that myself.
my intuition would say test your i2c bus at 400kHz, but also some much lower frequency (whatever the lowest your application can afford is) and use that in the final version, just to give you a nice big margin of safety. also: some of i2c devices implement CRC checksum functionality, you can check for that and make use of it where available to give you extra assurance
@@spambot7110 Sure, I understand that and your comments are still very much appreciated :) I want to look more into EMI/SI for space next year and ideally have a CubeSat dev as a guest on the channel who may be able to share some insights. For now, until the high altitude balloon test flight in June, I am going with a 'good enough if it works' approach to keep the momentum going, and then after that, I will start going over each subsystem with a fine-toothed comb and move into a space-worthy design direction. Well-reasoned comments like yours will be great to refer back to in the future, so thanks again for taking the time.
@@buildacubesat oh i just thought of something, when you see the length matching squiggles in a trace, when it's a differential pair of traces and the squiggle is on just one of them (for skew correction), that's another impedance deviation. so, i still don't know how to quantify it, but clearly there's a way to budget for it
I'd love to see what feedback www.youtube.com/@PhilsLab had of your layouts. He's a true master of small, digital design.
Yes! I am planning to reach out to him about a collab in the future, when the design is a bit more mature (r2 or r3).