Hello, Thank you for the video, but I would like to ask a question related to what it's mentioned in 12.25. in a 4 layer board for the return current it starts from the GND of the load and end to the GND of the supplier if the two gnd are wired together so what's going to be the problem if we pass the signal through a via?? Also do you have any document that could explain more how will the return current pass through capacitor as you mentioned? Thanks a lot.
Fedi, Using a 4 layer board for high speed digital work is EXTREMELY problematic. Look at my videos on PCB stackup to get an idea about what I mean. The return current is actually a moving field. I explain it as a physical DC type current because that is easier to grasp. The return current can flow on either the ground plane or the power plane of the driver. At low frequency it flows according to the path of least resistance. At low frequency it resembles an ordinary DC current. At higher frequency it flows along the path of least inductance. If you have a trace over a ground plane or power plane of the driver the lowest inductance location for the return current is directly under the signal current on the plane. The closer the signal trace to the plane, the better they couple. There are many bizarre paths return current can take depending upon the topology. The trick is to pick a structure where the path of the return current is OBVIOUS and can be explained at a very elementary level. If it is unclear where the return current will flow, you can have no certainty about how well the circuit will work. When you do not know that path, commonly available simulators are useless and you will need to resort to 3D FEM type simulators. That is about all I can do in an email. For more information on inductance, etc. find a good ElectroMagnetic field theory book.
If the break is very narrow and the two planes are coupled with capacitors across a very wide frequency range, at the point of crossing, this can work. Easy words, but hard to implement. Don't do it unless you have test data to prove you have met the conditions. In fact, just don't do it for any modern fast edge rate signal...TFox
I have enough questions about this answer that I probably shouldn't even ask because I'm not qualified to try something like this, and I guess very narrow will depend heavily on the specifics of the situation. Always had "no routing over ground plane breaks" as a hard rule, never heard about this sort of exception til now thanks for sharing
Brief and to the point. Thank you for sharing such an instructive video !
Best explanation i've ever seen
you explained this better than anyone
thank you so much terry fox...
That was very informative, thank you for these tutorials
Informative thank you sir
this helps a lot. Thank you.
Very nice video. Where I can find the complete video?
Thank you a lot.
How do you sign up for your class? and what materials do you recommend for reading for substrate designing
Hello, Thank you for the video, but I would like to ask a question related to what it's mentioned in 12.25. in a 4 layer board for the return current it starts from the GND of the load and end to the GND of the supplier if the two gnd are wired together so what's going to be the problem if we pass the signal through a via?? Also do you have any document that could explain more how will the return current pass through capacitor as you mentioned? Thanks a lot.
Fedi, Using a 4 layer board for high speed digital work is EXTREMELY problematic. Look at my videos on PCB stackup to get an idea about what I mean.
The return current is actually a moving field.
I explain it as a physical DC type current because that is easier to grasp.
The return current can flow on either the ground plane or the power plane of the driver.
At low frequency it flows according to the path of least resistance. At low frequency it resembles an ordinary DC current.
At higher frequency it flows along the path of least inductance.
If you have a trace over a ground plane or power plane of the driver the lowest inductance location for the return current is directly under the signal current on the plane.
The closer the signal trace to the plane, the better they couple.
There are many bizarre paths return current can take depending upon the topology.
The trick is to pick a structure where the path of the return current is OBVIOUS and can be explained at a very elementary level.
If it is unclear where the return current will flow, you can have no certainty about how well the circuit will work.
When you do not know that path, commonly available simulators are useless and you will need to resort to 3D FEM type simulators.
That is about all I can do in an email.
For more information on inductance, etc. find a good ElectroMagnetic field theory book.
@@tfoxwa thank you very much for all the informations.
thank you, good material
thank u sir...
It's very good. Have you give me slide in video? Thank you
How?
@@tfoxwa You can send me by email: hung.cvan3012@gmail.com. Thank you so much
한글로 설명해주실 선배님??
whats the exception to the routing over plane break rule?
If the break is very narrow and the two planes are coupled with capacitors across a very wide frequency range, at the point of crossing, this can work. Easy words, but hard to implement. Don't do it unless you have test data to prove you have met the conditions. In fact, just don't do it for any modern fast edge rate signal...TFox
I have enough questions about this answer that I probably shouldn't even ask because I'm not qualified to try something like this, and I guess very narrow will depend heavily on the specifics of the situation.
Always had "no routing over ground plane breaks" as a hard rule, never heard about this sort of exception til now thanks for sharing
I am stupid... I could not understand this.
buy a book called "black magic" by Howard Johnson ... essential for any HW engineer