1. Introduction and Motivation | ARM-A (aarch64), in Pyjama!

[@jhakaas_insaan]

This is so great , please cover GIC, MMU , SMMU, SMC , SVC concepts . Also comparison between arm 8.0 , 8.2 and 9
Thanks in advance, you are doing great job

[@prasadm8441]

Thank you for creating such wonderful and intersting conversation with generic examples. I have one quick question regarding screen capturing or screen shot. currently we have some piracy websites which does the screen capturing the OTT content. I wanted to know how they are capturing OTT content.

[@jayaganeshdosapati8572]

Amazing !! I think this is the only series in web that talks about Armv8-A. Every other series talks only about M series. Thank you sooo much !!!

[@marcusl.1874]

Very great introduction you created here. Looking forward for new things you are going to share with us :-)

[@parthpanchal3843]

Awesome kick start of A class cores 😍

[@pranarya]

Thank you so much for starting this series. Was waiting for this from long time!

[@maheshnayak6082]

Very nice analogies given! Enough to Brain tatoo the aarch64 Exception levels!

[@amodkumar1864]

Gold content, really appreciate your examples 😊

[@Sai-Akula]

Thanks a lot for starting video series on Cortex-A, it's need of the hour
Some questions out of curiosity about exploring Cortex-A (ARMv8) Hands-on part:
1. Are you going to use QEMU or Physical RPI
2. Will you be programming MMU as a part of series
3. Is there a plan to explore capabilities (usecases) of HYP and SMC instructions (especially how PC jumps between vector tables at different at different Exception Levels ELx using VBAR)

[@inpyjama]

Thanks for the kind words ☺️.
For the most part we are planning to use QEMU just so anyone who doesn't have RPi with them can also participate.
Yes, MMU programming and exploring different caching, memory attributes is in the plan.
Yes, again. Our plan is to write baremetal FWs for all exception levels with their respective vector tables. So, the transitions between ELs and their inner workings can be easily explored :)

[@amittiwari-gu5uk]

Great video guys !!!

[@kshitijtakarkhede7833]

Hey inpyjama teams , thanks for amazing content you are delivering to community , I am Instrumentation Engineering student , dont have background in embedded so finding it difficult how to follow your playlist or in more broad sense how to get into embedded , have worked on plcs,scada systems , this ARM_A / ARM_M , assembly language, then we switch to OS-LInux , didnt getting the flow can you please , tell me the flow?

[@inpyjama]

embedded development is cantered around the CPU. We start with the CPU and understand how to program it. To do so, we need to learn the CPU/System models and then some assembly (because few things cannot be done using C).
Embedded is also about applications, but this series is more for people who are involved in working with CPUs as part of the embedded solutions. people working on phones, automotive etc

[@FedoraWorld]

Whatever the content they are discussing, most of the terms are over my head.
I'm a application engineer. I knows only C and basic other theory Data Structure concepts. I have NIL theory knowledge about system side.
I'd like to learn about Embedded System to become as Embedded Eng.
Anybody guide me what are things I need to learn to become Embedded Engineer.
It'd be much helpful if this video series could add content for newbie like me also.

[@anuragdutta7658]

Hi
Awesome content.
Are you also going to talk about ARM Coresight ?

[@inpyjama]

Yes, we are planning to cover those in the later part of the series. Stay tuned :)

[@skandaraghavendra8948]

Hi sir if hypervisor gets compromised will it effect all the guest os.
Or hypervisor is designed in a such a way that it never gets compromised
My another question is if there is chance of compromise . Is it designed in such a way that automatically the guest os shuts down
When it recognises the fault

[@inpyjama]

Those are great questions! Kudos :)
Yes, if the hypervisor gets compromised, all the guest OSes will also be compromised. That's because hypervisors have complete view and control of EL1(where Guest OSes run) and EL0(where applications run).
Hypervisors generally are designed to be fault and vulnerability tolerant and are very hard to break into. But, it rare cases when they are compromised, the fault (generally a crash) will result into the control being transferred to EL3 (secure monitor) code where the default behaviour would be to reset the entire system. So, your guess is correct - when hypervisor gets compromised, the system itself will reset shutting down all the Guest OSes along with it.

[@skandaraghavendra8948]

thank you
@@inpyjama

[@chiluverunrcmanishankar2821]

Please can you teach can and canoe and real time thingbwhich will help poorr guyz also

[@saugatadebnath6046]

It's sucure world ,non secure world and realm management system

[@saugatadebnath6046]

Realm Management Extension (RME)

[@glennimmanuel9338]

can you make a video to implement spidev on raspberrypi?

[@inpyjama]

Definitely, we are planning to cover SPI, I2C, in the later part of the series. :)

[@khanra17]

Anyone ready for an Android /Rust community ?

[@inpyjama]

discord.com/channels/1165531784293912576/1177268737485832242