Compile and Simulate Verilog in ModelSim

[@rkofficial4049]

I really appreciate you ❤

[@mukunthanjmukunthan4739]

Hey man , you really amazing .

[@HarisKhan05]

How to find console output instead of timing diagram?

[@sheralikhattak8823]

thank you

[@ARNOLDROYNAZARETH]

could not find interpreter "ScintillaTk" pls help

[@zahidfazal2176]

# can't read "Startup(-L)": no such element in array
# Load canceled
i m getting this.. what would be solution

[@ΘανάσηςΤσουνάκης]

run it as an adminstrator