Any application where you are measuring very weak signals in conjunction with large signals... how can you visualize a signal that is 0.000001 with other that is 100? Log scales!
Good idea to utilise logic inveters for log amplifiers, main advantage is simplisity, but with hi amplifications all 6 inverters in one ic may catch oscillation. Look at cd4069, that ic widely used in "wireless dorbell reciever" as linear amplifier, same logic buffers but work better in linear mode.
Also cd4069 makes an amazing High frequency VCO. Just feedback the output to input using a large resistor. Then change vdd voltage to change the frequency. The new cmos can go up to 100mhz.
Log amplifiers convert all signals to logarithmic scale, simply compress big scales in to small, similar like zip arhiver compress files. dB scale is logarithmic, 60dB means 1000 in usual numbers, 80dB - 10 000, 100dB - 100 000
@@Very_Dark_Engineer ok it means a non-linear amp to mix with IF so the resultant range of frequency is reduced. In receiver the reverse anti log should be used. Am I correct?
Thank you ! I'm not sure, but I think no. Actually, I think that the output will be always above.. because the linear contribution is always bigger than the true log output. I think that the true log output fits below the pice wise log. Does it make sense ?
so basically log amps act as linear amps if the signal intensity is relatively big(close to the cut off voltage) and actd as log if the signal is far from the cut off voltage.
What type of detector do you recommend for this particular circuit? A perfect diode or just a diode? That's a very interesting idea. Many active components can be used to realise a segmentally approximated logarithmic function. Opamps with diodes as limiters, for example. But I am thinking about the benefits of sacrificing logarithmic accuracy. Speed of operation? Lower noise? So how it works compared to classic logarithmic amplifiers or those a little bit more advanced with two transistors, two op-amps and a thermal compensation component? Like this, for example: drive.google.com/file/d/1_Cmau2Si2QHTKuuDqe3v-E_MeqVR5o4n/view?usp=sharing
Nice question! It really depends on the input to output bandwidth needed. Circuits that uses junctions log/exp current to voltage relation, as in the circuit you sent, have higher log accuracy and dynamic range. They can be used up to tens of MHz, like 10meg, 20 meg. In higher frequencies, the linear non-idealities (like junction capacitance, lead inductance) start to dominate and the log behavior fall down. The cascaded topology I presented in the video can work up to mmWave.. It's common to use just normal diodes with some kind o parallel compensation for temperature effects. In Integrated CMOS the circuit is usually built with differential gain stages so, actually, no diodes are needed, as the stages emitter voltages can me summed in a common node (the differential behavior of the emitter voltage will produce a rectified sample). Take a look at this differential log detector built by Matjaz antena.fe.uni-lj.si/literatura/S53MV/spectana/sa/sa09.gif
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hello can i get your .asc?
Thank you so much for making this video. Excellent explanation :o)
Glad it was helpful!
Nice explanation, thank you.
Thanks!
Could you please letm me know what's the usage of log amplifier? For a regular amp, you want to have as linear as possible. Thanks.
Any application where you are measuring very weak signals in conjunction with large signals... how can you visualize a signal that is 0.000001 with other that is 100? Log scales!
Interesting topography but discreet. I think opamp based would be closer to the real log function.
Yes! But this topology wins in bandwidth!
Good idea to utilise logic inveters for log amplifiers, main advantage is simplisity, but with hi amplifications all 6 inverters in one ic may catch oscillation. Look at cd4069, that ic widely used in "wireless dorbell reciever" as linear amplifier, same logic buffers but work better in linear mode.
Thank you! I buy some of these
Also cd4069 makes an amazing High frequency VCO. Just feedback the output to input using a large resistor. Then change vdd voltage to change the frequency. The new cmos can go up to 100mhz.
But my question here is what's the use of log amplifier?
Log amplifiers convert all signals to logarithmic scale, simply compress big scales in to small, similar like zip arhiver compress files. dB scale is logarithmic, 60dB means 1000 in usual numbers, 80dB - 10 000, 100dB - 100 000
@@Very_Dark_Engineer ok it means a non-linear amp to mix with IF so the resultant range of frequency is reduced. In receiver the reverse anti log should be used. Am I correct?
Came here after working with un ultra sound echo detection IC using logarithmic amplifier. Tuss4440.
This channel, I like it.
...So is the approximated output always below the ideal curve?
Thank you !
I'm not sure, but I think no. Actually, I think that the output will be always above.. because the linear contribution is always bigger than the true log output. I think that the true log output fits below the pice wise log. Does it make sense ?
so basically log amps act as linear amps if the signal intensity is relatively big(close to the cut off voltage) and actd as log if the signal is far from the cut off voltage.
Could the addition of capacitors in each stage decrease this ripple in the output?
No 😥
What type of detector do you recommend for this particular circuit? A perfect diode or just a diode?
That's a very interesting idea. Many active components can be used to realise a segmentally approximated logarithmic function. Opamps with diodes as limiters, for example. But I am thinking about the benefits of sacrificing logarithmic accuracy. Speed of operation? Lower noise? So how it works compared to classic logarithmic amplifiers or those a little bit more advanced with two transistors, two op-amps and a thermal compensation component? Like this, for example: drive.google.com/file/d/1_Cmau2Si2QHTKuuDqe3v-E_MeqVR5o4n/view?usp=sharing
Nice question!
It really depends on the input to output bandwidth needed.
Circuits that uses junctions log/exp current to voltage relation, as in the circuit you sent, have higher log accuracy and dynamic range. They can be used up to tens of MHz, like 10meg, 20 meg.
In higher frequencies, the linear non-idealities (like junction capacitance, lead inductance) start to dominate and the log behavior fall down.
The cascaded topology I presented in the video can work up to mmWave.. It's common to use just normal diodes with some kind o parallel compensation for temperature effects.
In Integrated CMOS the circuit is usually built with differential gain stages so, actually, no diodes are needed, as the stages emitter voltages can me summed in a common node (the differential behavior of the emitter voltage will produce a rectified sample).
Take a look at this differential log detector built by Matjaz
antena.fe.uni-lj.si/literatura/S53MV/spectana/sa/sa09.gif
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Narender_is_the_king_of_atoms_333
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