I don't know if I said this already but Your videos are THE best videos about SMPS and high-power switching I have found even up to this day! You have saved me so much time in problem solving like no one!! Thank You, seriously! Note: my work is mostly with motors (BLDC's and brushed DC stuff) so half-bridge high-speed switching is my every day life. :)
Thank you for this video on MOSFET switching characteristics. It explains exactly why I have ringing on my FET gate in a boost PFC design I am working on.
Very informative and clear explanation. Can you give a similar explanation in driving a BJT. I have seen they use a resistor in parallel with a capacitor but do not know more... Regards !
Hello Mr. Bolanos, Again, and as usual... nice video. I was wondering whether or not you should have included the 1 ohm gate driver resistance when calculating the gate voltage near the end of the video 35:55. If so then the values seem to come out even closer i.e. 375mA * 8.5 ohms (instead of 7.5 ohms) = 3.1875V. Additional question: Will these simulations work in LTSPICE? Should the results be similar if configured properly to work with the LTSPICE components? Regards, Rob T.
Hi Robert, That is a good catch. You are correct to also add the output resistance of the driver. That makes the calculation more closer. Again thank you for spotting the error. Best wishes, Robert B.
Hey Robert, First of all its a great video.We can also add snubbers across the MOSFET to reduce the di/dt which in-turn will reduce this voltage on gate pin.It would be great if you can make another video on selecting the snubbers.
Another nice video, very helpful. I am waiting for your video on feedback loop compensation using TL431 and optocoupler for the isolation purpose in dc dc converters.
Thank you very much for the nice documentation. I would like to use the information as a reference. Can I have the original source of this formula, Rgate=Zodamp=sqrt(L/Cgs)? Advance thank you for your reply
Thank you Robert for an extremely well made and informative video. I have a doubt. By adding the diode, aren't we risking the occurence of ringing when the turn off the MOSFET?
The diode ussually have a small amount of resistor (internally) in series. If the gate still has ringing, a external resistor can be installed in series. This small resistor should be able to damp the ringing. Hope this makes sense.
At 28:54, why is only the gate resistor voltage drop accounted for? Would the gate inductance also present a voltage due to the di/dt? Or is the inductance so small that it has negligible impact on the gate voltage calculation?
During repair of large SMPS (3Kw) ZCS HB. I got ringing at the plateau voltage during charging of the gate. What can be done to suppress this ringing? Static capacitace (gs)of the IGBT is 5.5nH. Freq. 100khz.
Make sure you have a gate resistor using the formulas I show in the video. If that does not work, add ferrite beads to the source and maybe the gate of the mosfet. Make sure the inpedance is over 100 ohms at 100MHz. Let me know if that works.
I left the gate resostors as the ones used at the factory (10r) and added only ferrite beads to gate and source legs on the IGBTs. A lot of ringing is now suppressed The smps works fine now only to see square waves rounded a bit on the rise time during charging of the gate. I guess this is quite normal in high power IGBTs. The driver is an IR2110S.
Hi Robert Bolanos, At 28:54, i see that the displacement current will find its path through the driver. [ Ro ( 1ohm) , Rg ( 7.5ohm ) , and L (7nH ) )] Why wont that displacement current flow into Cgs ? Thanks for delightfully informative video. Regards Shailendra
As Robert said: The current does go into both the gate and the source. However, during the miller plateau, the voltage at the gate moves very little or does not change as fast so I make a statement that no current flows thru the Cgs to make the derivation simpler to derive. But in reality there is a small amount of current flowing. Thanks for the question.
Hi Robert, congrats for your video. I have tried to get the same identical example in spice but I see no ringing without Rgate. Have you slightly modified the IRF624 mosfet model in this example? Thanks
Yes, the model was extracted from the irf624 datasheet curves. the model spice parameter are;.model IRF624M nmos (vto=2.24 kp=0.766 Lambda=0.0019 cgso=2.45u cgdo=150n) You will also have to add the parasitic lead inductance of about 7nH. Hope this clears this up.
Hi Robert, I would like to ask a question about Rgate calculation. At 18.32 min (and previously) Cgs has been considered to be 245pico. At 18.50 min (and previously) the spice model report in bold Cgs=2.45u. Is it a simple typo or Am I missing something? Thanks. Regards.
Another good question. The Cgso parameter that is on the .model statement is a spice parameter and has units of F/meter. When the W (Width) and the L (Length) are not specified, the deflaut W=100um while L=100um. To get Cgs you multiply the CGSO*W=2.45uF*100um=245pF. Thank you for asking the question. Question and comment can be sent to rbola35618@aol.com. Robert
@Robert Bolanos hello Sir Assume you have one mosfet connected to capacitive load and you want to minimize inrush current by turning on mosfet slowly without using PWM. How would you do this and can miller capacitor plays a role here by adding another capacitor in parallel with miller capaciotr
Yes, this is how we use a Pchannel mosfets and we add capacitor from drain to gate to slow down the rate in which the voltage rises on the drain of the mosfets and therefore limit the inrush current. The inrush current is typically part of the input filter circuit. Thank you for asking this question. Robert
Hi Tezla, sorry for the delay in answering; I have been on travel. The current does go into both the gate and the source. However, during the miller plateau, the voltage at the gate moves very little or does not change as fast so I make a statement that no current flows thru the Cgs to make the derivation simpler to derive. But in reality there is a small amount of current flowing. Thanks for the question.
Hi Bob, It's Larry...Please read this article. One Note is free... Microsoft Updating Windows To Kill Off Its Journal Application...Look it up on Google, it's pretty important.
Hi Larry,Yes, you are right, I need to update to One Note. I will see if I can download it. Thank Larry. Hope you and the family are doing fine. Thank you and God bless you, Robert
It would be nice to extend these "MOSFET Switching Characteristics" problems considering the synchronous case too. For example how to design a bootstrap drive circuit for the up side MOS and why it could be better (or worse) than the transformer method you have fully explained here th-cam.com/video/gyT1T5p2gtM/w-d-xo.html. Congrats once again.
![F.HERO Ft. JSPKK x ลำไย ไหทองคำ x M-PEE - ไม่สนิทบิดหมด (Thai Riders Anthem) [Official MV]](http://i.ytimg.com/vi/kPJZ0UihBfk/mqdefault.jpg)
I don't know if I said this already but Your videos are THE best videos about SMPS and high-power switching I have found even up to this day! You have saved me so much time in problem solving like no one!! Thank You, seriously!
Note: my work is mostly with motors (BLDC's and brushed DC stuff) so half-bridge high-speed switching is my every day life. :)
Thank you Valters
I have been looking for a good explanation everywhere finally to find you, thank you so much. 🙏🏻
It's hard to find in-depth tech videos on power electronics such as this one. Great job, and thank you !
Glad you enjoyed it!
OMG, I got confused from reading 12 papers and this video cleared everything for me! Thanks so much!!!
I glad it helped. RB
Thank you for this video on MOSFET switching characteristics. It explains exactly why I have ringing on my FET gate in a boost PFC design I am working on.
Hi Edward, Thank you for the feedback. I am glad you found the video useful. Robert Bolanos
Thanks so much for your explaination! It helps me a lot.
You're very welcome!
This is beautifully put together! Outstanding explanation, thank you, Robert!
Thank you for the comments
hey robert
your work is an inspiration for engineering students like us
nice to see your video
thank you
Hi Nikul. Thank you for the kind words. I am glad you find my videos helpful. Best wishes to you. Robert
Extremely helpful video. Exactly what I've been looking for
Hi Chris , I am glad you found it useful, Robert
Very informative and clear explanation. Can you give a similar explanation in driving a BJT. I have seen they use a resistor in parallel with a capacitor but do not know more... Regards !
Hi Catalin, that is a good suggestion.
Nice and in-depth explanation
Thank you Robert Bolanos
Hello Mr. Bolanos,
Again, and as usual... nice video. I was wondering whether or not you should have included the 1 ohm gate driver resistance when calculating the gate voltage near the end of the video 35:55. If so then the values seem to come out even closer i.e. 375mA * 8.5 ohms (instead of 7.5 ohms) = 3.1875V.
Additional question: Will these simulations work in LTSPICE? Should the results be similar if configured properly to work with the LTSPICE components?
Regards,
Rob T.
Hi Robert, That is a good catch. You are correct to also add the output resistance of the driver. That makes the calculation more closer. Again thank you for spotting the error. Best wishes, Robert B.
I forgot to answer your LTspice question, yes, you should be able to use LTSPICE to do these simulation. Hope this helps. RB
Hey Robert,
First of all its a great video.We can also add snubbers across the MOSFET to reduce the di/dt which in-turn will reduce this voltage on gate pin.It would be great if you can make another video on selecting the snubbers.
Hi Abhi, that is a great suggestion. Lets see what I can come up with.
wonderful lecturer
Thank you Tran
Another nice video, very helpful. I am waiting for your video on feedback loop compensation using TL431 and optocoupler for the
isolation purpose in dc dc converters.
Hi Satyavijay, I am working on a compensation video using the TL431.
Thanks
Thank you very much for the nice documentation. I would like to use the information as a reference. Can I have the original source of this formula, Rgate=Zodamp=sqrt(L/Cgs)? Advance thank you for your reply
Very useful. Thanks!
Thank you!
Thank you Robert for an extremely well made and informative video. I have a doubt. By adding the diode, aren't we risking the occurence of ringing when the turn off the MOSFET?
The diode ussually have a small amount of resistor (internally) in series. If the gate still has ringing, a external resistor can be installed in series. This small resistor should be able to damp the ringing. Hope this makes sense.
@@RobertBolanos Thank you Robert for the response. I understand what you are saying. Keep making great videos like this :)
At 28:54, why is only the gate resistor voltage drop accounted for? Would the gate inductance also present a voltage due to the di/dt? Or is the inductance so small that it has negligible impact on the gate voltage calculation?
During repair of large SMPS (3Kw) ZCS HB. I got ringing at the plateau voltage during charging of the gate. What can be done to suppress this ringing? Static capacitace (gs)of the IGBT is 5.5nH. Freq. 100khz.
Make sure you have a gate resistor using the formulas I show in the video. If that does not work, add ferrite beads to the source and maybe the gate of the mosfet. Make sure the inpedance is over 100 ohms at 100MHz. Let me know if that works.
I left the gate resostors as the ones used at the factory (10r) and added only ferrite beads to gate and source legs on the IGBTs. A lot of ringing is now suppressed
The smps works fine now only to see square waves rounded a bit on the rise time during charging of the gate. I guess this is quite normal in high power IGBTs. The driver is an IR2110S.
Thanks for such a informative video. Do u have mosfet switching characteristics with waveforms of Vds and Ids? Can u share link?
Hi Jaimin, that is a good idea. I will try to do a video on that subject. I am surprised how people are interested in this subject. Robert
Thanks to You
Thank you very much
You are welcome
Hi Robert Bolanos,
At 28:54, i see that the displacement current will find its path through the driver. [ Ro ( 1ohm) , Rg ( 7.5ohm ) , and L (7nH ) )]
Why wont that displacement current flow into Cgs ?
Thanks for delightfully informative video.
Regards
Shailendra
As Robert said: The current does go into both the gate and the source. However, during the miller plateau, the voltage at the gate moves very little or does not change as fast so I make a statement that no current flows thru the Cgs to make the derivation simpler to derive. But in reality there is a small amount of current flowing. Thanks for the question.
Great video
Hi Robert, congrats for your video. I have tried to get the same identical example in spice but I see no ringing without Rgate. Have you slightly modified the IRF624 mosfet model in this example?
Thanks
Yes, the model was extracted from the irf624 datasheet curves. the model spice parameter are;.model IRF624M nmos (vto=2.24 kp=0.766 Lambda=0.0019 cgso=2.45u cgdo=150n) You will also have to add the parasitic lead inductance of about 7nH. Hope this clears this up.
Hi Robert, I would like to ask a question about Rgate calculation. At 18.32 min (and previously) Cgs has been considered to be 245pico. At 18.50 min (and previously) the spice model report in bold Cgs=2.45u. Is it a simple typo or Am I missing something?
Thanks. Regards.
Another good question. The Cgso parameter that is on the .model statement is a spice parameter and has units of F/meter. When the W (Width) and the L (Length) are not specified, the deflaut W=100um while L=100um. To get Cgs you multiply the CGSO*W=2.45uF*100um=245pF. Thank you for asking the question. Question and comment can be sent to rbola35618@aol.com. Robert
Nice. Thanks.
Would a diode at the drain bypass the drop on the current from V3?
@Robert Bolanos hello Sir
Assume you have one mosfet connected to capacitive load and you want to minimize inrush current by turning on mosfet slowly without using PWM. How would you do this and can miller capacitor plays a role here by adding another capacitor in parallel with miller capaciotr
Yes, this is how we use a Pchannel mosfets and we add capacitor from drain to gate to slow down the rate in which the voltage rises on the drain of the mosfets and therefore limit the inrush current. The inrush current is typically part of the input filter circuit. Thank you for asking this question. Robert
Can you tell me why the current path for the miller effect chooses the gate path and not both the gate and source path (through Cgs)?
Hi Tezla, sorry for the delay in answering; I have been on travel. The current does go into both the gate and the source. However, during the miller plateau, the voltage at the gate moves very little or does not change as fast so I make a statement that no current flows thru the Cgs to make the derivation simpler to derive. But in reality there is a small amount of current flowing. Thanks for the question.
Hi Bob,
It's Larry...Please read this article. One Note is free...
Microsoft Updating Windows To Kill Off Its Journal Application...Look it up on Google, it's pretty important.
Hi Larry,Yes, you are right, I need to update to One Note. I will see if I can download it. Thank Larry. Hope you and the family are doing fine. Thank you and God bless you, Robert
It would be nice to extend these "MOSFET Switching Characteristics" problems considering the synchronous case too. For example how to design a bootstrap drive circuit for the up side MOS and why it could be better (or worse) than the transformer method you have fully explained here th-cam.com/video/gyT1T5p2gtM/w-d-xo.html. Congrats once again.
Thank you Nicola for the suggestion. I agreed it would be a good topic. As time permit I will add.