Cache Mapping Set Block Associative Mapping Watch more videos at www.tutorialsp... Lecture By: Mr. Arnab Chakraborty, Tutorials Point India Private Limited
it would have been better if you could have chosen some other main memory size other than 4096 because it becomes confusing between tag number and set number (both equals 64), and you have used them interchangeably
Sir Please give me answer. For Gate exam n any other competitive technical exam which points should learn in the topic of " Memory Hierarchy, Main, Cache , Secondary memory. " Please anyone tell me with every single sub topic name.
it would have been better if you could have chosen some other main memory size other than 4096 because it becomes confusing between tag number and set number (both equals 64), and you have used them interchangeably.
Get Certification in Computer Organization : bitly.ws/VGY4
Use coupon ""TH-cam12"" to get “FLAT 12%’’ OFF at Checkout.
"There is no biasness with 4033 with me!" ;)
Wish i hd u as my teacher during my college days...
Bro can we write like this in our exams
Very good explanation....thank for making my concept clear
best tutorial by far
This channel deserves million subs
Thanku so much sir for making my concepts clear😊
really really really thank you sir from the bottom of my heart
For this technique: Ram behaves as a matrix divided into rows and columns, to access the exact instruction we need rows(set no.) and column(tag no).
This was amazing!
thank you sir, very clear concept
REALLY NICE EXPLANATION SIR.....
This ease my studies lot 😍😍
really appreciate your tutor!
Liked u r teaching sir.
Ty bro amazing job !!!
it would have been better if you could have chosen some other main memory size other than 4096 because it becomes confusing between tag number and set number (both equals 64), and you have used them interchangeably
Very nice explanation Sir.
Thanks a lot Sir
Well explained sir.
College me to Kuch nhi padhaya hame. Isilye Kam marks Aaye. Ap Kitna Accha samzate ho. Kash aap teacher milte hame. Thank you sir G.
One Word- Awesome
Thanks a lot,it seems I am studying in IIT
Have you attended some lecture there?
@@SagarSingh-mv3cp but one of my enemy said that IIT lecturers explain very well. Since then he is my friend. He completed mtech from IIT kharagpur
Ty sir.
Respected Sir
Sir we also need other subjects which you can teach
Thanks sir
Sir I can't under stand how to take 7 and 4
It's because 2^7, so the 7 comes from there and plus 4 because universally frame size and page offset size must be same, thus the 4
@@amisharath5301 ohh
Sir Please give me answer.
For Gate exam n any other competitive technical exam which points should learn in the topic of " Memory Hierarchy, Main, Cache , Secondary memory. "
Please anyone tell me with every single sub topic name.
As u r preparing for gate. U mst cover all the topics.
I love you
Not in direct mapping in associative mapping cam out is 19 bits..time 10:40
126-127 Cache frame number will correspond to the 64th set that should be numbered 63 instead.
true
I love you
bruv he's 60 years old bruv
stuck at engineering school? go to an Indian tutorial....
Need subtitle. I hardly understand indian accent
Ulan şuralara bir tane de Türk yorum yapsın, bu arada anlatımı beğenmedim, kafamı karıştırdın hoca
Why the people are taking that much big size memories are taking in example? If you take small memory size, then it is easy to understand.
Which part you didn't undderstood tell and i might be able to help
i understand this so well
it would have been better if you could have chosen some other main memory size other than 4096 because it becomes confusing between tag number and set number (both equals 64), and you have used them interchangeably.