@@itissatno 15 years ago when I started building PCs, and the first core i7 came out, they talked about these types of processes. Its actually real now.
My Father used to work for GEC when they were making the first germanium transistors. He said they would use car headlamps as a heat source to attach the legs to the Germanium wafer. He kept a load of the prototypes that had exceptionally high gain.......I tested some the other day and they are still good 69 years later.
When I studied, around 1992, the professor said, that replacing analog, chemical photography with digital cameras was impossible. It would require at least 8 Megapixel! Unimaginable at the time... In this industry, you are out of date every 6 months, so it appears. Others back then were positive, that the first 33MHz PCs (was it 286?) would never work, because it is just too high a frequency... And today, they still have some wiggle room left to improve electronic circuitry and the production process. But also that will end, rather sooner than later. I wonder what will then come next... Me personally, I have no idea. Nonlinear optics? Biotech? Maybe asianometry could enlighten us, how the non-electronical future might look like.
@neo3418 The first 33 MHz processor was i486. There was a 33 MHz i386, too (AMD took it further with 386DX40 MHz). Intel's fastest 286 was 12.5 MHz. After launching i386, Intel moved all its atention to it, and Intel didn't allowed that second source partners could make the chip. So the second source partners, stuck with the 16-bit 80286, had no other option than develop the chip clock. The fastest 286 achieve 25 MHz - made by Harris. Most 286 motherboards topped at 20MHz, due to the scarcity of higher speed chipsets. There's an additional problem about that, because AT(ISA) bus runs at 10 MHz max, so the chipset has to decouple the bus from the processor.
@@its_jjk Was communications engineering - a specialized electrical engineering course. And it was a class about how integrated circuits are being made and how they work. We also had other peripheral classes like statistics and whatnot.
@@its_jjkbecause achieving design characteristics of a device/component depends heavily on how you fabricate it...And an EE student is meant to learn about designing physical aspects of transistors.
@@brodriguez11000 photonic control likely requires completely different materials. So much of this is material science that needs to be "compatible" with lithography techniques.
@@kayakMike1000Hi KayakMike. There has been a major photonics on silicon effort distributed across multiple universities for some years now. They are understandably decades behind transistors along multiple metrics, but they benefit greatly from all the silicon technology + AI. Time will tell how ubiquitous this becomes.
It blows my mind, how precisely we actually get these chips done, how do you get the "edge stage" without brakeing these micro structures or cleaning the whole chip from the left overs?!😮 I love this ❤😊
I am in an Automotive Tool group on social media and they were questioning Taiwan tool quality... I can't believe I had to remind them how the small country makes the highest precision instruments the world has ever known. Arguably the greatest human endeavors come out of Taiwan, akin to the space program and CERN.
True, but that doesn't logically mean that the same precision applies to all Taiwanese manufacturing. Gearwrench is pretty good, but generic Taiwanese tools vary.
@@szurketaltos2693 exactly. China has a functioning space station (amd an imptessive one at that), yet half their roads/buildings are collapsing, an they are known for cheap crap.
@@dadrising6464 china's space station just looks like an empty shoebox in orbit. they must nee a deck of cards to keep themselves occupied. compare it to the international space station that has all types of equipment absolutely everywhere for tests and experiments.
You just have to appreciate all the scientific research done in decades past to make these advances possible only now. Also, I think an increase in competition in this space will further the progress made, and also reduce the risk of losing production capacity due to various outside factors. Semiconductors are vital to modern life and society.
the GAA design offers great advantages for scaling down semiconductors. The normal problems we experience when scaling down lower and lower is reduced because of the enhanced electrostatics (reduced leakage currents and improved switching speed and energy efficiency). I can't wait to see the next gen semiconductors using this tech. It is going to be crazy!
If you like being presented with math problems that seriously bake your noodle for several hours before you finally crack it: Do it! If you hate the problem solving part and just want to get to the dopamine rush, from getting the solution, quickly.... keep playing computer games.
Most EEs at 22 already have their EE Batchelor degree and are deciding if they need to get a Masters or Doctorate degree for the job they want. You better be very motivated to get in starting at 22. An alternative is getting in to Integrated Circuit Mask Layout Design. Get in to that and you'll be down in the weeds battlng the process. It's not hard to get in to that and much less schooling but you wind up with lots of schedule pressure because you are in the critical path. If you are good with spatial relations and things like Tetris, packing suitcases, grocery bags and you can understand resistors, capacitors and transistors, you might have the talent for it. With that said you will never have the influence in a company that an EE has even if you design devices and libraries that allow the EEs to design circuits with better electrical characteristics and lower die area. You'll have to reinvent the wheel often because most rookie EEs won't believe that your experience is worth listening to and there is a chance that your job will be replaced by some AI Place & Route tool even if you specialize in full custom analog or you are a guy that runs a Place & Route tool. I did it and felt like a whore being used for my mind. But I quit and I prefer mindless work so I can keep my mind to myself. That's a much better way for me to live.
Minor correction; at 6:05 you talk about the effects of dielectric permittivity on gate function, and while obviously higher dielectric materials produce a higher capacitance, the electric fields within the substructure are actually *reduced* as an effect of the polarization, which can be essentially described as the realignment of electric charges inside the dielectric that cancels out the external field.
So the actual benefit of using high-k gate dielectric would be? Is is that the electric field is lower in the volume of the dielectric but then higher at the interface of dielectric-channel?
@@Martinit0 Correct, charge density at the gaussian surface of the electrode increases as relative permittivity increases, increasing total work capacity. It's easier to think about when you look at what we consider ,"charge" in electromagnetism as an imbalance of electrons and protons throughout a system. A dielectric essentially acts as a material with quasi-free electrons; similar to a metal, but instead their movement is limited to their immediate surroundings. When an electric field is applied to the material, the charged particles inside rearrange in order to achieve electrostatic equilibrium, which means there is no imbalance of charge, so the field on the inside from the perspective of the system is zero. It also increases charge density disproportionate to voltage, meaning increased efficiency, but I'm not sure how pertinent that is to transistor design specifically. More applies to capacitors and electrostatic motors.
9:35 minor correction. Epitaxy is not a deposition technique, it is the process of growing a single-crystal film on top of a different material with similar lattice constants. Epitaxy can be achieved with different deposition techniques such as evaporation or sputtering.
I remember back in 1968 reading a Scientific American article on how to make a transistor by spraying various chemicals on a piece of glass on a hot plate. Things have evolved!
dude, I cannot imagine your level of energy when you post so many great docs about tech and the economics and/or politics of tech, so often, and with such great ease. congrats.
For the basic drawing of the transistor some sort of PowerPoint Animation might have helped to better visualise the gate getting thinner, source/drain pool becoming shallower/deeper, etc. but regardless loved the video. Thank you :)
@@aekue6491 I work for a sub contractor for a big international defence contractor. We have long since been briefed that porting existing GAA designs to BPD-GAA will be, and I quote, "a largely automated process for embedded memory and gate logic, but will require substantial consideration and planning ahead of time for analog circuits". Since we work almost exclusively in the boundary layer between analog and digital (such is the nature of real-time signal analysis and shaping) we are currently "a little bit freaked out" as we are in mid-stage design of a GAA based solution that would ideally be finalised and rolled out as BPD-GAA, as that offers vastly superior noise characteristics. However, we are only now starting to get the builtin points on what to account for early to facilitate a reasonably straight forward porting process. Everything is still tightly under NDA from "the big three" but from the gossip I hear the situation is largely identical everywhere: The EDA tools will a breeze for the logic folks (CPUs, GPUs, accelerators, PLCs, FPGAs, etc, etc) but us analog folks (memory controllers, radio spectrum technologies, PCIe/CXL, optic signal modulation, etc, etc) will be the whipping boys as usual. We generally only get good EDA automation and integration of a node once it is no longer relevant for us (aka, once it's mature and cheap enough to make bulk crap products on like wireless doorbells and fridges and what have you). I hope that satisfies your curiosity, as I can't really divulge anything that is more specific than this.
Thank you. Your explanation was the lightbulb moment for me. I've heard and read a multitude of explanations of goafet transistors and it didn't quite click for me. Thank you for breaking it down so eloquently.
I’d be very interested in seeing a graphical explanation of how these structures are constructed. You had part of an explanation but then it never finished. Either way, your videos are incredible resources!
Grok's custom ASICs are using 14nm established process node and demolishing GPU based AI accelerators - these new transistor designs aren't needed for AI acceleration as there's lots more headroom in transitioning to custom ASIC designs with integrated memory for example, than what can be squeezed out of an evolutionary step in transistor design.
I work as an analyst and your channel is truly one of the rich resources for my learning. You're one of a kind and your videos will forever be a treasure to anyone who wants to learn about these topics. Thanks a lot man!
I've only seen a few of your videos but each time a third of the way you get through it you get silly and I love it EDIT: not silly as in old-school @ThioJoe but silly as in just a little bit fun with the delivery
The amazing part is that they are doing this at the near atomic level. I was thinking that the next level is to use the photon combined with wavelength and polarization to do switching thereby eliminating EMF issues related to latency and wasted heat energy.
A transistor is not just a switch (on/off). it can also behave like a variable resistor (linear operation). Even if in the field of Digital Electronics, it is always operated (biased) to perform as an on/off switch, the device can also be operated on its linear response characteristics to perform as an amplifier in the analog world. On the input and output sides of a digital circuit we still use transistors as linear devices. After the junction voltage is overcome, there is a nice linear response of changes in current to voltage (smooth changes in input current produces proportional changes of output voltage), before the transistor goes into saturation (completely On). If someone ever invented a true 'digital relay', transistors would become obsolete.
Excellent presentation. I appreciate the background and detailed descriptions of competing methodology, and as an investor, the anticipated timeline of new methods. Great stuff. Thanks.
2:16 "names are surprisingly descriptive in semiconductor land" That's something that bugged me in Physics, there's so many effects named after the discoverer like "Hall Effect", "Nyquist noise" and so on.
Thank you for making this extraordinarily clear and interesting video on a subject I wouldn’t have otherwise stuck with, let alone begin to understand. What I found most exciting about all of this is that this work at the atomic level reveals a nexus chemistry and physics, but also origami! As you presented each new photographic or diagrammatic depiction of architecture evolutions from FinFET to GaaFET, I began to imagine something like the Forksheet. Hello origami! Then, (whoop!) there it was! So what theoretically lies beyond 3d transistors? When you mentioned techniques for 3D chip making borrowed from MEMS, it made me think about how switching photons vs electrons changes things. So how far are we from building photonic processors of similar density/efficiency? (Begging forgiveness for my ignorance and possible/likely misuse of terms referenced and engineering concepts please! I’m a technology sales rep and avocational musician, not a theoretical physicist or electrical engineer!)
amazing stuff.. its like making a nano casting, sacrificial space to hold up a shape. from linear, to lateral to 3d.. and it is not even farctal geometry. It all has a purpose/destination.
Working on backend packaging but studied nanotechnology… I really need to fight to get into frontend. This video made me more excited than any of the packaging buzz word ( 3D, panel level etc.) .
I thought many recent innovations are in the back end and the back end manufacturing capacity is actually bottlenecking at the moment? (which presumably is why we can't have HBM for consumer GPUs any more)
Always so fascinating ... and if I understood more than a fraction of it, just think of the descriptors I could be using. But since I don't I can't. But much thanks nonetheless.
I really enjoy your channel it takes me back to my Electronics days but I'm a software engineer now. But I studied electronics when I was young. Its interesting they will be able to get to n2 by using established techniques 30% power gain is significant even if performance was to stay nearly the same. Do you think gate all around will make it into high power devices like desktop CPU's
I see the benefit from this GAA is only that one gate controls 3 channels. Just bring benefit to only memory system such NAND that has several fan in - fan out.
Hmm. Nerds like arguing about who did what first, but gate all around at 1 µm is not the same as gate all around at single digit nm. Completely different manufacturing challenge and a whole different pressing need to make it work in order to advance the technology.
There are many MANY semiconductor technologies that were proven in the lab several decades before they became commercially viable. One thing is to do it. Another thing is to do it with such low defect density that you can build anything useful with it. And another thing, yet again, is to be able to do that at several hundred wafers per hour with a method that can be "copy/pasted" to many production lines spanning several fabs.
Fascinating - seems like we're approaching limits of scale at some point....this is where someone develops a new material or a new paradigm to take digital manipulation to the next level....optics? Magnetohydrodynamics? Some new graphene variant? Can't wait to find out...
FinFET, then GAAFET, then Forksheet seems to make sense, as there seems to be gains in multiple criteria but CFET seems to have little power efficiency and performance improvements… I believe the next step is Post-CMOS spintronics / ferro-magnetic related technology based on Magnetic Tunnel Junction (MTJ) (or derived from it) like MRAM, Intel MESO concept, Spintec FESO concept… Semiconductor R&D should be focusing on spintronics instead of CFET as it has a much bigger improvement potential than CFET…
I like how the relevance of this really pushes everything back into data centers. Welcome back to the age of the mainframe and the thin client. Your rectangle is a brick without a half ton space heater sitting in a warehouse.
@@Bomkz Eh what? Cold war, I could get some degree, space race and all that. But what does WW2 have to do with the last 50 or so years of semiconductor development?
@@Gameboygenius while yes, technology advanced quickly during the cold war, the _foundations_ for a lot of very _very_ important science fields and technologies were created during WW2, as well as the push towards creating more advanced computers during such times and a lot of very important discoveries. It wasn't until the cold war that we realized how to merge all these advancements done during WW2 to create what would be a mass producible transistor, and eventually, the computer. WW2 also laid the foundations necessary for the cold war to be a thing in the first place as well, and showed america(ns) how science and technology can be very beneficial for war, and coincidentally civilians as well via the trickling down of such discoveries into consumer products. It propelled america into a global superpower who eventually was able to monetarily back a bunch of research and development.
I have a memory from 1992-ish of an adult telling me that computers are alien technology, he reasoned this by saying that no one could fully explain how they worked. There was no Asianometry at that time so I forgive him.
@@Bomkz Ok, I get your perspective. However. Fundamental physics is important, however, I can easily imagine an alternate timeline where the development was 2-4 times slower. In this timeline, the collective economic interests of the world got complacent and didn't decide to plough in the ginormous R&D investments that it took to get to where we are today. In my view, what happened after WW2 was much more pivotal for the world of electronics.
While listening to this i had a stupid idea. How about consturcting a cube of transistors instead of a sheet, and the way you would reach transistors inside the cube is by deploying 2 currents, but the second current is 1 transistor Omega less then the first one. So basically the current goes trough all the transistors flipping their state over, but a second comming right behind flipping them back on the same path, but since the second is slightly less powerfull it wont be able to flip the last transistor like the first current so that's state will remain in a changed state while all others they went trough revert back to their original, effectivelly only changing a deep transistor. Now obviously this would technically halv the speed of the processor, however the additional dimension of verticality would multiply the processor output. So just one level would bring back to a regular processor, and a second level (3 levels in total) would already double, while a third level would quadriple the process power, quickly scaling up the processing power. I don't think heat would be an issue here, as the system already made out of heat transfaring material, it would be harder to cool, and heat up equally fast of how it increases process power, but you would only need better cooling and cooling was the limit of process power anyways so nothing change there, this is more of shrinking the processor but increasing the cooling unit so mass should be likelly equal. Other question is, how do you govern the current to hit the right transistor as it goes trough others? Simple, electric spin can be easilly lined up with magnetic field, you just use a tiny magnetic field (or even use the systems innate field) to keep it consistent and only let trough electrons that fits trough a spin gate, so their path will be predictable at all times. (they should do this on current processors too anyways).
15:43 - The field effect trnasistor was concieved and postulated as early as the late 1920'ies. Then however, no semiconductor could be made to sufficient purity, though...
What FoM are you looking for? As far as I'm aware, unlike with the switch from planar to finfet, the switch to GAA and CFET isn't about individual transistor performance as much as it is about TOR density. As RF designer, everything since 22 nm is a step backwards for my performance (though I hear the high-speed analog guys still get some minor gains).
@JorenVaes I would love to know what the f_t and transconductance looks like. It seems like there is an improvement in output impedance too? I'm just curious how the transistors are better. I haven't seen any numbers for all these nodes, so it's hard to contextualize what's improving and what's the same.
@@ion599I can't comment on Ft, as we tend to not use that that often in millimeter-wave design and work more with Fmax as a metric instead. In general, Fmax has flattend around 300 GHz since 65n, and stayed quite constant until 22 bulk (with exception of 22 FDSOI, which has an Fmax of about 380 GHz). Since finfet, it has dropped back down, afaik the most recent nodes have an Fmax of about 250-ish GHz. This is mostly BEOL limited though - intel has a special 16nm finfet process optimized for RF, and that has a custom BEOL, and supposedly has a crazy Fmax of like 380-400 GHz. I believe a colleague of mine, Carl D'heer, has done some work on quantifying this Fmax over technology in his PhD thesis, but I don't know if this is publicly available.
No one can escape from this game without moving out to the forest in survival mode… because each and every moment of your life the semiconductors are all over the place around you… until you get back into the game and start upgrading your knowledge realizing that the game has never stopped haha 😅 I am personally just an enthusiastic player who is not involved in any kind of design but this show is so fun to watch because it has the best presenter in the industry so seriously conscious and so deliciously funny ❤
@@JorenVaesIt's a shame that the process improvements are not creating faster transistors. It would have been nice to have power gain deep into the THz region. Thanks for answering my question!
Semiconductors aren’t called that because they only conduct some of the time… they are called that because they have higher conductivity than an insulator but lower than a conductor
Interestingly (to me anyway) the FET (Field Effect Transistor) is what should have come before the type of transistor which came out first. The idea of the transistor was to replace vacuum tubes and vacuum tubes work on the same general principle as FETs. A static field applied to a screen grid (just like the grid on a screen door) controlling a much larger flow of electrons (emitter to plate). But semiconductor tech wasn't advanced enough to make that readily possible so they went with current control rather than voltage control. The very first "proof of concept" transistor was constructed with a liquid semiconductor. Current control, however, is costly as to wasted power and heat was always a problem. MOSFETs (And better still, C-MOS) can be made such that they only really draw any power when they are switching states. The faster they do the greater the power draw and the greater the heating, which is a big problem today with the newer vertical stacking techniques.
In the analog world, there is still great diversity when it comes to different types of transistors. Both MOSFET and the old school JFET have their uses when high input impedance or low power is needed, but for low voltage noise or high gain (heterojunction) bipolar transistors are often the better choice.
this channel is always a source and never a drain
Lol
I see what you did there........
And yet, it switches me on...
massive potential
Our chips overflow.
It's surreal to see things that I remember as proof of concept research papers start to enter mainstream production.
Do you remember how long that is? Curious :)
@@itissatno 15 years ago when I started building PCs, and the first core i7 came out, they talked about these types of processes.
Its actually real now.
Like what exactly? Why are you so vague?
@@matttzzz2 i like the part where you ask this , after he already posted a reply to someone else answering that question.
@@matttzzz2like the topic of the video you’re on????? Weirdo
My Father used to work for GEC when they were making the first germanium transistors. He said they would use car headlamps as a heat source to attach the legs to the Germanium wafer. He kept a load of the prototypes that had exceptionally high gain.......I tested some the other day and they are still good 69 years later.
Now that, that is history right there. Do yoy have any pictures? You should perhaps post a video demoing one.
@@warpspeedscp I could do, an hfe of 163 is quite impressive. I have quite a few slides from back then as well.
Nice
Now THAT's a great story.
so, your father commanded legions in Germanium.
son of Maximums detected.
What do transistors and professional athletes have in common? They both get their strengths from doping
Athletes, and Cheech and Chong! 😆
Never thought they'd be categorised together, but there you go. 😎
Here, get your like...
And what's more, it's the same company - IG farben.
You know you've done a good job with your videos when I saw the title and actually knew what it meant, and was actually excited 😂
nerd
Waiting for a boxed-set.
Joe why do you like computer
Good to see you again Mr. joe!
hi there :)
I have learned more about fab processes from your channel than I did getting an electrical engineering degree.
When I studied, around 1992, the professor said, that replacing analog, chemical photography with digital cameras was impossible. It would require at least 8 Megapixel! Unimaginable at the time...
In this industry, you are out of date every 6 months, so it appears.
Others back then were positive, that the first 33MHz PCs (was it 286?) would never work, because it is just too high a frequency...
And today, they still have some wiggle room left to improve electronic circuitry and the production process. But also that will end, rather sooner than later. I wonder what will then come next... Me personally, I have no idea. Nonlinear optics? Biotech? Maybe asianometry could enlighten us, how the non-electronical future might look like.
Why would you learn about fab processes when getting an electrical engineering degree?
@neo3418 The first 33 MHz processor was i486. There was a 33 MHz i386, too (AMD took it further with 386DX40 MHz).
Intel's fastest 286 was 12.5 MHz. After launching i386, Intel moved all its atention to it, and Intel didn't allowed that second source partners could make the chip. So the second source partners, stuck with the 16-bit 80286, had no other option than develop the chip clock. The fastest 286 achieve 25 MHz - made by Harris. Most 286 motherboards topped at 20MHz, due to the scarcity of higher speed chipsets. There's an additional problem about that, because AT(ISA) bus runs at 10 MHz max, so the chipset has to decouple the bus from the processor.
@@its_jjk Was communications engineering - a specialized electrical engineering course. And it was a class about how integrated circuits are being made and how they work. We also had other peripheral classes like statistics and whatnot.
@@its_jjkbecause achieving design characteristics of a device/component depends heavily on how you fabricate it...And an EE student is meant to learn about designing physical aspects of transistors.
Also know as: damn-thats-a-long-name-FET
Go-Ask-A-Fucking-Engineer-The name
D-TaLN-FET
GYAATFET
TH-cam deleted my reply. Fuck youtube
@@Dave-dh7rt agreed.
I like how you uses pauses that gives the viewer time to digest the heard and think about it.
MOM MOM ASIANOMETREY MADE ANOTHER TRANSISTOR VIDEO, GRAB THE POPCORN
We do vest a lot in controlling electrons. Maybe it'll be photons turn next?
@@brodriguez11000exactly
@@brodriguez11000 photonic control likely requires completely different materials. So much of this is material science that needs to be "compatible" with lithography techniques.
@@kayakMike1000Hi KayakMike. There has been a major photonics on silicon effort distributed across multiple universities for some years now. They are understandably decades behind transistors along multiple metrics, but they benefit greatly from all the silicon technology + AI. Time will tell how ubiquitous this becomes.
Let me correct that for you: Babe wake up, new asianometry transistor video just dropped
I really wonder why I subscribed this channel with all this in depth knowledge I don't have any use for... But it's fascinating!
Because you're a nerd like the rest of us.
It blows my mind, how precisely we actually get these chips done, how do you get the "edge stage" without brakeing these micro structures or cleaning the whole chip from the left overs?!😮 I love this ❤😊
I am in an Automotive Tool group on social media and they were questioning Taiwan tool quality... I can't believe I had to remind them how the small country makes the highest precision instruments the world has ever known. Arguably the greatest human endeavors come out of Taiwan, akin to the space program and CERN.
True, but that doesn't logically mean that the same precision applies to all Taiwanese manufacturing. Gearwrench is pretty good, but generic Taiwanese tools vary.
@@szurketaltos2693 exactly. China has a functioning space station (amd an imptessive one at that), yet half their roads/buildings are collapsing, an they are known for cheap crap.
To be fair…the precision instruments come from Holland and mirrors from Germany…
@@szurketaltos2693 are you saying I shouldn't blindly follow the patterns my brain sees?
@@dadrising6464 china's space station just looks like an empty shoebox in orbit. they must nee a deck of cards to keep themselves occupied. compare it to the international space station that has all types of equipment absolutely everywhere for tests and experiments.
2nm ! Damn, I got my EE degree less than a year before the 1um barrier was broken, back in 1985.
We stand on the shoulders of giants
The first chip I designed as a post-grad was in a 0.7um process node.
You just have to appreciate all the scientific research done in decades past to make these advances possible only now. Also, I think an increase in competition in this space will further the progress made, and also reduce the risk of losing production capacity due to various outside factors. Semiconductors are vital to modern life and society.
Jon, Thanks for the update. Was wondering where GAA was at from a production perspective after you mentioning it in prior reports.
Samsung already uses it.
Lol, that sudden picture of the IMEC building. My grandma lives across the street from it.
shoutout to your grandma, she can be an insider, if she open a kimchi/ramen/shushi shop and listen to conversation
That tower is a bane on the view of Arenberg Castle.
Small world
Hi grandma!
Worked there. Even cooler from the inside
the GAA design offers great advantages for scaling down semiconductors. The normal problems we experience when scaling down lower and lower is reduced because of the enhanced electrostatics (reduced leakage currents and improved switching speed and energy efficiency). I can't wait to see the next gen semiconductors using this tech. It is going to be crazy!
i am 22 and seriously thinking about studying engineering at this age, thanks to you. i am quite speechless with this content, thanks.
Do it!
If you like being presented with math problems that seriously bake your noodle for several hours before you finally crack it: Do it!
If you hate the problem solving part and just want to get to the dopamine rush, from getting the solution, quickly.... keep playing computer games.
Most EEs at 22 already have their EE Batchelor degree and are deciding if they need to get a Masters or Doctorate degree for the job they want.
You better be very motivated to get in starting at 22.
An alternative is getting in to Integrated Circuit Mask Layout Design.
Get in to that and you'll be down in the weeds battlng the process. It's not hard to get in to that and much less schooling but you wind up with lots of schedule pressure because you are in the critical path.
If you are good with spatial relations and things like Tetris, packing suitcases, grocery bags and you can understand resistors, capacitors and transistors, you might have the talent for it.
With that said you will never have the influence in a company that an EE has even if you design devices and libraries that allow the EEs to design circuits with better electrical characteristics and lower die area. You'll have to reinvent the wheel often because most rookie EEs won't believe that your experience is worth listening to and there is a chance that your job will be replaced by some AI Place & Route tool even if you specialize in full custom analog or you are a guy that runs a Place & Route tool.
I did it and felt like a whore being used for my mind.
But I quit and I prefer mindless work so I can keep my mind to myself. That's a much better way for me to live.
Jump in and make the future for us. :)
You are still very young, sure you should try studying engineering.
Minor correction; at 6:05 you talk about the effects of dielectric permittivity on gate function, and while obviously higher dielectric materials produce a higher capacitance, the electric fields within the substructure are actually *reduced* as an effect of the polarization, which can be essentially described as the realignment of electric charges inside the dielectric that cancels out the external field.
So the actual benefit of using high-k gate dielectric would be?
Is is that the electric field is lower in the volume of the dielectric but then higher at the interface of dielectric-channel?
@@Martinit0 Correct, charge density at the gaussian surface of the electrode increases as relative permittivity increases, increasing total work capacity. It's easier to think about when you look at what we consider ,"charge" in electromagnetism as an imbalance of electrons and protons throughout a system. A dielectric essentially acts as a material with quasi-free electrons; similar to a metal, but instead their movement is limited to their immediate surroundings. When an electric field is applied to the material, the charged particles inside rearrange in order to achieve electrostatic equilibrium, which means there is no imbalance of charge, so the field on the inside from the perspective of the system is zero.
It also increases charge density disproportionate to voltage, meaning increased efficiency, but I'm not sure how pertinent that is to transistor design specifically. More applies to capacitors and electrostatic motors.
9:35 minor correction. Epitaxy is not a deposition technique, it is the process of growing a single-crystal film on top of a different material with similar lattice constants. Epitaxy can be achieved with different deposition techniques such as evaporation or sputtering.
I remember back in 1968 reading a Scientific American article on how to make a transistor by spraying various chemicals on a piece of glass on a hot plate. Things have evolved!
we’ve had MOSFET and now we will have GAAT 😂
Can't believe they didn't call DIBL DrIBL, given what it meant
dude, I cannot imagine your level of energy when you post so many great docs about tech and the economics and/or politics of tech, so often, and with such great ease. congrats.
Amen to that
For the basic drawing of the transistor some sort of PowerPoint Animation might have helped to better visualise the gate getting thinner, source/drain pool becoming shallower/deeper, etc. but regardless loved the video. Thank you :)
TSMC Backplane Power Delivery would act as a flavour than a specific node, and there would be backport possibility for other node.
My understanding is the software has to catch up to make BPD viable.
@@brodriguez11000 The software is already support this. (I can't disclosure more)
@@kangyue9999wait who do you work for or can you not answer?
@@aekue6491 I work for a sub contractor for a big international defence contractor. We have long since been briefed that porting existing GAA designs to BPD-GAA will be, and I quote, "a largely automated process for embedded memory and gate logic, but will require substantial consideration and planning ahead of time for analog circuits".
Since we work almost exclusively in the boundary layer between analog and digital (such is the nature of real-time signal analysis and shaping) we are currently "a little bit freaked out" as we are in mid-stage design of a GAA based solution that would ideally be finalised and rolled out as BPD-GAA, as that offers vastly superior noise characteristics. However, we are only now starting to get the builtin points on what to account for early to facilitate a reasonably straight forward porting process.
Everything is still tightly under NDA from "the big three" but from the gossip I hear the situation is largely identical everywhere: The EDA tools will a breeze for the logic folks (CPUs, GPUs, accelerators, PLCs, FPGAs, etc, etc) but us analog folks (memory controllers, radio spectrum technologies, PCIe/CXL, optic signal modulation, etc, etc) will be the whipping boys as usual. We generally only get good EDA automation and integration of a node once it is no longer relevant for us (aka, once it's mature and cheap enough to make bulk crap products on like wireless doorbells and fridges and what have you).
I hope that satisfies your curiosity, as I can't really divulge anything that is more specific than this.
I remember when MOS/FET’s were new. I was an electronics technician for many years and they were somewhat different to troubleshoot but very reliable.
5:35 “kind of like loud talk from your neighbours in a bar messing with your attempts to say, sweet, romantic things to Siri”
🤣🤣🤣
Thank you. Your explanation was the lightbulb moment for me. I've heard and read a multitude of explanations of goafet transistors and it didn't quite click for me. Thank you for breaking it down so eloquently.
I’d be very interested in seeing a graphical explanation of how these structures are constructed. You had part of an explanation but then it never finished. Either way, your videos are incredible resources!
long story short the screen grid and supressor grid from the vacuum tube era ARE making a comeback.
i missed them. :)
Yes!
Uh... that was a highly entertaining, but also actually accurate, way of looking at it. Thanks for the chuckle!
@@andersjjensenyou know what's really funny? i was talking to a friend and he said "oh boy, i can't wait to use beam-power tetrode mosfets!"
Grok's custom ASICs are using 14nm established process node and demolishing GPU based AI accelerators - these new transistor designs aren't needed for AI acceleration as there's lots more headroom in transitioning to custom ASIC designs with integrated memory for example, than what can be squeezed out of an evolutionary step in transistor design.
How on earth do you produce highly technical and qualitive videos so regularly?
Do you have a team helping you?
Always interesting and informative.
What is this channel I randomly stumbled across? This video was extremely well done. Love it, will definitely check out other videos on the channel
I work as an analyst and your channel is truly one of the rich resources for my learning. You're one of a kind and your videos will forever be a treasure to anyone who wants to learn about these topics. Thanks a lot man!
Both lucid and precise, gotta love it!
4:31 sounds like Officer Dibble from the “Top Cat” TV cartoon ;)
I've only seen a few of your videos but each time a third of the way you get through it you get silly and I love it
EDIT: not silly as in old-school @ThioJoe but silly as in just a little bit fun with the delivery
The amazing part is that they are doing this at the near atomic level.
I was thinking that the next level is to use the photon combined with wavelength and polarization to do switching thereby eliminating EMF issues related to latency and wasted heat energy.
How would that work exactly?
@@talinpeacy7222 It's above my paygrade to specify.
@@talinpeacy7222_m a g i c_
A transistor is not just a switch (on/off). it can also behave like a variable resistor (linear operation). Even if in the field of Digital Electronics, it is always operated (biased) to perform as an on/off switch, the device can also be operated on its linear response characteristics to perform as an amplifier in the analog world. On the input and output sides of a digital circuit we still use transistors as linear devices.
After the junction voltage is overcome, there is a nice linear response of changes in current to voltage (smooth changes in input current produces proportional changes of output voltage), before the transistor goes into saturation (completely On).
If someone ever invented a true 'digital relay', transistors would become obsolete.
We are so lucky to have this channel. Thank You 🙏
Thank you very much for these uploads. Great job.
Excellent presentation. I appreciate the background and detailed descriptions of competing methodology, and as an investor, the anticipated timeline of new methods. Great stuff. Thanks.
2:16 "names are surprisingly descriptive in semiconductor land"
That's something that bugged me in Physics, there's so many effects named after the discoverer like "Hall Effect", "Nyquist noise" and so on.
But you also have Bremsstrahlung and Hohlraum radiation :)
Loved the video, and I greatly appreciate your continuing education of computer science, break-throughs, and history. ❤
Hey just wanted to say your videos are amazing keep up the good work :)
Outstanding as ever - clear, concise and informative.
Thank you for making this extraordinarily clear and interesting video on a subject I wouldn’t have otherwise stuck with, let alone begin to understand.
What I found most exciting about all of this is that this work at the atomic level reveals a nexus chemistry and physics, but also origami!
As you presented each new photographic or diagrammatic depiction of architecture evolutions from FinFET to GaaFET, I began to imagine something like the Forksheet. Hello origami! Then, (whoop!) there it was!
So what theoretically lies beyond 3d transistors?
When you mentioned techniques for 3D chip making borrowed from MEMS, it made me think about how switching photons vs electrons changes things.
So how far are we from building photonic processors of similar density/efficiency?
(Begging forgiveness for my ignorance and possible/likely misuse of terms referenced and engineering concepts please! I’m a technology sales rep and avocational musician, not a theoretical physicist or electrical engineer!)
I work for imec on CFET. It's nice helping to shape the future🙂
🎯 Key Takeaways for quick navigation:
00:41 *🔄 Next-gen transistors.*
03:38 *⚡ Short Channel Effects.*
07:33 *🔄 Gate-All-Around (GAA) transistors.*
11:27 *🌐 GAA vs. FinFET power draw.*
13:52 *⚙️ Intel's Ribbon FET.*
14:32 *🌐 GAA's industry impact.*
15:00 *🔄 Future transistor designs.*
15:42 *🚀 Looking ahead to N2.*
Made with HARPA AI
thank you for being the reason we should normalise bullying
@@skmgeek ??? wtf how is that justified for the reason to normalise bullying?? I think you are the reason why we should normalise bullying.
@@skmgeek Sad
@@lomotil3370 simply don't clutter the comments section with useless ai-generated stuff that barely even helps anyone ❤️
Nice work. You successfully made this knowledge digestible to someone in rural Tennessee. Whomever writes these has a talent for explaining things.
amazing stuff.. its like making a nano casting, sacrificial space to hold up a shape. from linear, to lateral to 3d.. and it is not even farctal geometry. It all has a purpose/destination.
As always, absolutely amazing. TY.
4:40 "Like a rabbit" is hilarious. The pause afterwards is amazing.
Thank you for explaining in an intelligent, thorough and graspable form…I actually understood😅
9:28 This looks pretty insane.
Working on backend packaging but studied nanotechnology… I really need to fight to get into frontend. This video made me more excited than any of the packaging buzz word ( 3D, panel level etc.) .
I thought many recent innovations are in the back end and the back end manufacturing capacity is actually bottlenecking at the moment? (which presumably is why we can't have HBM for consumer GPUs any more)
Always so fascinating ... and if I understood more than a fraction of it, just think of the descriptors I could be using. But since I don't I can't.
But much thanks nonetheless.
2:29 A small correction: MOS stands for Metal Oxide SILICON, not Semiconductor.
Man I have been waiting so long for the GAAfet to be consumer viable! very hyped
I really enjoy your channel it takes me back to my Electronics days but I'm a software engineer now. But I studied electronics when I was young. Its interesting they will be able to get to n2 by using established techniques 30% power gain is significant even if performance was to stay nearly the same. Do you think gate all around will make it into high power devices like desktop CPU's
dude your videos, explanations....perfection.
I'm pretty sure there's a proud asian father in your family.
Great video, thanks for posting.
2:07 Hey, that's Richmond Park! Jon, if you ever visit London, I'll take you to see that gate.
I LEARNED WHAT A TRANSISTOR IS
"Some guy starts playing darts and billiards in a pool hall."
I see the benefit from this GAA is only that one gate controls 3 channels. Just bring benefit to only memory system such NAND that has several fan in - fan out.
Wow! Great stuff! I learned a few things.
Hughes developed this tech in 1985. Good luck finding out what happened to it. :)
Hmm. Nerds like arguing about who did what first, but gate all around at 1 µm is not the same as gate all around at single digit nm. Completely different manufacturing challenge and a whole different pressing need to make it work in order to advance the technology.
There are many MANY semiconductor technologies that were proven in the lab several decades before they became commercially viable. One thing is to do it. Another thing is to do it with such low defect density that you can build anything useful with it. And another thing, yet again, is to be able to do that at several hundred wafers per hour with a method that can be "copy/pasted" to many production lines spanning several fabs.
Any sufficiently advanced technology is indistinguishable from magic
Fascinating - seems like we're approaching limits of scale at some point....this is where someone develops a new material or a new paradigm to take digital manipulation to the next level....optics? Magnetohydrodynamics? Some new graphene variant? Can't wait to find out...
FinFET, then GAAFET, then Forksheet seems to make sense, as there seems to be gains in multiple criteria but CFET seems to have little power efficiency and performance improvements…
I believe the next step is Post-CMOS spintronics / ferro-magnetic related technology based on Magnetic Tunnel Junction (MTJ) (or derived from it) like MRAM, Intel MESO concept, Spintec FESO concept… Semiconductor R&D should be focusing on spintronics instead of CFET as it has a much bigger improvement potential than CFET…
XI in Greek sounds like Kai. not shi. we use it in electrodynamics as relative permittivity
I think "shi" came from a confusion with a Chinese pronunciation.
Many types of transistors. FET as they were describing. Standard, MOS FET’s for power applications. N Channel P Channel FET’s low Power Application.
I like how the relevance of this really pushes everything back into data centers. Welcome back to the age of the mainframe and the thin client. Your rectangle is a brick without a half ton space heater sitting in a warehouse.
some of the best content on the internet. Thank you.
Excellent video. Thanks.
Super interesting topic, is it possible you and I were listening to the same presentation a few weeks back?
Thanks!
Is GAA/MBC the kind of thing that can be back-ported from EUV to DUV to improve density/power/performance of older nodes?
I have no idea how we every figured out how to DO anything with these developments..? It's basically magic
In essence, WW2.
@@Bomkz Eh what? Cold war, I could get some degree, space race and all that. But what does WW2 have to do with the last 50 or so years of semiconductor development?
@@Gameboygenius while yes, technology advanced quickly during the cold war, the _foundations_ for a lot of very _very_ important science fields and technologies were created during WW2, as well as the push towards creating more advanced computers during such times and a lot of very important discoveries. It wasn't until the cold war that we realized how to merge all these advancements done during WW2 to create what would be a mass producible transistor, and eventually, the computer. WW2 also laid the foundations necessary for the cold war to be a thing in the first place as well, and showed america(ns) how science and technology can be very beneficial for war, and coincidentally civilians as well via the trickling down of such discoveries into consumer products. It propelled america into a global superpower who eventually was able to monetarily back a bunch of research and development.
I have a memory from 1992-ish of an adult telling me that computers are alien technology, he reasoned this by saying that no one could fully explain how they worked.
There was no Asianometry at that time so I forgive him.
@@Bomkz Ok, I get your perspective. However. Fundamental physics is important, however, I can easily imagine an alternate timeline where the development was 2-4 times slower. In this timeline, the collective economic interests of the world got complacent and didn't decide to plough in the ginormous R&D investments that it took to get to where we are today. In my view, what happened after WW2 was much more pivotal for the world of electronics.
Hi, great Video! I wonder can we expect such GAA transistors also in analog applications like RF power amps?
While listening to this i had a stupid idea.
How about consturcting a cube of transistors instead of a sheet, and the way you would reach transistors inside the cube is by deploying 2 currents, but the second current is 1 transistor Omega less then the first one.
So basically the current goes trough all the transistors flipping their state over, but a second comming right behind flipping them back on the same path, but since the second is slightly less powerfull it wont be able to flip the last transistor like the first current so that's state will remain in a changed state while all others they went trough revert back to their original, effectivelly only changing a deep transistor.
Now obviously this would technically halv the speed of the processor, however the additional dimension of verticality would multiply the processor output. So just one level would bring back to a regular processor, and a second level (3 levels in total) would already double, while a third level would quadriple the process power, quickly scaling up the processing power.
I don't think heat would be an issue here, as the system already made out of heat transfaring material, it would be harder to cool, and heat up equally fast of how it increases process power, but you would only need better cooling and cooling was the limit of process power anyways so nothing change there, this is more of shrinking the processor but increasing the cooling unit so mass should be likelly equal.
Other question is, how do you govern the current to hit the right transistor as it goes trough others? Simple, electric spin can be easilly lined up with magnetic field, you just use a tiny magnetic field (or even use the systems innate field) to keep it consistent and only let trough electrons that fits trough a spin gate, so their path will be predictable at all times. (they should do this on current processors too anyways).
Sir, I could listen to you say the word "dibble" all day
Also I think that Gate-All-Around will be a revolution on the radiation harden transistors, as we have seen with the resilience of FinFet
15:43 - The field effect trnasistor was concieved and postulated as early as the late 1920'ies. Then however, no semiconductor could be made to sufficient purity, though...
thanks for the effort. I wonder whether you can do a video about DNA microarray chips technology?
I love your work.
I know nothing really about this field, but I will say the video reminded me of watching Gregtech New Horizons let's plays. Take that as a compliment.
Awesome video! Sounds like your audio is clipping
Yay Jon!
Wise beyond his years!!!
😃
I have little idea what you’re talking about, however it is super interesting.
Excellent video. Thank you
“Like a rabbit. Nibl….” 😂
Great storytelling of technical concept, respect!
Thank you for this video
abour Ξ mos for the letter "Xi", it is pronounced like the x in wax, not "see" or "zee"
I've been out of the semiconductor game for a long time. Does anyone have the figures of merit for these transistors?
What FoM are you looking for? As far as I'm aware, unlike with the switch from planar to finfet, the switch to GAA and CFET isn't about individual transistor performance as much as it is about TOR density. As RF designer, everything since 22 nm is a step backwards for my performance (though I hear the high-speed analog guys still get some minor gains).
@JorenVaes I would love to know what the f_t and transconductance looks like. It seems like there is an improvement in output impedance too? I'm just curious how the transistors are better. I haven't seen any numbers for all these nodes, so it's hard to contextualize what's improving and what's the same.
@@ion599I can't comment on Ft, as we tend to not use that that often in millimeter-wave design and work more with Fmax as a metric instead. In general, Fmax has flattend around 300 GHz since 65n, and stayed quite constant until 22 bulk (with exception of 22 FDSOI, which has an Fmax of about 380 GHz). Since finfet, it has dropped back down, afaik the most recent nodes have an Fmax of about 250-ish GHz.
This is mostly BEOL limited though - intel has a special 16nm finfet process optimized for RF, and that has a custom BEOL, and supposedly has a crazy Fmax of like 380-400 GHz.
I believe a colleague of mine, Carl D'heer, has done some work on quantifying this Fmax over technology in his PhD thesis, but I don't know if this is publicly available.
No one can escape from this game without moving out to the forest in survival mode… because each and every moment of your life the semiconductors are all over the place around you… until you get back into the game and start upgrading your knowledge realizing that the game has never stopped haha 😅 I am personally just an enthusiastic player who is not involved in any kind of design but this show is so fun to watch because it has the best presenter in the industry so seriously conscious and so deliciously funny ❤
@@JorenVaesIt's a shame that the process improvements are not creating faster transistors. It would have been nice to have power gain deep into the THz region. Thanks for answering my question!
Perhaps gate signal fields will be shaped with spaced nanowire clusters next?
Semiconductors aren’t called that because they only conduct some of the time… they are called that because they have higher conductivity than an insulator but lower than a conductor
Interestingly (to me anyway) the FET (Field Effect Transistor) is what should have come before the type of transistor which came out first. The idea of the transistor was to replace vacuum tubes and vacuum tubes work on the same general principle as FETs. A static field applied to a screen grid (just like the grid on a screen door) controlling a much larger flow of electrons (emitter to plate). But semiconductor tech wasn't advanced enough to make that readily possible so they went with current control rather than voltage control. The very first "proof of concept" transistor was constructed with a liquid semiconductor. Current control, however, is costly as to wasted power and heat was always a problem. MOSFETs (And better still, C-MOS) can be made such that they only really draw any power when they are switching states. The faster they do the greater the power draw and the greater the heating, which is a big problem today with the newer vertical stacking techniques.
In the analog world, there is still great diversity when it comes to different types of transistors. Both MOSFET and the old school JFET have their uses when high input impedance or low power is needed, but for low voltage noise or high gain (heterojunction) bipolar transistors are often the better choice.
With those channel leakage in mind,i wonder wether there will be an end in shrinking chips or if that shrinking will be still continueing on.
Impressive detail accuracy while not including relatively irrelevant points and peppering everything with humor 👍