DNW Diode Extraction - LVS Clearance (Part-2)

This video contain DNW Diode Extraction - LVS Clearance in English, for basic Electronics & VLSI engineers.as per my knowledge i shared the details in English.
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[@anoo318]

Hi bro
உங்கள் videos மிகவும் பயன் உள்ளதாக இருக்கிறது. தற்சமயம் என்னால் மாவென் சிலிகான் போன்ற institute களில் சேர்ந்து படிக்க இயலாது . உங்கள் உடைய lectures போதும் என நினைக்கிறேன். நன்றி

[@analoglayout]

நன்றி நண்பா

[@raviraju9018]

As a learner of Analog engineer your videos are base to me.
Excellent work sir ..🙏

[@analoglayout]

Welcome

[@rajunroy6512]

sir please make a video in lower node IC layout design
like 16nm, 7nm etc

[@analoglayout]

I have some legal problems uploading lower technology nodes videos

[@rajunroy6512]

valuable information sir

[@tallabhuvanavaibhavreddy7960]

Good information

[@mohdkhairizulkalnain279]

Thanks for the lectures! Really helpful! Will part 3 be available anytime soon?

[@analoglayout]

This week you can expect - part 3

[@yashshah17]

Is 'bad component subtype' error because of failed extraction ? (before modifying the LVS document)

[@analoglayout]

This works only on tsmc library

[@Saikiran-ly2ie]

Hello sir I want to contact you if any information like mail? Please ..

[@analoglayout]

Check description