Going one step further and converting loss to Q^2/2C shows the relationship between the bootstrap capacitor size and loss. Along with your previous video, can you explain why just adding more bootstrap capacity isn’t the solution to both the losses and the large negative spike and subsequent overcharging? It seems like a bootstrap is so much cheaper than a isolated HS driver, that a larger cap should be the first consideration in such designs
I hope you don't mind if I comment as well, The charging losses in Rbst described here are minimal with any practical Cbst value, however, there is additional loss from diode reverse recovery (depending on the switching topology) and junction capacitance of the bootstrap diode. In this example scenario, both can be negligible by using a small schottky for the bootstrap diode, but these losses scale with the bus voltage. With a 400V bus and an ultrafast diode instead (as Si schottkys are generally only practical to ~150V), half a watt of loss from reverse recovery current would not be unrealistic. This may not represent a substantial amount of efficiency loss, though, and this power is coming from the switch node so as long as components are sized to survive the peak currents and dissipation, it can be acceptable. Increasing the size of the bootstrap capacitor provides little benefit for overcharging because the bootstrap circuit is essentially a Vps to switch node peak detector. It will slow down the rate that the high side overcharges, but in steady state, the bootstrap voltage will be approximately determined by the balance of energy rectified during the ringing and the energy consumed per switching cycle. This is dependent on the bootstrap resistor value, but since the bootstrap capacitor's delta V needs to be small to supply the high side gate without droop, its behavior within each cycle is necessarily analagous to a voltage source. It is possible to guard against bootstrap overcharging in other ways. Some half bridge drivers for GaN devices have switches in series with the bootstrap resistor and diode to accomplish this. A switch on the low side can be driven in sync with the low side FET, disconnecting the bootstrap during diode conduction and some switch node ringing. This can also reduce reverse recovery losses as the bootstrap diode is blocked from being forward biased during the high side turn on. A switch on the high side can disconnect the diode before the bootstrap capacitor overcharges excessively. It sounds like Prof. Ben-Yaakov has had poor experiences with the reliability of this method, however, perhaps partly because the switch circuitry can be exposed to considerable transients from the half bridge behavior. Such protection is important for GaN, as the recommended gate voltage and maximum gate voltage are usually only a volt apart, but less critical for silicon MOSFETs as they have a much larger gate voltage margin. It is also worth keeping in mind that significant switch node ringing is also undesirable from an EMI perspective, and unless a true isolated gate driver is used, a large negative switch node transient is likely to exceed the gate driver's high side return to low side return rating as well. On another note, an excessively large bootstrap capacitor can degrade certain startup and transient behaviors, and generally requires a larger capacitor on the low side to be able to charge the bootstrap capacitor up without drooping and possibly triggering UVLOs.
Going one step further and converting loss to Q^2/2C shows the relationship between the bootstrap capacitor size and loss.
Along with your previous video, can you explain why just adding more bootstrap capacity isn’t the solution to both the losses and the large negative spike and subsequent overcharging? It seems like a bootstrap is so much cheaper than a isolated HS driver, that a larger cap should be the first consideration in such designs
I hope you don't mind if I comment as well,
The charging losses in Rbst described here are minimal with any practical Cbst value, however, there is additional loss from diode reverse recovery (depending on the switching topology) and junction capacitance of the bootstrap diode. In this example scenario, both can be negligible by using a small schottky for the bootstrap diode, but these losses scale with the bus voltage. With a 400V bus and an ultrafast diode instead (as Si schottkys are generally only practical to ~150V), half a watt of loss from reverse recovery current would not be unrealistic. This may not represent a substantial amount of efficiency loss, though, and this power is coming from the switch node so as long as components are sized to survive the peak currents and dissipation, it can be acceptable.
Increasing the size of the bootstrap capacitor provides little benefit for overcharging because the bootstrap circuit is essentially a Vps to switch node peak detector. It will slow down the rate that the high side overcharges, but in steady state, the bootstrap voltage will be approximately determined by the balance of energy rectified during the ringing and the energy consumed per switching cycle. This is dependent on the bootstrap resistor value, but since the bootstrap capacitor's delta V needs to be small to supply the high side gate without droop, its behavior within each cycle is necessarily analagous to a voltage source.
It is possible to guard against bootstrap overcharging in other ways. Some half bridge drivers for GaN devices have switches in series with the bootstrap resistor and diode to accomplish this. A switch on the low side can be driven in sync with the low side FET, disconnecting the bootstrap during diode conduction and some switch node ringing. This can also reduce reverse recovery losses as the bootstrap diode is blocked from being forward biased during the high side turn on. A switch on the high side can disconnect the diode before the bootstrap capacitor overcharges excessively. It sounds like Prof. Ben-Yaakov has had poor experiences with the reliability of this method, however, perhaps partly because the switch circuitry can be exposed to considerable transients from the half bridge behavior. Such protection is important for GaN, as the recommended gate voltage and maximum gate voltage are usually only a volt apart, but less critical for silicon MOSFETs as they have a much larger gate voltage margin.
It is also worth keeping in mind that significant switch node ringing is also undesirable from an EMI perspective, and unless a true isolated gate driver is used, a large negative switch node transient is likely to exceed the gate driver's high side return to low side return rating as well.
On another note, an excessively large bootstrap capacitor can degrade certain startup and transient behaviors, and generally requires a larger capacitor on the low side to be able to charge the bootstrap capacitor up without drooping and possibly triggering UVLOs.
Good points. Thanks for sharing.
so nice
Thanks
👍🙏❤️
Thanks
Thanks to femboyee
Indeed