The timestamps for the different topics covered in the video: 0:25 Dual-Slope ADC advantages and limitations 1:18 Working of Single Slope ADC 5:04 Limitations of Single Slope ADC 6:32 Working of Dual-Slope ADC 14:00 Conversion Time of Dual-Slope ADC
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thank you sir this is really helpful my exam will be on couple of dayss and i wathed alsost all vidios on the topic but thats where i undestood the topic very clearly
I couldnt understand the relation between the positive slope of the integrated output and the negative sign of the reference voltage. Why we said that the slope is positive because of the negative Vref? At the time 2.13 in the video.
The Dual slope example is quoted for Vmax of the ADC range. A fixed time period sampling of Vin with counter effective on T2 slope only will make the operation more practical. Otherwise an excellent video.
The time duration for the input voltage is always fixed. The input signal will be integrated until the counter reaches (2^N -1). So, the time duration for Vin is fixed only.
Thank you for the lecture. I appreciate your efforts. For T2=N*Tc where you meant N is some output from the counter that could be between 0-2^N-1. Here, the notation 'N' is confusing. Suppose, for 5-bit Dual Slope ADC N is 5. That means, T2 is 5 Tc cycles? This could have been something more better.
Hello sir can you please made videos on the topic of digital modulations I.e, pulse code, delta modulation, adaptive delta modulation.... Please sir....
As soon as the output of the integrator crosses the Vin, the output of the comparator becomes low. And further counting will stop. (As mentioned at 4:53) . And the integrator capacitor will get RESET. I hope it will clear your doubt.
How to switching the switch from vin to vref and can you plz give a small example on dual slop adc can plz take vin is some value and vref is some value and output will be analog form
the circuit is reset before conversion after switching on the input voltage is selected and integrated over a period determined by RC time constant and a certain voltage output is obtained for a certain time period than switch is moved to select the reference voltage. as reference voltage is negative below zero it is integrated over time period till the output of integrator becomes zero
If my exam question ask me to "explain dual slope dvm" so can I explain "dual slope ADC"? Means are both the terms synonym of each other or if there is any difference,then tell me the difference. 🙏🙏
Yes, I have got so many requests for the notes. And very soon will provide the notes for all the topics. Some of the notes have been updated on the website. For more info, please visit: www.allaboutelectronics.org
When ADC is used with only positive reference voltage then we need to ensure that, the input is positive only. If input is time varying or AC, then we need to provide the DC offset to ensure that it is positive. But some ADCs can be configured in the differential mode. And in such case, input can be applied from - Vref/2 to + Vref/2.
Sir,in dual slope adc vin is unknown and we are integrating for fixed period of time ..so how counter will start count from 0000 to 1111 means 2^n-1? Bcz overflow become high when count exceeds from 1111.
Once the overflow bit becomes high during the time T1, the counter will get reset to 0000. That means during the time T2, it will start from 0000. I hope, it will clear your doubt.
The input is Vref, but the output of the integrator is compared with the input of the comparator. At some T, the output of the integrator is equal to the Vin ( input of the comparator). I hope it will clear your doubt.
The different types of ADC use, different types of techniques for the conversion. The dual-slope ADC does not require any DAC for the conversion. (Unlike Counter type ADC) and it provides a good resolution. So, it is relatively cheap compared to other types of ADCs for the same resolution. And mostly it is found in the Digital Multimeters.
Its shows the n clock cycles to reach the output to zero. During T1, the integrator integrates the input voltage. T2 shows the time required by the integrator to reach to 0V. That's n clock cycles (Where n is some counter output (between 0 to 2^N -1). I hope it will clear your doubt.
Actual input to ADC system could be anything. The input to the ADC is the sampled value by the sample and hold circuit (as I mentioned in the introductory video). And SAH circuit should hold that value till the end of conversion. I hope it will clear your doubt.
Here please do not get confused with the N with n-bit counter. N is the count value of the counter. n is the number of bits of the counter. I should have used different N for both n-bit counter and count value. That means T1= 2^n X Tc and T2 = N x Tc. I hope, it will clear your doubt.
far better than my lecturers.I learn so much more with you in 20 min more than 2 hours in his class.Thank you so much
The timestamps for the different topics covered in the video:
0:25 Dual-Slope ADC advantages and limitations
1:18 Working of Single Slope ADC
5:04 Limitations of Single Slope ADC
6:32 Working of Dual-Slope ADC
14:00 Conversion Time of Dual-Slope ADC
The most concise and well explained video I've ever seen covering basics to higher level. Thank you so much!!!
This is the perfect explanation of ADC. You have cleared my doubts. All other ADC videos are trash.
Couldn't be more precise. Thanks a lot for explaining. This channel is my go to guide for any basic doubts in analog electronics.
You probably dont care but does any of you know a method to get back into an instagram account?
I was stupid lost my account password. I would appreciate any tricks you can offer me.
@Philip Orlando Instablaster ;)
@Zaiden Demetrius i really appreciate your reply. I got to the site through google and I'm in the hacking process now.
I see it takes quite some time so I will get back to you later when my account password hopefully is recovered.
@Zaiden Demetrius it did the trick and I now got access to my account again. I am so happy!
Thanks so much you saved my ass :D
@Philip Orlando you are welcome xD
I've cleared my all doubts from this video.. Thankuu so much sir. 🙏
thank you sir this is really helpful my exam will be on couple of dayss and i wathed alsost all vidios on the topic but thats where i undestood the topic very clearly
Fantastic explanation i read two to three books before seeing this video. great explanation...
After watching this video all doubts are cleared
Very well explained sir
Thanku so much
One of best vedio for understanding dual slop ADC
I finally understand this topic. and my exam is in a couple days, thank you!
Good luck for the exam.
thanks for the crystal clear explanation
6:34 dual slope ADC
Dear sir Ur class is easier understand
this legitimately blew my mind instead of blowing my head off like in class
Thank you boss, it was very useful for understanding it for my college seminar topic XD
Little correction 8:00 (after time t2)
Why is the input signal getting integrated for 2^n, shouldn't it get integrated for 2^n-1?
The counter will count from 0 to 2^N-1, implying that total count would be 2^N (for example for 0 to 3 total count is 4)
Thank you very much, this is an excellent video!!
Very nice..
I see first video which is completely explaining the whole process
Thank you so much for this video. You told this subject very clearly.
Your name sounds Turkish?
Thank you so much sir you made us to understand this topic
very easily😁
Very well explained 👍🏼
Excellent 👌 explanation. Good command over the concepts.
Very well explained sir
Thank you so much for your brilliant explanation !!
Wow, such a simple explanation. Quality content it is. Thankyou ! ☺️
Well explained 👏 👌 👍
Sir can you please explain how the conversion time has become 0.8ms at 15:36sec
Its 2^(12+1)/ 10 MHz
sir at 10:30 do u mean that second slope that is slope at T2'' will remain parallel to slopes at T2' and T2
I appreciate the explanation of this video, but you never mentioned anything about the switch across the capacitor? please do mention about it.
Thanks
I couldnt understand the relation between the positive slope of the integrated output and the negative sign of the reference voltage. Why we said that the slope is positive because of the negative Vref? At the time 2.13 in the video.
go and watch integrater vidio
The Dual slope example is quoted for Vmax of the ADC range. A fixed time period sampling of Vin with counter effective on T2 slope only will make the operation more practical. Otherwise an excellent video.
The time duration for the input voltage is always fixed. The input signal will be integrated until the counter reaches (2^N -1).
So, the time duration for Vin is fixed only.
That explains it. But how to convert to the digital output? Any examples?
Please check this playlist. Some examples are also covered.
th-cam.com/play/PLwjK_iyK4LLCnW-df-_53d-6yYrGb9zZc.html
Thanks for your support for sem
Aaj to concept hi clear ho gaya.......
Thank you for the lecture. I appreciate your efforts. For T2=N*Tc where you meant N is some output from the counter that could be between 0-2^N-1. Here, the notation 'N' is confusing. Suppose, for 5-bit Dual Slope ADC N is 5. That means, T2 is 5 Tc cycles? This could have been something more better.
Yes, I should have used different nomenclature for both to avoid the confusion .
@@ALLABOUTELECTRONICS Thank you for replying.
Hello sir can you please made videos on the topic of digital modulations I.e, pulse code, delta modulation, adaptive delta modulation....
Please sir....
Explain .. when counter overflow occurs ,it switched the input via flipflop
Superb explaination sir
Excellent 👌👍
1:54 ,Why the reference voltage is integrated untill Vo=Vin?
As soon as the output of the integrator crosses the Vin, the output of the comparator becomes low. And further counting will stop. (As mentioned at 4:53) . And the integrator capacitor will get RESET.
I hope it will clear your doubt.
How to switching the switch from vin to vref and can you plz give a small example on dual slop adc can plz take vin is some value and vref is some value and output will be analog form
Will cover this type of example very soon on the second channel.
effect of input offset of the comparator on the opeartion can u explain
Thank you for this wonderful vedios sir
crystal crisp clear
why should the reference voltage be integrated? before giving it as input to the comparator in single slope ADC
Well explained sir
Shouldn't be the output of the integrator be positive when -Vref is applied?
Yes, it is positive. Please check at 2:23.
But at 12:58 it says that the output of the integrator is still negative. Why?
I didnt get u at switch is closed
What happens??why we use switch over their??
the circuit is reset before conversion after switching on the input voltage is selected and integrated over a period determined by RC time constant and a certain voltage output is obtained for a certain time period than switch is moved to select the reference voltage. as reference voltage is negative below zero it is integrated over time period till the output of integrator becomes zero
If my exam question ask me to "explain dual slope dvm" so can I explain "dual slope ADC"? Means are both the terms synonym of each other or if there is any difference,then tell me the difference. 🙏🙏
Yes you can write, as it works on the same principle.
great video thanks
best explanation bro❤ but little suggestion to you that please share your lecture notes also for remembering all this things😅
Yes, I have got so many requests for the notes. And very soon will provide the notes for all the topics. Some of the notes have been updated on the website. For more info, please visit: www.allaboutelectronics.org
Does Vref have to be fed to inverting input? If yes, then why?
Yes, with that you will get the second slope. Please watch from 6:32 onwards, you will get it.
Is the Vref also an AC signal with same frequency as Vin?
No, it's DC VOLTAGE. And it should be very stable.
@@ALLABOUTELECTRONICS But Vin is AC, and it will change polarity. So what will happen when negative cycle starts?
When ADC is used with only positive reference voltage then we need to ensure that, the input is positive only. If input is time varying or AC, then we need to provide the DC offset to ensure that it is positive.
But some ADCs can be configured in the differential mode. And in such case, input can be applied from - Vref/2 to + Vref/2.
@@ALLABOUTELECTRONICS
But here the reference voltage is negative and not positive
can you also provide the slides which you are using
Sir,in dual slope adc vin is unknown and we are integrating for fixed period of time ..so how counter will start count from 0000 to 1111 means 2^n-1? Bcz overflow become high when count exceeds from 1111.
Once the overflow bit becomes high during the time T1, the counter will get reset to 0000. That means during the time T2, it will start from 0000. I hope, it will clear your doubt.
What is the conversion time of single slope ADC
As I mentioned at 3:12, the conversion time of single slope ADC is (RC x Vin / Vref)
sir can you make a vidio serires about pid controllers plz sir it is really nessesry
Can anyone help me with the design of both positive and negative signal, from DC to 500 Hz using IVC102
If my vref is 2 and my vin is 5 how to work single slop can you plz explain
@3:12 how output of integrator Vo comes to Vin..in time T, bcoz as per input we only applied Vref
The input is Vref, but the output of the integrator is compared with the input of the comparator. At some T, the output of the integrator is equal to the Vin ( input of the comparator). I hope it will clear your doubt.
I think we have to connect T-flip flop after counter ....for toggling when the output of counter -1111..🤔
yes
Why we use integrator. normal counter type we don't use Any integrator so can you plz explain important of that integrator in this circuit
The different types of ADC use, different types of techniques for the conversion.
The dual-slope ADC does not require any DAC for the conversion. (Unlike Counter type ADC) and it provides a good resolution.
So, it is relatively cheap compared to other types of ADCs for the same resolution. And mostly it is found in the Digital Multimeters.
@@ALLABOUTELECTRONICS
Can you plz give a small example on single slop asc
Hello sir ,
please made on video sigma delta ADC .
Yes, will also try to make video on it.
Thank U Sir....👍🙂
Good video! Keep up!
Sir you are going so speedly. Please try to reduce the speed.
but I see the video at 2X speed!
Adam Bruder, hast wie ein Löwe geredet, hamdulilah hab alles verstanden, möge Allah dich rechtleiten und deine Sünden vergeben AMIN
amazing
Best explanation ever!🫶🏽
14:26 how T2=N*Tc
Its shows the n clock cycles to reach the output to zero. During T1, the integrator integrates the input voltage. T2 shows the time required by the integrator to reach to 0V. That's n clock cycles (Where n is some counter output (between 0 to 2^N -1).
I hope it will clear your doubt.
@@ALLABOUTELECTRONICS Thank you
@@ALLABOUTELECTRONICS if possible please make a video on sigma Delta ADC( includes modulator,decimator, and current starved VCO)
Sir how can we say that exactly n clock cycles ..It is depend upon Vref
Can someone explain why T2 = N*Tc ?
Do the video on cascode
Haaa do it
what is the vin ? is it sine wave or square wave?
Actual input to ADC system could be anything. The input to the ADC is the sampled value by the sample and hold circuit (as I mentioned in the introductory video). And SAH circuit should hold that value till the end of conversion.
I hope it will clear your doubt.
Bc of this written words most of the time diagrams and equation can't be seen.please take care of this rhing
If required, you can turn off the subtitles manually in the video settings.
how T2 is N*Tc?
Here please do not get confused with the N with n-bit counter. N is the count value of the counter. n is the number of bits of the counter. I should have used different N for both n-bit counter and count value. That means T1= 2^n X Tc and T2 = N x Tc. I hope, it will clear your doubt.
bhai tere words samajh nhi aa rahe
Not clear
I am confused alot in this video
@2:36
tq
sir can you make a vidio serires about pid controllers plz sir it is really nessesry
Well explained 👍