PD Lec 49 - Introduction to CTS | Clock Tree Synthesis | VLSI | Physical Design

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This is a 49th video on physical design series and mainly related to clock tree synthesis. In this video, we discuss the introductory content for clock tree synthesis.
Please ask your doubts in comments.
Placement in Physical Design [Interview Quiz]:
forms.gle/r7yC...
Website Link: vlsiacademy.in/
STA Quiz Link: forms.gle/ZHjv...
PD Lecture series playlist:
• VLSI Physical Design F...
Here's a link for Full STA series [till advanced level]:
• STA Bootcamp: Static T...

[@yashwanthyerram7595]

Please explain more about virtual(ideal) and real clock sir.

[@huhuu-mq1tx]

thanks for this, this is really helpful!

[@truptichauhan3634]

Thanks for sharing

[@not_yoursubham]

ans - (d) clock has more load and power critical

[@huhuu-mq1tx]

what does latch up issues mean? do you have a video on this?

[@huhuu-mq1tx]

@@VLSIAcademyhub thank u! :D

[@Harish-fi5nb]

D