PD Lec 51 How to balance skew and latency? | CTS | Clock Tree Synthesis | VLSI | Physical Design

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  • เผยแพร่เมื่อ 28 พ.ย. 2024

ความคิดเห็น • 5

  • @SathishKumar-gi7oq
    @SathishKumar-gi7oq 2 ปีที่แล้ว

    Hi team.
    Good work VLSI Academy.. your videos are great and useful. Need more videos about physical Design (PD) in depth sir . Thank you

  • @srinulucky743
    @srinulucky743 ปีที่แล้ว

    in one design skew is more and another design latency is more which you will prefer

  • @ramsaivelidandi6777
    @ramsaivelidandi6777 2 ปีที่แล้ว

    hi sir , can you explain about skew groups and how to specify the skew groups..

  • @illuruvigneswarreddy9469
    @illuruvigneswarreddy9469 ปีที่แล้ว

    can u pls post these slides

  • @SathishKumar-gi7oq
    @SathishKumar-gi7oq 2 ปีที่แล้ว

    Hi team.
    Good work VLSI Academy.. your videos are great and useful. Need more videos about physical Design (PD) in depth sir . Thank you