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Semi Tech
India
เข้าร่วมเมื่อ 9 พ.ค. 2019
This is Niranjan Kumar. Welcome to our Semi Tech channel.
I Work at Analog Devices as a Design Evaluation Engineer. Ex-Intel | RVCE | BMSCE
🔌 Join me as we explore the fascinating world of electronics and technology! 🌟
🎓 With a BE in Electronics from RVCE and an MTech in VLSI Design & Embedded System , I bring a wealth of knowledge and industry experience to the table. 💡
💼 Worked at world-leading semiconductor companies like Intel and Analog Devices, Inc., I'll share insights and expertise gained from my journey.🌠
🔍 Whether you're a student, professional, or tech enthusiast, I'm here to help you navigate the ever-evolving field of electronics and expand your understanding.📈
🌐 Don't forget to visit my Instapage @edutech for additional resources, articles, and more!📲
📧 For inquiries, collaborations, or questions, reach out to me at educraft.vision@gmail.com. Let's connect and foster a vibrant community of electronics enthusiasts!🤝
#SemiTech #semitech
I Work at Analog Devices as a Design Evaluation Engineer. Ex-Intel | RVCE | BMSCE
🔌 Join me as we explore the fascinating world of electronics and technology! 🌟
🎓 With a BE in Electronics from RVCE and an MTech in VLSI Design & Embedded System , I bring a wealth of knowledge and industry experience to the table. 💡
💼 Worked at world-leading semiconductor companies like Intel and Analog Devices, Inc., I'll share insights and expertise gained from my journey.🌠
🔍 Whether you're a student, professional, or tech enthusiast, I'm here to help you navigate the ever-evolving field of electronics and expand your understanding.📈
🌐 Don't forget to visit my Instapage @edutech for additional resources, articles, and more!📲
📧 For inquiries, collaborations, or questions, reach out to me at educraft.vision@gmail.com. Let's connect and foster a vibrant community of electronics enthusiasts!🤝
#SemiTech #semitech
What is FinFET? MOSFET | GAA
This video provides a comprehensive overview of FinFET and MOSFET technologies. We delve into why FinFET emerged as a solution to the limitations of traditional MOSFETs, exploring the need for innovation in transistor design. Additionally, we highlight the key advantages of FinFET over MOSFET, such as improved performance, better power efficiency, and scalability for modern semiconductor applications. Stay tuned to understand the technology driving the evolution of today's microchips!"
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why is 50 ohm termination important? Significance of impedance matching?
มุมมอง 3434 หลายเดือนก่อน
Ever noticed your function generator outputting twice the programmed voltage? This curious phenomenon highlights the critical role of impedance matching in electronic circuits. In my latest video, I dive into the importance of 50-ohm termination and why it's key to accurate signal measurement. We’ll explore how 50 ohms strikes a perfect balance between 77 ohms, which minimizes signal loss, and ...
Denoising the signal | FFT Lecture- 4
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Title: Filtering Out Specific Frequencies from a Signal Using FFT in Python In this video, we show you how to filter out a specific frequency from a signal using Fast Fourier Transform (FFT) in Python. This technique is useful in signal processing to remove unwanted frequencies from a signal. Code Breakdown: Calculate Points per Frequency: We determine the number of points per frequency using t...
Fast Fourier Transform of sinusoidal signal | FFT Lecture - 3
มุมมอง 1865 หลายเดือนก่อน
In this video, we demonstrate how to perform a Fast Fourier Transform (FFT) on a normalized sine wave that has been mixed with noise. This process is essential in signal processing to analyze the frequency components of a signal. Code Breakdown: Setup: We define the sample rate (SR) and duration (T) of the signal. We calculate the number of samples (N) in the signal. FFT Calculation: We use the...
Mixing of audio signals- Pure tone +noise tone | Lecture- 2
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Adding Noise to a Sine Wave and Normalizing the Result In this video, we explore the process of generating a sine wave and adding noise to it using Python. We then normalize the resulting mixed signal and visualize a portion of it. Code Breakdown: Generate Sine Wave and Noise Tone: We generate a 500 Hz sine wave. We generate a 25,000 Hz noise tone and scale it down by multiplying it by 0.3 to r...
How to Generate a Sine Wave in Python | Step-by-Step Tutorial | Lecture 1
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Welcome to our Python programming tutorial! In this video, we will walk you through the process of generating a sine wave using Python. Whether you're a beginner or an experienced coder, this step-by-step guide will help you understand the fundamentals of sine waves and how to create them using simple Python code. 📌 What You'll Learn: Understanding sine waves and their applications. Importing n...
KVL Examples- -Lecture 4 | Op amp | GATE | VLSI Interview
มุมมอง 2606 หลายเดือนก่อน
This video demonstrates one of the applications of KVL with the help of operational amplifier. It underlines the key condition required for conduction of current .Moreover, this video gives an idea of voltage amplifier.
KVL Example - Lecture 3 | Network Theory | GATE | JEE
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In this video, we dive into Kirchhoff's Voltage Law (KVL) using a practical example to illustrate its application. We explore why understanding loops is crucial for current flow analysis, providing clarity on fundamental electrical principles.
KVL Examples - Kirchhoff's voltage law #2
มุมมอง 896 หลายเดือนก่อน
"This video provides a clear explanation of Kirchhoff's Voltage Law (KVL) using two different problem illustrations. Each problem is approached using two distinct techniques: the conventional method and the effective voltage method. In the conventional technique, we analyze the circuit by setting up equations based on loop currents and resistor voltages. On the other hand, the effective voltage...
Kirchhoff's Voltage Law | KVL
มุมมอง 906 หลายเดือนก่อน
In this video, I delve into the core principles of Kirchhoff's Voltage Law (KVL). KVL states that the algebraic sum of voltages around a closed loop is zero. Moreover, I explore the concept of energy conservation through the lens of thermodynamics, illustrating why this principle holds true in electrical circuits. Join me as we uncover the fundamental connections between electrical theory and t...
What is PSRR? Power Supply Rejection Ratio
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What is PSRR? Power Supply Rejection Ratio
Texas instruments interview Experience | Analog design Engineer - Nikhil Koneru
มุมมอง 3448 หลายเดือนก่อน
Texas instruments interview Experience | Analog design Engineer - Nikhil Koneru
Texas Instruments Interview Experience | Embedded Software Engineer
มุมมอง 6Kปีที่แล้ว
Texas Instruments Interview Experience | Embedded Software Engineer
Transient Response of RC Circuit | PART 5
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Transient Response of RC Circuit | PART 5
Transient Analysis of RC CIRCUIT with Pulse input- Part 3 | Analog Design Interview | TI
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Transient Analysis of RC CIRCUIT with Pulse input- Part 3 | Analog Design Interview | TI
RC Circuit with Pulse Input- Part 5 | VLSI interview |Analog Design Interview preparation
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RC Circuit with Pulse Input- Part 5 | VLSI interview |Analog Design Interview preparation
RC Circuit with Pulse Input- Part 4 | VLSI interview |Analog Design Interview preparation
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RC Circuit with Pulse Input- Part 4 | VLSI interview |Analog Design Interview preparation
RC Circuit with Pulse Input- Part 3 | VLSI interview |Analog Design Interview preparation
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RC Circuit with Pulse Input- Part 3 | VLSI interview |Analog Design Interview preparation
RC Circuit with pulse input ( part 2) | Analog design Interview
มุมมอง 234ปีที่แล้ว
RC Circuit with pulse input ( part 2) | Analog design Interview
Why does the capacitor not allow the sudden change in voltage?Does current through a capacitor flow?
มุมมอง 1.2Kปีที่แล้ว
Why does the capacitor not allow the sudden change in voltage?Does current through a capacitor flow?
Some suggestions: if u do timestamp in your video , it will be very helpful for us ❤ Your content....share more informational videos in future
Good try. but things are not clear
Kindly Explain, how come the valence band is placed above the conduction band? Kindly rectify in the video. The condition for Vg<Vth refers to the weak inversion region. This suggests the intrinsic fermi level should bend below the quasi-fermi level (surface potential = built-in-potential), consequently bending the conduction band close to the quasi-fermi level. But in any case I can't see why the valence band should be above the conduction band?
Thank you for wonderful explanation
This composure is 99.999 % keep up the good work
thanks for sharing
thank you sir
❤❤
Super viedio ❤❤❤
is drain induced barrier lowerig and punch throw effect are same
at last part, you didn't explain properly.
you are teaching like gem, please continue on adc
Sure, will put more videos on ADC. Thank you !
Question pdf?
After lot of search here is a nice explanation
Thanks for such an amazing video...keep uploading ❤
Oh with this i can now play geometry dash most better
Thank you Sir Great conpect Iin=Iout
I do not know it! Sorry
hi sir ,good morning. Wr we r using this pyton code sine wave generation
We're going to use this FFT calculation in upcoming videos
@@semitech01 ok thank you brother
@@semitech01 good explanation
Ra=18/(10+8)=1ohm...Answer
That's right !
thank you for good explanation,i need some guidance regarding cadence tool sir
Welcome. You can write me at educraft.vision@gmail.com ...will do the needful
good morning sir
Morning
Thank you, this was very helpful!
My pleasure ! Happy learning 🎆 Thanks for watching
Good exply
Wow
Nice
good explanation...,pls keep going on
Keep It Up🎉 I think We have been Met in any lab? From NIT JSR?
Thank you Shivam ! Not really from NIT JSR
Great learning
thank you brother
Is there any alternative method to replace Bottom silicon insulator technoligy to more enhanced for reduce threshold leakage
Is there any alternative method to replace Bottom silicon insulator technoligy to more enhanced for reduce threshold leakage
yes , using High-k/Metal Gate (HKMG) Technology: High-k dielectrics and metal gates can be used to replace traditional silicon dioxide gates. High-k materials have a higher dielectric constant, which allows for a thicker gate dielectric without compromising performance, thereby reducing gate leakage. Other techniques are GAA, FinFETs, Fully depleted SOI . Hope it helped. Thanks for watching the video.
@@semitech01 is it possible to use high k/metal gate in Gaafet
Yes, it is possible to use high-k/metal gate (HKMG) technology in Gate-All-Around Field-Effect Transistors (GAAFETs) to reduce leakage current. The integration of high-k dielectrics and metal gates in GAAFETs can significantly enhance their performance by improving gate control and reducing gate leakage. For more you can refer below paper www.researchgate.net/publication/4357573_45nm_High-k_metal_gate_strain-enhanced_transistors
@@azamatbezhan1653 Yes, it is possible to use high-k/metal gate (HKMG) technology in Gate-All-Around Field-Effect Transistors (GAAFETs) to reduce leakage current. The integration of high-k dielectrics and metal gates in GAAFETs can significantly enhance their performance by improving gate control and reducing gate leakage. To know more you can refer : www.researchgate.net/publication/4357573_45nm_High-k_metal_gate_strain-enhanced_transistors
@@semitech01 best answer
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Gd explanation
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I didnt gey why output wont depends on Vt when NMOS connected in Pull down network ?? !!!!!!!
The output won't depend on Vt because we are considering the NMOS to be ideal, so it acts as a short-circuit path when we apply Vdd as input, and the load capacitor will discharge through the NMOS
But sir, if we want zero resistance then we shouldn't put any resistor over there?
yes, ideally it should be zero but practically it should be of negligible resistance..in the order of few ohms..
αυτό έψαχνα. χρήσιμο για την κατανόηση των πρακτικών πτυχών. Ευχαριστώ
Thank you sir
please provide his social media handle so i can connect with him and follow him for more tips
Way of explanation dynamic range of adc is so good
Thank you for this good instructional video :)
Glad it was helpful!
Proud that you're my friend, truly inspiration and insightful
Jab voltage vds apply kr rhe h toh vdg kyo liya ???
Bcz drain leakage current is induced by the gate. Apparently, as vds increases Vdg increases as well..which leads to overcome of gate and drain region beneath the gate. Which leads to leakage current.( As explained in the video) Thereby without taking Vdg into context one can't analyse it. Hope you are able to comprehend.
Mast session sir❤
Thank you
Link to the video RC Circuit with Pulse input -Part 3 th-cam.com/video/HByHVJNbEPo/w-d-xo.html
helpfull sir
th-cam.com/video/JP7Ag9tk8vc/w-d-xo.html
Brilliant explanation sir .
Thanks! Great Learning ..
Thanks a lot
Most welcome!