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Hello,do you know which material in the library should be used for METGLAS Alloy 2605SA1?Thank you.

The power requirement to gate drive high power mosfet can reach 2W as you described using the total gate charge and the switching frequency. I came across the same family of isolated dcdc chips for gate driving murata. My question is, the brief peak current the Mosfet requires is sometimes as high as 2A if high switching frequency is to be achieved, will these murata chip be able to supply that?

I enjoy this webinar. it is extremely useful from engineering view point. Can you do another webinar on actual high power for example 2-3KW output convertor

Excellent！Good job.

Excellent Jose. 👍

Thanks for your sharing. In the presentation, talking about the potential parasitic turn-on issue for the low side mosfet. Is it the same potential issue for high side mosfet in half bridge configuration? Thank you.

Hello can I get a copy of your white paper just for my study purpose

Ah yes, the Traxxas E-maxx...brings back memories! Looking forward to this.

Totem Pole PFC: if you turn on a mosfet it also shorts the body diode. the mosfet shorts in both directions, so there is no current in the body diode. in high curent recitifiers mosfets are acterly used as rectifiers when they are turn on there is 0V over the body diode.

Hey guys thanks for this series it’s excellent! Would love to see more videos on gate drive design with emphasis on the different protection mechanisms that can be implemented. Again, thank you!

Grateful for what have you done. I have a small doubt though, how did you measure AC resistance i.e. @100kHz could help me figuring this out. I have designed a component but I wanted to it validate with my simulation results. So could you help me how to measure AC resistance. I have impedance analyzer with me but the real part of the impedance measured is giving effective resistance but not the winding resistance alone.............Thanks in advance

youtube.com/@IndustryInsights360?si=eETLCE7yYvUDM2G4

how to design switching frequency max 400Khz of gate dirve circuit in power electronics system.

What is a good starting value to put in the first pass design for a CM choke,(for say filtering higher frequency >2MHz) , is there a rule of thumb value ? Another unrelated question - I have seen CM chokes connected to the two ends of a shunt resistor, in a design where the shunt resistor sits on one PCB and the voltage across the shunt connects to another PCB via cables (and is eventually connected to say an ADC)?

Thank you for sharing the brief insight

Very useful presentation ! Can you elaborate on why the sample frequency being same as switching frequency helps reduce noise ?

will this type of presentations continue in 2024?

Please do another one on the gate driver circuit design step by step with an example.

Hello, Very nice presentation! Could you please make a video on active inrush limiters using p type mosfets when there are bulk capacitors in DC-DC Converters? It would be helpful. Thank you.

sir what you done for entering the coordinates at starting. which key was pressed?

how we determine the PF?

Thanks for the nod towards FEMM and your tutorial efforts. I have been looking for opensource FEA, and this seems a good start. Having said this, in trying to apply the tool to an existing personal project I straight away hit some issues. Firstly I note that you have used an E core from TDK, this has a 'planar' symmetry. This I assume is most suitable for a 2D tool like FEMM. I have been running my LTSpice simulations for my LLC converter using a TDK ETD core. This has a sort of truncated axisymmetric shape. Have you specifically avoided such ferrite shapes. If not any tips about how to model them. If I choose an axisymmetric problem then the depth option is greyed out. Presumably the defined plane is spun around a vertical axis. But I would then have a shape which is nothing like an ETD core. I assume this is a basic limitation of a 2D tool such as FEMM?

he called my name :umesh" at 42:28

Great ! Thank you very much

Excellent presentation. You are sharing the state of the art of designing the converters with your valuable experience. I really liked all the videos and already subscribed the channel. I have only one suggestions that MATLAB has capability to make the scope background white from black and also you can change the width and colors of the plots. This will help viewers to digest it more easily. Other than that it is 10/10 presentation.

Great overview, much appreciated!

hi thank you so much about your knowladle. can ı ask a question, in 100khz we calculate 0.21mm skin depth. after that how we select optimal diameter you said 0.42.Do we multiply the skin depth directly by 2? in video 37m What I mean is, if there is a skin depth of 0.21mm, how can I calculate the cross-sectional area required to avoid skin effect?

Great seminar. Thanks, very informative. What is your thought with regards to the immersion cooling of power electronics components? It probably simplifies thermal design and increase the heat transfer. Are there particular things to watch out when considering the immersion cooling?

Any way to model flux transfer of a permanent magnet with FEMM? This is in reference to the memory effect when a coil steers the flux to one path or the other where it remains after the coil is de-energized. Also, how do I describe laminates with this 2.5D (x,y and an overal z) model?

The design parameters are TOO BRIEIF outlined in 47:50/1:23 . Please indicate a justification for this choice. I realize that the presentation is for first time designers , hence the simplification is correct.

Hi, thank you for the presentation. Relay awesome content. I have a crazy question: from safety perspective it is not recommended, but if we want to see quickly only DM mode noise in the emi signature up to 2 MHz , should we see it if we disconnect PE wire between DUT and LISN?

@ElectronicmindsUK how did you model the actual winding?

is there any possibility to research/work at your platform?

Excellent

Hi there, great videos I hope you keep them coming!? At 50:37 you show a bode plot with a 1A and 2A load. 1A bringing the converter into instability. Have you used PSIM before? Reason I ask is because generally I've been finding that if there is instability within the converter I can't seem to get nice bode plots like you are showing where you get to see that instability with such a nice clean trace.. Did you have to do any tricks or extra steps?

I started watching video just to take a look but I ended up taking notes and watching all video at once. Thank you for sharing those very useful pieces of information.

✌️ 'Promo SM'

Really great video, such a great initial kicker into FEMM! But is it just me or is the video of you clicking through FEMM so laggy that you don't actually see a lot of where you are clicking? It's weird though cause your voice is smooth and continuous, it's just watching you go through FEMM..

This is such a wonderful series of webinars. I am actually a Masters student at University of Colorado, Boulder and taking courses from the authors of the book mentioned here. It's indeed a great Power Electronics textbook

@Electronic Minds regarding VOR with flyback design, it's usually something calculated/assumed very early on in the design process (maybe the first step or 2nd). With one output I get how you can get a sense of what VOR could be, but, when you have 3 or 4 outputs, how do you accurately estimate VOR?

Nice presentation. Are the documents summarizing the type of compensators available for download?

Does it help to put Y caps along with the common mode choke at the gate drive isolation barrier input and at the gate power supply input to provide a path for the common mode current to return back and reduce the loop area?

Excellent session...learned a lot ..Would it be possible to share the handwritten notes and mathcad files??

Great series. I remember signing up for it while at Nottingham and glad to see it on youtube now. I have a question - what is the path for the common current during the switching event? The capacitance from switching node to chassis is what is getting charged. What are the sources and the path for that current?

Thank you for sharing, really useful content, keep up the great work.

Hi, the analog control explained here is different from many application notes with better understanding. Thank you !

At the 23 minute, is it 1000 steps or 100 steps for 1Mhz PWM.

This is very good and helpful. Thank you very much for the time and effort. Could you please tell me what is the original platform/ website this webinar was conducted. Can you share the details. How do we get the next webinar link.

Much appreciated your efforts as well as your generous to share tons of knowledge to us. Thank you very much!