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DrMattRegan
Australia
เข้าร่วมเมื่อ 19 ส.ค. 2021
Welcome to the channel. Here I present a number of tutorial-style videos for people who want to learn how computers work using a hand's-on approach.
While we mainly focus on the legendary 6502 microprocessor at the moment, the plan is for more Z80, 68000, 8086 and computer graphics content.
While we mainly focus on the legendary 6502 microprocessor at the moment, the plan is for more Z80, 68000, 8086 and computer graphics content.
Switches to CPUs: Minutes counter
We make the minutes counter for the clock.
Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html
Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html
Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html
Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html
Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html
Part 6: Wired OR gates - th-cam.com/video/WCnnezTIf1g/w-d-xo.html
Part 7: Flip Flops - th-cam.com/video/BU7P0ttwA18/w-d-xo.html
Part 8: Ripple Counter - th-cam.com/video/6vTfPoxk4a4/w-d-xo.html
Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html
Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html
Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html
Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html
Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html
Part 6: Wired OR gates - th-cam.com/video/WCnnezTIf1g/w-d-xo.html
Part 7: Flip Flops - th-cam.com/video/BU7P0ttwA18/w-d-xo.html
Part 8: Ripple Counter - th-cam.com/video/6vTfPoxk4a4/w-d-xo.html
มุมมอง: 44
วีดีโอ
VGA ZX Spectrum - Testing
มุมมอง 3K14 วันที่ผ่านมา
In this short series, I'm going to build a ZX spectrum using an EPROM instead of a ULA. In this video, i looks at getting the VGA circuit to work. Part 1: th-cam.com/video/u8TRJXLCfQo/w-d-xo.html Part 2: th-cam.com/video/qO1dNRKHeb4/w-d-xo.html Part 3: th-cam.com/video/If8GkpuakHM/w-d-xo.html
Switches to CPUs: Ripple Counter
มุมมอง 1.2K21 วันที่ผ่านมา
We make a D-type flip-flop then convert it into a ripple counter. Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wire...
VGA ZX Spectrum - No ULA, No FPGAs
มุมมอง 12Kหลายเดือนก่อน
In this short series, I'm going to build a ZX spectrum using an EPROM instead of a ULA. In this video, i looks at getting the VGA circuit to work. Part 1: th-cam.com/video/u8TRJXLCfQo/w-d-xo.html Part 2: th-cam.com/video/qO1dNRKHeb4/w-d-xo.html
Switches to CPUs: Flip-Flops1
มุมมอง 933หลายเดือนก่อน
Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wired OR gates - th-cam.com/video/WCnnezTIf1g/w-d-xo.html
Switches to CPUs: Wired OR gate
มุมมอง 6832 หลายเดือนก่อน
Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wired OR gates - th-cam.com/video/WCnnezTIf1g/w-d-xo.html Part 7: Flip...
Switches to CPUs: Set Reset Latch
มุมมอง 1.4K2 หลายเดือนก่อน
Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wired OR gates - th-cam.com/video/WCnnezTIf1g/w-d-xo.html Part 7: Flip...
Switches to CPUs: Relay based latches
มุมมอง 1.4K3 หลายเดือนก่อน
We look at implementing a latch with relays. Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wired OR gates - th-cam.c...
Switches to CPUs: Relay based logic
มุมมอง 2.2K3 หลายเดือนก่อน
We look at implementing our 2-input gates with relays. Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5: SR Latch - th-cam.com/video/JDJzhQL1npo/w-d-xo.html Part 6: Wired OR gates ...
Switches to CPUs: 2 Input Gates
มุมมอง 1K3 หลายเดือนก่อน
Here we go over the buffer, NOT gate, AND gate and OR gate. I'm waiting on some parts from China to finish the ZX Spectrum series. Part 1: Binary numbers - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html Part 3: Relay based logic - th-cam.com/video/FPGLLOh_02Y/w-d-xo.html Part 4: Latches - th-cam.com/video/rv0Gt7qPR0k/w-d-xo.html Part 5:...
Digital Logic Explained
มุมมอง 3.3K3 หลายเดือนก่อน
In this series, I'm going to build a digital clock. It leads to an alarm clock, then an 8-bit TTL CPU. Absolutely no background knowledge is required for this series. This is a quick way for the motivated self-learner to understand how microprocessors work. Part 1: Introduction and Binary - th-cam.com/video/BYN8Zmk6HJY/w-d-xo.html Part 2: 2-input gates - th-cam.com/video/bCuBbsakUcA/w-d-xo.html...
ZX Spectrum DRAM timing explained.
มุมมอง 6K4 หลายเดือนก่อน
Page mode DRAM access explored. No ULA build video: th-cam.com/video/u8TRJXLCfQo/w-d-xo.html 16K ZX81 vs 16K ZX Spectrum: th-cam.com/video/mL0K5u1zkko/w-d-xo.html
ZX Spectrum build video circuit.
มุมมอง 12K5 หลายเดือนก่อน
Bring up for the video circuit. The CPU build is here th-cam.com/video/u8TRJXLCfQo/w-d-xo.html ZX80/ZX81 build th-cam.com/play/PLjQDRjQfW-84WG47-5UjPz1BrXxc1acvd.html
ZX Spectrum build, No ULA.
มุมมอง 19K5 หลายเดือนก่อน
In this short series, I'm going to build a ZX spectrum using an EPROM instead of a ULA. In this video, much of the build is done and some bring-up. I'm planning to do a PAL version as well. 16K ZX81 vs 16K ZX Spectrum th-cam.com/video/mL0K5u1zkko/w-d-xo.html VGA from an EPROM. th-cam.com/video/seyHAFpsoP8/w-d-xo.html Apple 2 wire-by-wire th-cam.com/play/PLjQDRjQfW-85BWo4IC3WYUDZ-hC8qJsqO.html
16K ZX81 vs 16K ZX Spectrum
มุมมอง 7K6 หลายเดือนก่อน
A side by side comparison of these two machines. A minor tweak inside the ULA lead to a huge performance gain. ZX80/81 video circuit revealed. th-cam.com/play/PLjQDRjQfW-84WG47-5UjPz1BrXxc1acvd.html ZX 16K expansion series th-cam.com/video/_vXIL8bNfiU/w-d-xo.html NTSC from an EPROM th-cam.com/video/0EzTAo47Fxg/w-d-xo.html
ZX80/81 Video Circuit Part 6. ZX80 HSYNC and Bring Up
มุมมอง 1.8K9 หลายเดือนก่อน
ZX80/81 Video Circuit Part 6. ZX80 HSYNC and Bring Up
ZX80/81 Video Circuit Part 5: How interrupt is generated for HSYNC
มุมมอง 1.8K9 หลายเดือนก่อน
ZX80/81 Video Circuit Part 5: How interrupt is generated for HSYNC
ZX80/81 Video Circuit Part 4: Display Files
มุมมอง 2.1K9 หลายเดือนก่อน
ZX80/81 Video Circuit Part 4: Display Files
ZX80/81 Video Circuit Part 2. Hi-res display of 256 x 192 pixels.
มุมมอง 4.2K10 หลายเดือนก่อน
ZX80/81 Video Circuit Part 2. Hi-res display of 256 x 192 pixels.
ZX80/81 Video Circuit Part 1: Z80 Solo.
มุมมอง 13K10 หลายเดือนก่อน
ZX80/81 Video Circuit Part 1: Z80 Solo.
TTL Apple2e Part 2: Memory board and Program Counter
มุมมอง 1.6K10 หลายเดือนก่อน
TTL Apple2e Part 2: Memory board and Program Counter
TTL Apple 2 computer. No 6502 required.
มุมมอง 14K11 หลายเดือนก่อน
TTL Apple 2 computer. No 6502 required.
How to build a 6502 TTL-CPU:Part 9 Finale - Decimal Mode
มุมมอง 2.6Kปีที่แล้ว
How to build a 6502 TTL-CPU:Part 9 Finale - Decimal Mode
Do you have a CRT to test with? I've run into similar issues using a deadbug style circuit with a ground plane. CRT works perfectly, but LCD has jailbars. I'm pretty sure it's caused by the LCD sampling the signal in a lazy way causing a lot of aliasing. That's not to say the DAC isn't at fault(any noise on the power supply will flow through to the output), but the aliasing is way worse than it should be. I'd be curious to see what the output of the DAC looks like on the scope. Also as other people have mentioned star grounding is the opposite of what you want. It's the area inside a current loop that determines inductance so you want the signal/power and ground wires to be close together as possible.
manic miner is probably jumping because you have not FF value in kempston port #1F after game load, the game detects presence of KJ by checking bit 5(or 6, or 7) of kempston port
Removing Jail Bars is not difficult. Ensure that your PDN (Power Delivery Network) is designed with low impedance to ensure that high frequency components are attenuated and routed away from the analog area. With proper PDN design, there's actually no need to have separate power supplies for the analog and digital sections. Avoid using chokes if possible - the use of them is an indication of poor design (but are often used!). A possible reason why the full intensity colours don't have jailbars is because the signals are above the maximum 0.7V peak thus any ripple is ignored. For the prototype, I would just use a galvanically isolated DAC to have separate clean voltages to drive the monitor.
Thanks i suspect you're right. I checked my resistor network and bright is about 0.8v, is i too suspect it's saturating the 0.7v peek - no ripple. The low intensity level is about 0.5v. I'll probably make a video about it. I'll start with a VideoDAC, and work backwards. I was hoping to get away with just a resistor network though.
Just a thought - Are you driving the CPU clock with a TTL inverter and 330 ohm resistor by any chance? If so, temporarily remove disconnect the pull up resistor to see what effect (if any) it has on the jail bars. Also, mesh your PDN to better control noise paths and ground bounce. There’s no need to avoid ground loops when dealing with higher frequency waves.
Great intro to binary numbers, I'm watching the whole series! I'm a lawyer, but always had interest in computers and games. You are a great teacher, thank you!
Welcome enjoy. I'm going to take it all the way out to an 8-bit CPU.
How fast can it run at full speed?
Hopefully. It should run at ~5ish MHz, but we'll see.
A great project and well explained as all ways. I would like to try some of your ideas out on my RC2014. I am very interested in the Arduino Mega reading the video RAM, Will you share the your code and or make a video on your techniques. You always seem to skip over the finer details which is the most interesting parts for me.
A ground grid works better than a tree. The whole ground loop is only for the point between analog and the digital. For each section connect all the grounds together in all different directions. This makes a mesh and it will act like a ground plane up to a frequency based on the largest loop.
A mesh is likely to be closer to a ground plane than a star/tree. It doesn't seem to upset the digital portion though, i may just need to redesign the analogue section.
Great job, it's looking amazing through VGA! Incredible you managed to replace the ULA with an EPROM! If it's not correct timing wise against how the original ULA works, that will be why some games aren't working! Does it halt the CPU when the ULA is doing display stuff? .sna are a bit hit and miss - sometimes they are from a 128K machine (freeze or just crash on 48K), other times they are using a specific controller input, eg. kempston, cursor, SJS etc.
Yes, i think the 60Hz vs 50Hz is an issues. Also, i don't mimic the exact timing of the memory by slowing the CPU down during video. That (should) be relatively easy to do. Will give it a go.
Great job! The ULA will stop the CPU clock when it needs to draw the screen contents. So that will change the timing of the code you run. And timing us critical in many games.
Thanks for the feedback. True, i actually have a video on the topic th-cam.com/video/VMosP_X2C8U/w-d-xo.html Will try slowing it down as i tweek it.
Very nice work, about the jailbar, maybe an rc filter isolating the power of the video circuit from de rest of the circuit could help, something like 10R and 10uF +100nF
I did try using the circuit you suggested but with a diode instead of the 10 ohm resistor, but no joy.
I really love this series! Can't wait to see how the jail bars issue is resolved
Thanks David. Cameo role for your keyboard!
It works very well. Nice one.
Thanks 👍
Wonderful work, particularly the interlaced memory access between the CPU and video state machine. I cannot see any diodes, only resistors in the VGA output circuit on your board. The intensity signal should sum with RGB through a resistor and a separate diode for each each R, G and B signals going into the VGA connector. Also, 220 pF to ground from each of the RGBI lines of the VGA output may also help with the jailbars.
Yep, no diodes, only resistors. Cool, thanks for the input. I'll keep it up my sleave. Actually, i was thinking of using some extra transistors (2 per bit) to stop the pull down, but i think diodes will work just as well - thanks!!
Does colour clash display exactly as before or are there unexpected effects?
The colour clash matches what i've seen before, for example Brue Lee looks exactly like the same as images on the internet. The jailbar artifact is new, i wasn't expecting it. To date, all of the video has been white on black (for PAL) and there wasn't a hint there.
Wouldn't it be amazing if it accidentally eliminated Speccy colour clash? 😂
@@whetphish yea it would, ula+ was one method it involved patching the games or developing games from scratch. I feel that if Sinclair had put more into development at the time the Speccy would easily have trumped the competition, alas the hardware costs and supply issues back then tho......
@@dav1dbone Thing is though, one of the reasons for the Spectrum's long term success was the price/performance balance of the design. I suspect that any improvements would likely have either led to increased cost or reduced performance (the colour display in particular is a particularly efficient design even if it is ugly) - either of which would have rendered the machine less competitive. You only have to look at the like of the Oric to see this; on paper it's a better machine but in practice the graphics get in the way and slow the system down. The big omission was the lack of a sound chip, and to this day I'm surprised they didn't include an AY on the interface 2 - this would have been copied by other vendors and become a standard pretty quickly I think.
@@whetphish that would be quite a trick, given that the colour clash is caused by the way the screen is stored in memory. If I remember correctly, someone did build a modern interface to remove colour clash, but it doesn't work in all games, and it requires something like four times the normal amount of screen memory to store the clash-free display on.
Superb! The fact that this works without an ULA is the real kicker. Even with the minor problems (which are likely to be ironed out) the picture is miles away from the TV (or composite) on a real Spectrum. Way better. Clean up the input to your DAC, some buffer gates (or a bunch of FFs if its really a timing issue) and plently decoupling close by should help. Besides, Jet Pac and Bruce Lee bring back many memories.
Great to hear! It's been a fun little project. I'll give updates in the next series which will have no ULA and no Z80. Should be fun.
I had the same jumping issue with the ZXPicoIF2ROM on my 48K. I spoke to the author of the board, Tom Dalby, and he said that this happens because the snapshot was taken on an emulator with a Kempston joystick interface enabled, and as my Speccy has no such interface, it gets confused. He suggested that I create my own snapshots in an emulator, with Kempston disabled, and use those instead. I haven’t got around to trying this yet, but I thought I would share, as it seems it might help in your situation too.
Thanks for that, i suspected that's what was going on. Good to know that i'm not the only one who has seen it. Makes me less worried about it. I was just shying away from writing .tzx or .tap code.
Hi, regarding the jail-bars they might appear because of the way you physically implemented the intensity bit comming into the video dac. I noticed in one of my builds if I buffer all the color and intensity bits and the pixel clock and bitmap data so all „flows“ synchronous through the output state all of the clock related artifacts disappear leaving only power related stuff which is more easy to debug. This I could get away with ample decoupling and shorter slightly thicker wires (also using star grounding and power but separate digital and analog circuits power) I did however also buffer the analogue video out with a fast 3ch opamp - the same that is used on some console RGB-mods.
Thanks for that. The video comes directly out of a 374, so it should be synchronized. My back-up plan is basically what you suggest, create a separate analogue only video board, possibly with it's own power supply. I think the spectrum is a bit forgiving because it only has 16 colours, but this would be crap for actual VGA.
Outstanding!
Thank you kindly!
Great video! To clarify most of the pseudo hi res graphics games that don’t require any additional hardware such as Rocketman , Forty Niner etc all use the same technique .. change the I register to another random set of ROM data - values of 12 and 8 are the most common… this gives access to pseudo random bit data for each “character”. The video buffer in memory is 182 lines of 32 characters each of which ends in a Ret not Halt opcode (both with bit 6 set in the opcode of course). A custom video driver jumps into this video buffer and the trick is that the display driver resets the Line Cntr for each line so it never increments !! Tada pseudo high res images …
@@TechWorldServices yeah, you just change the interrupt address for a random character set. We then have 7-bits (inverse + 6 bits) for 8-bit of display.
Has anyone tried building a TI-99/4A with 512K of RAM and ROM so it will work as intended and not throw the out of memory error
TI-99/4A is a bit outside my experience unfortunately.
Should be, some guys decoded fully die shot and done full schematic and even build one from transitors with blinking diodes
@@AK-vx4dy Monster6502? This is a bit different. It’s not a replica, it’s a simplified version. It uses a simplified architecture, but it requires more clocks per cycle as a result.
@@DrMattRegan They lied to me? 😡 and this in browser simulation is 1:1?
@@AK-vx4dy not quite sure what you mean? What in browser simulation?
@@DrMattRegan The Visual 6502
@@AK-vx4dy oh OK. The Monster6502 was based on the visual 6502. This is different. Make sure you watch the series on the microcode too!
Good video. I like how you showed how yhe D flip flop is triggered on the rising edge. Are you going to post thar schematic diagram somewhere? If so a link in the description would be great.
Hi Martin. I haven't done a proper schematic yet, but in the next video i'm planning to introduce the logic to restrict one count from 0..9 and another count to 0..5, so i'll see if i can put out a schematic with that.
Great explanation.
Glad it was helpful!
Another good video! (5:51) Where's the data line? (9:04) Ah. You showed the toggle flip-flop at 5:51, not the data flip-flop. (9:21-9:40) The top line is still set and the bottom line is still reset on the internal latches, but the relays used for set and reset are swapped compared to the previous video. This does mean the data flow matches the design you showed with gates better. However, it also means the internal D-type latches have _D-bar_ inputs, not D inputs. (There are other ways to rectify this, but I think this way requires the fewest changes.) And now for some fun facts/over-analysis: As for changes between the logic-gate design and relay design, you still have the outputs of the latches between the OR gates and their inverters; the outputs are just buffered this time. Additionally, the gate design uses an SR-type latch as the follower, whereas the relay design uses a D-type latch as the follower.
Thanks. [(5:51) Where's the data line?] It doesn't really have a data input from an external source. Data is the input to the leftmost relay coil. [(9:04) Ah. You showed the toggle flip-flop at 5:51, not the data flip-flop.] No, T flip flips have a T input that gates the clock. It confuses the issues so i decided not to include it. The relays are meant to be equivalent functionally, but not an exact gate for gate copy [i don't think i ever said they were exactly the same - correct me if i'm wrong]. Arguably, the relays act more as multiplexors [and 1:2 decoders] than anything else. This is a beginners tutorial, so i mainly want to get the ideas across.
@@DrMattRegan Huh. You're right about T flip-flops. I blame my RadioShack Electronics Learning Lab for calling the configuration at 6:13 a "toggle flip-flop" (and also that most Minecraft redstone "toggle flip-flop" designs aren't actually clocked) for me getting that wrong.
хорошая работа, отличный контент, спасибо.
Thanks for the feedback.
so that's why they're called ripple counters. I thought they might be used to counter the ripple on a signal (like AC on top of DC), but that never made any sense
Yep, they are much easier to implement than synchronous counter where the outputs all change at [exactly] the same time.
I really liked the explanation! Makes understanding these circuits so much easier
Glad it was helpful!
Make more videos
On their way!
really good
Thank you! Cheers!
Very interesting, and it occurred to me after watching this part, that you could add another latch or two to enable you to bank switch part of the RAM (the part which doesn't hold the video memory) to allow the computer to be expanded to run either multiple programs or programs with large amounts of data. Edit: Maybe even simulate a RAM drive for fast loading of programs.
Yeah, good thoughts. It may make sense to put video RAM in I/O space.
@@DrMattRegan You could address video RAM using the OUT command. One method would be to have an output port to select which 256 byte section of the RAM (or which non-RAM device) you're addressing, and another to address the actual byte in video RAM (or device) which you want to access. But my original thought was that, if the video RAM is located somewhere in (for example) the lower 32K in RAM, then you could bank-switch some of the unused RAM in the chip using the upper 32K of memory space. (I'm assuming you're aware of the concept of Bank Switching)
great great series, probably I've already commented when I saw first time O:-) ... But a question: will the proposed circuit handle true hi-res? maybe there is the need for an additional episode to finish or to explain it?
I have thought of doing an episode on pseudo hi-res graphics. The problem with the ZX81, is that bit-6 of a byte in the display file will blank the display and execute the byte as an instruction. What this means that we really only have 7-bits of data per 8 pixels. Or really 6-bits plus inverse. This trick is to use some other (more random appearing) part of the ROM as the character data. Then in the 64 characters available for 8 pixels, find the closest match. This is why (some) high res images appear to have noise.
nice project
Thank you! Cheers!
Witch Wires are this? Im building a z80 handwired computer and im using much silicon wires that i need to decap all te sides before soldering then
These are wire wrap wires, but I’d recommend using the ones with Kynar plastic around the wire. Kynar is quite heat tolerant and easiest to work with.
Brilliant! Subbed!
Welcome aboard!
I had no idea about mirrored memory map...so zx81 can have max 32KB? Is ROM replacement possible to enable more without banking?
Correct. I've wondered how these large expansions (56K) work. Technically, you could store data in the upper 32K, presuming the d-file is written to in the upper memory. You just couldn't execute code without upsetting the display.
@@DrMattRegan Yeah, given that BASIC programs *are* data (not machine code), that was no severe problem.
Would it be possible to program an eeprom to replace the real ula in a speccy as replacing them is silly prices or maybe use a pico
Not really. Pins are very different and we need the DRAM controller etc
I can't stop thinking of loosed cycles of CPU when line is short.... but it is still a crazy genius... i still rember that HALT was NEW LINE code ;)
Yeah, i think they were more interested in generating a video signal and keeping the memory footprint low.
@@DrMattRegan Yes memory footprint on 1KB version was crucial even more than saving chips.
I remberd that HALT was code for NEW LINE (it was ZX81 thing ?)
@0:53 It has 65536 I/O adresses but software and hardware must use it properly.
Correct, i do address this in a later video on the keyboard
No FPGA? Why not? Because you don't know how to use them? The original Spectrum contained an ULA which is the masked programmed equivalent of an FPGA. So using an FPGA is actually closer to the original Spectrum. There are no points awarded for making a design more complicated. I would personally give points for someone that does use an FPGA as it demonstrates they can design the circuit for it. It demonstrates they have more knowledge and skill than just using discrete logic.
Interesting that you jump straight to that. The purpose of the video/series is to demonstrate finite state machines (for what's next to come). It turns out, I have indeed been using FPGAs to make video controllers for quite some time, see - dl.acm.org/doi/pdf/10.1145/311535.311569 I was also part of the GPU architecture team at NVidia previously and i worked on the display controller there, so I'm familiar with going directly to silicon as well. I personally find watching videos of a screen shot of someone programming FPGAs a bit boring, but that's just me. If you like that, here is a good series - www.youtube.com/@CompuSAR
In the Spectrum commercial from Micro Men they state CPU frequency to be 3.54Mhz, which is true for 128K and later models, but the original Speccy ran at 3.5Mhz 😁
Impressive work. Is this going to be 640x480 with 256 colors which is the spec for a vga signal? Thank you cant wait until next video!
Welcome, glad you liked it. No, i'll probably just stick with the native colours of the spectrum. I'll also probably stick with the native resolution of the spectrum. The main idea is to get away from a composite PAL signal.
@@DrMattRegan So what is the resolution and how many colors? I'm not familiar with PAL
A spectrum with a VGA display is pretty sweet. As an aside I love the VGA display standard. It's probably the most home brew electronics friendly video format.
Yep, standard VGA is pretty straightforward, much easier than composite!
EGA accepts TTL levels and needs slightly lower frequency.
Things are tough and getting harder by the minute, so you're just staying ahead of the curve. You've got this!
Thanks for the feedback, appreciated!
Great stuff! Will you be releasing your design once it's finished so that others can build it?
Yes I will if there's enough interest.
2:25 original ZX81 1k is capable of true HiRes! (obviously limited by the RAM) ... and in fact since the possibility of software driving hw much better than in the Spectrum, the only real limit of ZX81 are the colors!
Well, you can do pseudo high-res with enough memory. You choose a different character palate by changing the interrupt vector, and try to find part of the ROM that looks more random. You are still stuck with the closest match, but each line has to use the same palate. It’s not the same as the spectrum where you have absolute control over each pixel.
Nice, very nice. I am not sure of your goals, this idea may ruin the purity. Maybe you could share the address/data bus with an RP2040, use that to generate the VGA output and also use that as a USB interface and flash storage for the Z80 images to load/save. I've seen the RP2040 used to emulate ROM, I am not sure if the timing would be good enough for your project though.
Thanks, but I'm not so sure how 5V tolerant the RP2040 is. The pin header is already configured for an ArduinoMEGA 2560, and it has the address bus and data bus wired up to it. I'll probably use BUSREQ and BUSACK to halt the Z80 and turn off video (zx80 style) when i do the upload.
@@DrMattRegan Good point, I look forward to seeing it, this has been a fantastic series, thanks for sharing it with us.
Now add soundblaster support, LOL 😂!
Probably not terribly hard if you have a real soundblaster card. After all, ISA (16-bit) is just the IBM PC/AT bus (Intel 80286 cpu) and the 8-bit equivalent is the IBM PC bus (Intel 8088 cpu). The Zilog Z-80 is a souped up version of the Intel 8080 whereas the Intel 8085, which preceded the Intel 8086, is software compatible with the 8080 on the binary executable level. So strapping an early Sound Blaster (8-bit) to a Z-80 based system shouldn't be that hard.
Audio is either a synth or really really compressed somewhere in the chain. Hard to listen to.
It is my voice, but it uses premiere pro's voice enhancement to remove noise etc. It actually sounds better at 1.25 or 1.5x speed.
Weirdly I was wondering if you had a new video up with this project today as it has been a while since I checked - and here it is! Thanks for the update Dr Regan!
Excellent, hope you enjoyed it!