Do a DC sweep. Check the currents from power supply source and other components for Input 0 and 1. This is explained at around 2 min of playtime in the video.
If we have a SPICE Model of SPAD we can build SPAD based circuits also in LT SPICE. If you are having any difficulty in implementation you may mail me details at sanjayv@hyderabad.bits-pilani.ac.in
sir,as u have said in last part of short circuit power calculation that nmos will show only short circuit power then why we are taking diff b/w the power in pmos and nmos?
we can roughly say power in nmos is short circuit power (negelecting static power) for this test vector. Italked about difference just tio show that pmos power will be higher ( switching + short circuit powers).
You can take the average power from the power supply as explained in the video from 12:20 minutes playtime onwards The average power from the source will be the power dissipated in the circuit.
Sir please explain how to calculate CMOS circuit propagation delay for various logics such as AND-gate, NAND-gate, OR-gate, NOR-gate, XOR-gate etc. Using LTspice
You can take the average power from the power supply as explained in the video from 12:20 minutes play time onwards The average power from the source will be the power dissipated in the circuit.
Hello sir. I want to build Bulk driven OTA, how to get frequency response using ltspice. would it be better to go for code using ltspice netlist generation for model simulation?
Sir, in some ptm model like 90nm, the nominal Vdd and width (W) is not specified. How to measure Nominal Vdd and Width of MOS for those cases? and how to calculate the total power dissipation for a dynamic or domino cmos logic circuits in ltspice!! is it the addition of average power dissipated by individual mos components and also keeper circuits?
These are PTM models and not fab lab models and hence they don't specify all parameters. Minimum Width is generally 2.2 to 2.6 times L_min. Better option is to refer to tsmc data or microwind application data or other fab lab data .
sir, The thermometer like probe (when I press alt command) is coming only for voltage sources not on the nmos and pmos in my tool... what would be the reason... Which LTSPICE version I want to download Thanks in advance
You can take the average power from the power supply as explained in the video from 12:20 minutes play time onwards The average power from the source will be the power dissipated in the circuit.
Thank you very much sir
It help me a lot during my practical in lab
God Bless you. I am happy I am being of some help to students.
I learnt shortcuts to calculate power. Thank you a lot sir!!
You are most welcome
Thank you sir for posting the video. Sir can you please post a video on how to calculate the current On-Off ratio
Do a DC VGS sweep from 0 to VDD, with VDS= VDD. Plot ID vs VGS. Ioff is when VGS=0 and ION when VGS= VDD
@@SanjayVidhyadharan sir for getting off current in cmos input voltage will be zero =0
It's Verry helpfull. Thank you sir. Can you change the background of the simulation into white in your next video.
Thanks. Noted
Thank you for this video, sir.
You are very welcome
Sir please tell me how I simulate the leakage power calculation by LT spice for cmos inverter,nand,nor circuits.Your videos are very helpful.
Do a DC sweep. Check the currents from power supply source and other components for Input 0 and 1. This is explained at around 2 min of playtime in the video.
Thank you so much sir
Most welcome
Sir, Thank you for this video. Could you give us an idea of how to build a SPAD circuit in LTspice?
If we have a SPICE Model of SPAD we can build SPAD based circuits also in LT SPICE. If you are having any difficulty in implementation you may mail me details at sanjayv@hyderabad.bits-pilani.ac.in
@@SanjayVidhyadharan Thank you for the reply sir. I have sent you an email regarding the implementation and hope to hearing from you soon
sir,as u have said in last part of short circuit power calculation that nmos will show only short circuit power then why we are taking diff b/w the power in pmos and nmos?
we can roughly say power in nmos is short circuit power (negelecting static power) for this test vector. Italked about difference just tio show that pmos power will be higher ( switching + short circuit powers).
Sir at 14:11 ,is it dynamic power ?
Yes the spike seen is dynamic power. But average will be total power which includes static power.
Sir, when we design full adder in ltspice . do we need to connect load capacitance to measure power consumption
It is better to check the performance with a load equivalent to fan-out of four.
@@SanjayVidhyadharan sir, in full adder there are lot of mosfet then how to calculate short circuit power and switching power
Please post a video for parasitic capacitance of CMOS. Thanks
Sure
Sir, can we calculate power consumption of any cmos circuit using ltspice?????????
Yes.
Sir ,
how to calculate the AVERAGE POWER of the whole circuit instead of the instantaneous power of the components?
You can take the average power from the power supply as explained in the video from 12:20 minutes playtime onwards The average power from the source will be the power dissipated in the circuit.
Sir please explain how to calculate CMOS circuit propagation delay for various logics such as AND-gate, NAND-gate, OR-gate, NOR-gate, XOR-gate etc. Using LTspice
I have explained it in this video (th-cam.com/video/ez8waA9whNk/w-d-xo.html. ) In case you still have a problem, you may call me up or mail me.
Dear Sir,
How I can calculate the power consumption of the CMOS inverter in LTSpice simulation ?
You can take the average power from the power supply as explained in the video from 12:20 minutes play time onwards The average power from the source will be the power dissipated in the circuit.
@@SanjayVidhyadharan thank you a lot sir.
Hello sir. I want to build Bulk driven OTA, how to get frequency response using ltspice. would it be better to go for code using ltspice netlist generation for model simulation?
I have not tried the code method. Cadence is the best tool for such in-depth analysis.
Sir, in some ptm model like 90nm, the nominal Vdd and width (W) is not specified. How to measure Nominal Vdd and Width of MOS for those cases? and how to calculate the total power dissipation for a dynamic or domino cmos logic circuits in ltspice!! is it the addition of average power dissipated by individual mos components and also keeper circuits?
These are PTM models and not fab lab models and hence they don't specify all parameters. Minimum Width is generally 2.2 to 2.6 times L_min. Better option is to refer to tsmc data or microwind application data or other fab lab data .
sir,
The thermometer like probe (when I press alt command) is coming only for voltage sources not on the nmos and pmos in my tool... what would be the reason... Which LTSPICE version I want to download
Thanks in advance
Hope the problem is resolved. Sorry for the late response.
sir in ltspice how we go for Ion active current and Ioff current leakage current in ltspice
You can do a DC operating point simulation
I want this pdf.. how i will get it please help
sanjayvidhyadharan.in/all-courses/ . You can download from this link
Wing Commander Sanjay Vidhyadharan
Thanks
Dear Sir,
Can you give me your email please?
How can I calculate the average power of the whole circuit?
You can take the average power from the power supply as explained in the video from 12:20 minutes play time onwards The average power from the source will be the power dissipated in the circuit.
sanjay.vidhyadharan@pilani.bits-pilani.ac.in