EDC Practical: 2. Build and test single stage CS amplifier using FET by Prof. Omkar S. Vaidya

Build and test single stage CS amplifier using FET. Calculate Ri, Ro and Av.:- Prof. Omkar S. Vaidya, Asst. Prof. in Department of Electronics & Telecommunication Engineering at Sandip Foundation's SITRC, Nashik.

[@dhirajvairagade6256]

Tusi great ho sir... Thank u..... For experiments & simulation...

[@alessandrocoleman5045]

i know I'm kind of randomly asking but does anyone know of a good site to stream new series online?

[@lewisnoel8447]

@Alessandro Coleman i would suggest FlixZone. You can find it by googling :)

[@sakshishinde8765]

More videos 😢❤

[@EL_SakshiPowar]

Thank you so much sir☺️

[@chaitalipatil6906]

Suggest equivalent field effect transistor

[@akashjaiswal8864]

Sir pls perform integrated circuits experiments also

[@adinarayanayadav]

thank u sir

[@asutoshpadhy3010]

Sir while implementing it in multisim I am getting different values for VDs, VGS, and ID. I think this is due to multisim is taking different values of VP and IDSS. But how to fix this to get accurate results. Please do reply.

[@chaitalipatil6906]

If P channel FET is used in the ckt what changes are to be made in the ckt

[@chaitalipatil6906]

Which type of biasing is used in this practical

[@dr.omkarsureshvaidya2038]

It is self bias type of JFET.

[@rushikeshdalvi3691]

thank you sir