EDC Practical: 2. Build and test single stage CS amplifier using FET by Prof. Omkar S. Vaidya
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- เผยแพร่เมื่อ 11 ก.ย. 2024
- Build and test single stage CS amplifier using FET. Calculate Ri, Ro and Av.:- Prof. Omkar S. Vaidya, Asst. Prof. in Department of Electronics & Telecommunication Engineering at Sandip Foundation's SITRC, Nashik.
Tusi great ho sir... Thank u..... For experiments & simulation...
i know I'm kind of randomly asking but does anyone know of a good site to stream new series online?
@Alessandro Coleman i would suggest FlixZone. You can find it by googling :)
More videos 😢❤
Thank you so much sir☺️
Suggest equivalent field effect transistor
Sir pls perform integrated circuits experiments also
thank u sir
Sir while implementing it in multisim I am getting different values for VDs, VGS, and ID. I think this is due to multisim is taking different values of VP and IDSS. But how to fix this to get accurate results. Please do reply.
If P channel FET is used in the ckt what changes are to be made in the ckt
Which type of biasing is used in this practical
It is self bias type of JFET.
thank you sir