Ian I must say I miss anandtech but I see you have branched out very nicely since those days. That was the opportunity you needed to go off on your own and do great things. I’m glad to see you flourish.
A a professional from the software side with ties to the low level hardware it is very intersting to see what is coming down the pipeline an where the industry might move next from people in the know. Thanks Ian for the superb moderation!
Great package tour. As for phoyonics - I remember IDF Spring 02, perhaps 03, which was all about silicpn photonics, Pat G talking excitedly about optical motherboards and the like. Happy days. Talking to the engineersm though, it was all about the huge disparity in size and volune of on-chip optical and electronic components, which can only be more o now, and conversion overheads always souring the deal. Be fascinating to hear how twenty years has changed those.
Great talk, nicely moderated! Hope to see you hold more of these kind of talks soon. If one might dream maybe one in the future from the architects perspective, like Mike Clark, Frank Azor, Jim Keller and similar.
we currently have 2D chips (all transistors are in the same plane) and 2.5D packaging. I can see maybe in the future that we might reach 2.5D chips (multiple layers of transistors on the same chip done as one process instead of advanced co-packaging), and maybe you could count backside power delivery as 2.5D already. True 3d chips and packaging are a fairy tale so far.
@@tommihommi1 What would qualify as 3D and why does CFET not count? I guess my first thought to delineate is that the two CFET transistors are still in parallel and the signal path is essentially on the one vertical plane.
Sees title, thinks time crystals.
Best question was "is software fit for purpose". Thanks. Great panel.
Ian I must say I miss anandtech but I see you have branched out very nicely since those days. That was the opportunity you needed to go off on your own and do great things. I’m glad to see you flourish.
This is an absolutely wonderful panel! Thank you so much for this!
Will a 4D GPU travel back in time to give you the ready rendered frame the very second that you ask for it?
RUFFLED potato chips dissipate heat much better than brand X and are 55% stronger.
A a professional from the software side with ties to the low level hardware it is very intersting to see what is coming down the pipeline an where the industry might move next from people in the know.
Thanks Ian for the superb moderation!
Great package tour. As for phoyonics - I remember IDF Spring 02, perhaps 03, which was all about silicpn photonics, Pat G talking excitedly about optical motherboards and the like. Happy days. Talking to the engineersm though, it was all about the huge disparity in size and volune of on-chip optical and electronic components, which can only be more o now, and conversion overheads always souring the deal. Be fascinating to hear how twenty years has changed those.
Great talk, nicely moderated! Hope to see you hold more of these kind of talks soon.
If one might dream maybe one in the future from the architects perspective, like Mike Clark, Frank Azor, Jim Keller and similar.
Great panel!
Thank you
Will they go to internal liquid cooling? My mind leans to using synthetic oils for that job.
I'm skipping 4 and 5 and going straight to 6d9 because it's nice.
we currently have 2D chips (all transistors are in the same plane) and 2.5D packaging.
I can see maybe in the future that we might reach 2.5D chips (multiple layers of transistors on the same chip done as one process instead of advanced co-packaging), and maybe you could count backside power delivery as 2.5D already.
True 3d chips and packaging are a fairy tale so far.
CFETs are already in research production.
@@TechTechPotatothat's true 2.5D on a single chip, yes
@@tommihommi1 What would qualify as 3D and why does CFET not count? I guess my first thought to delineate is that the two CFET transistors are still in parallel and the signal path is essentially on the one vertical plane.
The Future is Potato Chips.... Get it right.
We want 3d quantum chip with photonic connectors that can link up to 1m other quantum chip. We will have skynet running on them
FirstD