BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 4)

[@shubham-therealclasher5939]

At 16:40 there should be a colon in between begin and xorlp

[@madhursharma4445]

Thanks bro!

[@theomnivert]

Thanks

[@amitkulshrestha7169]

Does the same wire variable will work in connection of the full adder ??

[@siddhesh9588]

Syntax error is thrown at :
xor XG (f[p], a[p], b[p]);

[@brijeshkundaliya2824]

Please let us know the solution

[@chiragjain5176]

​@@brijeshkundaliya2824 no error sir missed colon while writing name
begin : xor1p
xor XG (f[p], a[p], b[p]);
end
now it will work fine : )

[@sampatharaojyotsana7412]

Can't we use a for loop without generate in example 1 of bitwise xor ?

[@rajatvatwani7104]

Why assign carry_out= carry[N} before for loop?

[@sayanbaidya9724]

I am syntax error if I label the generate loop..
module RCA #(parameter N=16) (
input [N-1:0]a,b,
input cin,
output [N-1:0]sum,
output cy
);
wire [N-1:0]c;
fa f1(a[0],b[0],cin,sum[0],c[0]);

genvar p;
generate for(p=1;p

[@divyanshumandowara5658]

use semicolon between begin and label, sir have missed it in video.

[@mrpossible5696]

5:00