Razavi Electronics 1, Lec 32, Biasing, Transconductance

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  • เผยแพร่เมื่อ 18 ก.ย. 2024
  • Biasing, Transconductance
    (for next series, search for Razavi Electronics 2 or longkong)

ความคิดเห็น • 54

  • @adwaitnaik4003
    @adwaitnaik4003 5 ปีที่แล้ว +12

    Greetings !!! , background music , concepts ....loved it !!!!

  • @sahinbozkurt886
    @sahinbozkurt886 4 ปีที่แล้ว +3

    Thanks for all these vidoes. Yo're the lord of the electronics sir.Thanks to you ı can understand all concepts of BJT and FET.

  • @JatSingh
    @JatSingh 7 ปีที่แล้ว +35

    That cliffhanger :)

    • @GalibFida
      @GalibFida 6 ปีที่แล้ว +10

      this would outsell game of thrones anyday!

  • @dogdogdog2024
    @dogdogdog2024 8 ปีที่แล้ว +9

    Thanks professor Razavi!

  • @adithyapai6158
    @adithyapai6158 6 ปีที่แล้ว +4

    Loved it !! Graphs tells everything....

  • @phuongnguyenquang4360
    @phuongnguyenquang4360 4 ปีที่แล้ว +4

    very straight and understandable lecture. Thanks sir

  • @darkshadowas
    @darkshadowas 2 หลายเดือนก่อน +1

    Why we should take change in current regarding calculation of resistance in third attempt of amplifier design at 34:38 ??

    • @mrsmellyboy1
      @mrsmellyboy1 17 วันที่ผ่านมา

      if you mean the 2 microamperes it's because you are interested in signal to be amplified! You want the microphone signal to be 50mv not the microfone and operation point voltage. The operation point helps you to get in the region you want for the transistor to do what you want. But the important part you want to make 50mV is the 5mV from the microphone

  • @hemanthkumar3455
    @hemanthkumar3455 2 ปีที่แล้ว +2

    i have a doubt that when the device is at operating point i.e, greater than threshold voltage then when we are not applying any signal then output should be zero and when we apply some signal then it should be amplified but when there is no signal we are able to get some output at load then how to identify at output that input is not applied?

    • @nomqn1861
      @nomqn1861 2 ปีที่แล้ว

      through capacitve coupling, it is possble to isolate the AC signal from the DC offset

  • @poojak9714
    @poojak9714 2 ปีที่แล้ว

    Thank you so much sir. You have made MOSFET concepts very easy to understand. Thanks a lot for creating this lecture series.

  • @AdharSharma05032001
    @AdharSharma05032001 4 ปีที่แล้ว +2

    Prof. Behzad Razavi:Electronics :: Prof. Walter Lewin:Physics
    If only we had professors like you and Walter Lewin in India!

    • @gamar1226
      @gamar1226 3 ปีที่แล้ว

      Do you know other good proffessors that offer free lecture related to engineering/ electrical engineering?

    • @manideepp2229
      @manideepp2229 2 ปีที่แล้ว

      @@gamar1226MIT opencourseware anant Agarwal, Patrick Mercier vlsi , chembiyan T rc circuits.

    • @salvationude-natha398
      @salvationude-natha398 8 หลายเดือนก่อน

      @@manideepp2229 Wow you have saved me buddy. As an electrical student i am disappointed that i am not aware of the existence of such a helpful website

  • @nagireddymallikarjunareddy9624
    @nagireddymallikarjunareddy9624 4 ปีที่แล้ว +1

    Supub 😊😊 , guruji 🙏🙏🙏🙏🙏🙏

  • @DM1114-wd9rs
    @DM1114-wd9rs 5 หลายเดือนก่อน +1

    In gm vs Vgs graph what does professor mean when he says "remember we are still in saturation region" does that mean Vds is greater than Vgs-Vth. But then how will amplifier do more amplification when you are bounding the current bcs of saturation

  • @yunusdification
    @yunusdification 2 ปีที่แล้ว +3

    Mr. Mike :P

  • @prasidhaggarwal591
    @prasidhaggarwal591 7 ปีที่แล้ว +1

    Absolutely amazing!

  • @sahhaf1234
    @sahhaf1234 3 หลายเดือนก่อน +1

    @24:49 second attempt seems to be wrong as there is no V_DS.

  • @PIYUSHKUMAR-eo9fj
    @PIYUSHKUMAR-eo9fj 6 ปีที่แล้ว +2

    great lecture sir

  • @dhirajthalladi4934
    @dhirajthalladi4934 6 ปีที่แล้ว +7

    Thank you sir for ur lectures but i have a small doubt in the attempts you made, you didnot give any vds how can the MOSFET act like current source then

  • @MrBubblegumx
    @MrBubblegumx 4 ปีที่แล้ว +1

    I have a question about the circuit you draw in 23:33. where does the power P = Id^2 * R actually come from? Does it come from the Battery? If so, there is no current flowing into the gate, right?

    • @MrBubblegumx
      @MrBubblegumx 4 ปีที่แล้ว +2

      okay you answered the question :D There is no current Id, because there is no Drain-Source voltage

  • @rachnaumesh6130
    @rachnaumesh6130 4 ปีที่แล้ว +1

    why does Vout have a 180 degree phase difference from Vin?

    • @full5339
      @full5339 4 ปีที่แล้ว +1

      Increasing voltage causes increase in conduction or decrease in resistance and it causes voltage drop to decrease across the terminal of the device.

  • @carolinsweety1694
    @carolinsweety1694 4 ปีที่แล้ว +1

    I am confused as to which expression of gm to use when the values of Id, Vgs, W/L, mu_n*C_ox are all available.
    Because the three expressions give three different answers.
    For example, if W/L = 10/0.25, Vgs = 1 V, Id = 1 mA, mu_n*C_ox = 100*10^-6
    If I try to find gm using the three different expressions I am getting different values with each expression. One expression gives 2.4mS, another gives 3.33mS , the other one gives 2.828 mS.
    Can somebody please point out what I am missing here?
    Thank you in advance

    • @mnada72
      @mnada72 3 ปีที่แล้ว

      What is the vth ? I think these values will not evaluate the Id mentioned

    • @carolinsweety1694
      @carolinsweety1694 3 ปีที่แล้ว

      Vth is 0.4V

    • @prakhargupta1409
      @prakhargupta1409 3 ปีที่แล้ว

      Check if the MOS is in saturation or not.

    • @Millers1231
      @Millers1231 3 ปีที่แล้ว

      You need to calculate Id, not declare it, since it's dependent on Vgs. I get 720 uA using your numbers. Then g=2.4 mS in all cases.

  • @Gurumurthy
    @Gurumurthy 2 ปีที่แล้ว +1

    What happens if we do not apply the gate voltage and go on increasing the drain voltage? what will be the effect?

    • @manideepp2229
      @manideepp2229 2 ปีที่แล้ว +2

      Simple the n-channel will not be formed unless Vgs > = vth. So no current will flow.

    • @sakshisingh4197
      @sakshisingh4197 2 หลายเดือนก่อน

      vds just creates potential difference in n-channel and if u increase vds that potential difference will increase current flow will be more in the n channel .but for all this to happen n channel should be there which will be formed only when vgs>=vth .hence if no gate voltage then no current irrespective of the vds.

  • @shadowzabyss
    @shadowzabyss 6 ปีที่แล้ว +1

    This is the best

  • @shadyyoussef7727
    @shadyyoussef7727 2 ปีที่แล้ว

    perfect Lecture ❤❤

  • @PRIYANKAGUPTA-nt6md
    @PRIYANKAGUPTA-nt6md 4 ปีที่แล้ว

    Awesome sir !!!!

  • @Sourav_Soumyajit
    @Sourav_Soumyajit 2 ปีที่แล้ว

    Awesome!

  • @jagadeesh103
    @jagadeesh103 5 ปีที่แล้ว +1

    16:04 is it large-signal model?

  • @jfertis
    @jfertis 3 ปีที่แล้ว +1

    Great lecture !

  • @sumanth1444
    @sumanth1444 5 ปีที่แล้ว +1

    At 11:00 if pinch-off voltage moves away from vds, they won't be any channel after pinch-off voltage, so how the current flows? anyone please explain this?

    • @caleb7799
      @caleb7799 5 ปีที่แล้ว +1

      there's no charge carrier inversion, but there's still an electric field across the channel length that sweeps the electrons across the channel that were sourced by the Vds. It's not like we created a vacuum in that area.

  • @zohrenoorani135
    @zohrenoorani135 4 หลายเดือนก่อน

    lets build an amplifier :)

  • @NaaJeevitham500
    @NaaJeevitham500 5 ปีที่แล้ว

    let's say we biased the circuit and a sinusoidal signal comes at Vgs. Are there any chances that the transistor go out of saturation region in the negative half of the signal, if it becomes Vds

    • @sakshisingh4197
      @sakshisingh4197 2 หลายเดือนก่อน

      yes it can go out of saturation thats why its impotant to bias the circuit such that this doesn't happen.

  • @ayeshaimran6448
    @ayeshaimran6448 ปีที่แล้ว

    Lmk lmk😅😊😊 too
    .
    Pppfade+8

  • @baalakrishhnach3574
    @baalakrishhnach3574 4 ปีที่แล้ว

    Why we should take change in current regarding calculation of resistance in third attempt of amplifier design at 34:38 ??

    • @andyralphine3387
      @andyralphine3387 4 ปีที่แล้ว +1

      coz Vout=-IdRl(when KVL is applied we get Vout +IdRl=0)

    • @jyothiyanapu3524
      @jyothiyanapu3524 3 ปีที่แล้ว +1

      even i have the same doubt? why they took change in current

    • @sakshisingh4197
      @sakshisingh4197 2 หลายเดือนก่อน

      @@jyothiyanapu3524 change in current taken because amplification is of input ac signal .if you will not take the current difference then output voltage will contain dc biasing voltage of the input which isn't needed ,we just want output voltage wrt to input ac signal (5mv).you can think of small signal model then you will understand why taken the difference.