MOD 10 SYNCHRONOUS UP/DOWN COUNTER

[@shivanichaudhary4339]

Sir t2 ki value meri alg aari h Q3Q1M k sath baar v aa rha h and Q4Q1'M k sath v baar aa rha h

[@Indiafirst1-f3e]

Same mera bhe M bar aa rha

[@shivanichaudhary4339]

@@Indiafirst1-f3e aage thik likha h diagram me

[@vamshianand959]

How do we get that boolean expression

[@potugaduishere......1010]

Can you explain jk flip glop sir

[@moningiravindra4913]

Sure

[@potugaduishere......1010]

When sir pls explain Design a MOD-10 Synchronous counter using JK flip-flops.

[@potugaduishere......1010]

Can you explain sir your explained very good sir pls help us to know using mod 10 using jk flip flops sir

[@moningiravindra4913]

@@potugaduishere......1010 tq rajesh and I will make video for that

[@potugaduishere......1010]

Tq sir. Can you do the answer and send separately .sir

[@ronishghimire8368]

sir state diagram paar aapni kesay apni digit rakha i dint understood can u explain

[@moningiravindra4913]

HI Ronish...
If you don't mind explain your doubt in English?

[@Asante-9ii]

i have become this task
(Design a 3-bit counter with synchronous D flip-flops with outputs Q3, Q2, and Q1, which counts up at E=0 and sets all output values to 0 at E=1.)
and i try to build the state Diagram.
Is it the same principle with Down counter ( Thank you Sir)

[@moningiravindra4913]

yes

[@danishgupta6879]

Attendence lg rhi h kya?

[@mallikharjunakopparapu7886]

Kopparapu haritha, 1528,csse

[@b6요들덱최고]

4 counter !!!!!!!!!!!!!!!!!!!!!!!!!!!!!

[@medapatisravani2473]

M.sravani(1536),CSSE

[@kuradamadhukar3921]

Kurada Nikhil 19KD1A1531

[@KapilKumar-wl9rb]

Kapil Kumar csse 1530

[@dammaamrutha9592]

Damma amrutha CSSE (1515)

[@edutechwithmohan5306]

M. Mohan CSSE (1540)

[@harshavardhanvlogsandgamin1641]

M. Tejasri (CSSE) -1534

[@rohita.p.v3284]

A.P.V ROHIT CSSE 1501

[@ashishgogula6835]

G.Ashish CSSE 1520

[@sowjanyachekka8195]

CH. Sowjanya 1513

[@dheerajaditya7828]

Deeraj CSSE - 1508

[@mojjadaram9254]

19KD1A1541 CSSE