In the above tutorial, I did a silly mistake while defining the expression for falltime in calculator. We have to follow the same procedure as done for risetime expression.Let me know if any confusion is there or see my tutorial on using calculator in cadence.
From schematics, you can do simple math (WxL) of each instance and then sum them or you can use skill scripting to do this. From Layout, just use "k" bindkey for scale and see the L and W of layout
Thank you for your reply Can you help me to run the monte carlo simulation using 32nm CNTFET model library During Monte Carlo simulation which file to include from the 32nm CNTFET model library
Hi, I am using gpdk045 and in spectre i have gpdk045.scs, gpdk045_bipolar.scs, gpdk045_diode.scs, gpdk045_inductor.scs, gpdk045_mimcap.scs, gpdk045_mos.scs, gpdk045_moscap.scs, gpdk045_resistor.scs and gpdk045_soa.scs. which file should i choose for MC simulation
If there is no file with ".mc" then it should be in drop down option under section in model library option of ADEL/XL or explorer. Like "tt ss sf fs ff mc"
Hi sir We have UMC 180nm CMOS technology available in our college to work with But ir doesn't have "MONTE CARLO model file in it" So can u please share the model file of monte carlo for UMC 180nm tech??
Hello, I would like to know that how we can vary 'Vth' of all the transistor's means how to define 'Vth' as variable and do Monte Carlo analysis. Please help
Attempt to run Monte Carlo analysis with process and mismatch variations, but no variations were specified in the statisti cs block. I don't know why. How can I solve it....
sir , u calculated delay. that delay is propagation delay? i thing tp=(( tphl+tplh)/2) tphl- propagation delay high to low tplh-propagation delay low to high..... how i can calculate this? i m confused
Hi, There is only one file for MC in SCL. It can be used for caps and resistors also. Just select the cap in drop down option (right column) after you define the mc file in libraries.
@@MudasirMir7 did you tried for capacitor and resistor? because there is no option in drop down for capacitor and resistor and also in manual the have shown that that the develop for 1.8 ,3.3 V mos device
Hello ravins, It has been almost 4 years I worked on this technology. I am not sure, I think there was a "mat file" in hspice folder which I used for MC. is it there? Maybe that had the cap and res options.
@@MudasirMir7 thanks mudasir that may.lib is there but they do not devolop mismatch and process data for resister and capacitors So I exclude the effet of variation of resistance and capacitance Thanks for replying
the procedure is given on their site or you can login in cadence and download the detailed procedure. let me know where exactly you are facing trouble.
If you see the rule file used for doing the MC simulation, you will understand. otherwise, take a simple current mirror or diff amp and do the MC for proper understanding.
I have never tried such combination, I think it is possible but makes no sense to me. In the ADEXL window, define the variable and do the mc Maybe for a small circuit you can do this but for circuits like PLL/ADC it would be too much
In the above tutorial, I did a silly mistake while defining the expression for falltime in calculator. We have to follow the same procedure as done for risetime expression.Let me know if any confusion is there or see my tutorial on using calculator in cadence.
Sir can you post the video of calculating the area of the design in cadence virtuoso
From schematics, you can do simple math (WxL) of each instance and then sum them or you can use skill scripting to do this.
From Layout, just use "k" bindkey for scale and see the L and W of layout
Could you please guide me how to the connection
Thank you for your reply
Can you help me to run the monte carlo simulation using 32nm CNTFET model library
During Monte Carlo simulation which file to include from the 32nm CNTFET model library
Hi, I am using gpdk045 and in spectre i have gpdk045.scs, gpdk045_bipolar.scs, gpdk045_diode.scs, gpdk045_inductor.scs, gpdk045_mimcap.scs, gpdk045_mos.scs, gpdk045_moscap.scs, gpdk045_resistor.scs and gpdk045_soa.scs. which file should i choose for MC simulation
If there is no file with ".mc" then it should be in drop down option under section in model library option of ADEL/XL or explorer. Like "tt ss sf fs ff mc"
@@MudasirMir7 ok I will try. Thanks
For sram we have 3 noise margin, read write and hold
Can you explain about it
Thanks alot . It's very helpful
sir can u upload video on reliability analysis
Hi sir
We have UMC 180nm CMOS technology available in our college to work with But ir doesn't have "MONTE CARLO model file in it"
So can u please share the model file of monte carlo for UMC 180nm tech??
I don't have access to UMC 180 nm technology. Please check again, it should be there if you downloaded it from official site.
For gpdk how to add model files sir
Sir can you tell me where I can download the model library setup
Hi, can you tell me how to do monte carlo simulation for agnetic tunnel junction (MTJ) devices
The procedure is same. Just define the MC file of your device in the model library setup of ADEL
Hello, I was trying to get VTC of inverter with MC (say #200), however, I didn't get the plots, I don't know what's wrong ? Can you please comment ?
check the message in CIW window
Hello sir, how to add a correlation factor for mismatch variation analysis using Monte Carlo ?
I thought ADE XL takes care of this automatically. so never tried this manually, too dangerous (haha) to play with model files .
Hello,
I would like to know that how we can vary 'Vth' of all the transistor's means how to define 'Vth' as variable and do Monte Carlo analysis.
Please help
Take the Vth of a device using calculator from dcop option and send it to ADE. You will be able to to MC then for Vth or any other device parameter
Attempt to run Monte Carlo analysis with process and mismatch variations, but no variations were specified in the statisti
cs block. I don't know why. How can I solve it....
The .scs lib file you are defining for MC is not correct.
@@MudasirMir7 thank you...
sir , u calculated delay. that delay is propagation delay? i thing tp=(( tphl+tplh)/2) tphl- propagation delay high to low tplh-propagation delay low to high..... how i can calculate this? i m confused
Can you Provide the model File?
Sir my LNA passes the PVT but in Monte Carlo mean value is very less in sir
Hello Mudasir mir can you please tell me the montecarlo file for capacitor and resiister where they are in the SCL
Hi, There is only one file for MC in SCL. It can be used for caps and resistors also. Just select the cap in drop down option (right column) after you define the mc file in libraries.
@@MudasirMir7 did you tried for capacitor and resistor? because there is no option in drop down for capacitor and resistor and also in manual the have shown that that the develop for 1.8 ,3.3 V mos device
Hello ravins, It has been almost 4 years I worked on this technology. I am not sure, I think there was a "mat file" in hspice folder which I used for MC. is it there? Maybe that had the cap and res options.
@@MudasirMir7 thanks mudasir that may.lib is there but they do not devolop mismatch and process data for resister and capacitors
So I exclude the effet of variation of resistance and capacitance
Thanks for replying
Where can I get the Monte Carlo model library from? TIA :)
It should be in spectre/hspice folder. or look for a sub-folder "Monte-carlo"
Use the model file having extension ".scs"
Hi sir I want to know he to install cadence please can j help me?
the procedure is given on their site or you can login in cadence and download the detailed procedure.
let me know where exactly you are facing trouble.
Sir...can you please demonstrate how to do Monte Carlo with L,W,NDEP,Vth and Vdd with independent gaussian distribution of 3 sigma of 10%
Define them (vth, ndep. etc) as outputs in ADE, using calculator (op/opt) and then do the MC simulations.
Hi, can you do montecarlo together with reliability analysis?
Hi, No it won't support both simulations at same time.
One more question how monte Carlo doing mismatch before the layout sir ...plz reply asap
If you see the rule file used for doing the MC simulation, you will understand.
otherwise, take a simple current mirror or diff amp and do the MC for proper understanding.
hi mir, thank you for the helpful tutorial. I want to merge the Monte-Carlo simulation with the sweeping of parametric simulation. Can I do it? How?
I have never tried such combination, I think it is possible but makes no sense to me.
In the ADEXL window, define the variable and do the mc
Maybe for a small circuit you can do this but for circuits like PLL/ADC it would be too much