Introduction to Op-Amps (Amplifiers #2)

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  • เผยแพร่เมื่อ 9 ต.ค. 2023
  • How do you calculate the gain in a circuit with op-amps? Let's look at the LM-741 op-amp and find the gain for both inverting and non-inverting configurations of a common amplifier.
    Aaron Danner is a professor in the Department of Electrical and Computer Engineering at the National University of Singapore.
    danner.group
    Video filmed and edited by Cheryl Lim.
    @randomcheryl

ความคิดเห็น • 11

  • @umerfarooqazam1399
    @umerfarooqazam1399 7 หลายเดือนก่อน +3

    GREAT MAN!!! YOU ARE THE PERSON WITH ABILITY TO WATCH INSIDE STUDENTS BRAINS...THE WAY OF GIVING LECTURES ARE UNIQUE..THANK YOU ONCE AGAIN😍🙂

  • @jimh6189
    @jimh6189 2 หลายเดือนก่อน

    @ 9:03 The inverting node is at 0Volts. Logic dictates that current will always flow from positive to ground. However, since the current at the inverting input is zero, there can be no current going from the output to that ground node. This means that the output MUST have a voltage lower than zero volts. So we drive a predetermined voltage to the load. This predetermined voltage to the load implies a load CURRENT which is determined solely by the output voltage. Therefore any remaining current must be sourced/sinked by the op-amp output. This is interesting, because you would think that at zero impedance all the current would flow into the op-amp (least resistance). But in this case it does not.

  • @jt3guitar
    @jt3guitar 8 หลายเดือนก่อน +2

    Thank you for your great work, Aaron! I am working through your basic circuits playlist and am falling head over heels for this subject! You have a gift to help even a stubborn learner like myself understand it so far. :)

  • @jimh6189
    @jimh6189 2 หลายเดือนก่อน

    In the industry I have never heard anyone talk about "infinite" gain. Rather the term "rail" is used. "The output voltage has gone to the rail". The "rail" being the maximum allowed voltage the op amp can go to. Thus, the "gain" is not so much the response of the OUTPUT to the input, but rather just how small an input difference will drive the output to the rail. I also hear the term "sensitivity", but I don't know if it is directly related to op amp gain, or just the circuit configuration.

  • @sefalibhakat143
    @sefalibhakat143 8 หลายเดือนก่อน

    Thanks again...

  • @xaiver3612
    @xaiver3612 8 หลายเดือนก่อน

    i was looking for a video about op amps, thanks😊

  • @antoinedupuis3652
    @antoinedupuis3652 5 หลายเดือนก่อน

    Hi, thanks a lot for the very nice video !
    However, that is something that I don't get. You mention the assumption of having an infinite gain gives that V+ = V-.
    So in non-ideal case, that is the gain isn't infinite, shouldn't we have V+ not equal to V- ?

  • @ahmadarafeh7580
    @ahmadarafeh7580 8 หลายเดือนก่อน

    Why the rest of playlist is hidden

  • @comeflywithme1694
    @comeflywithme1694 5 หลายเดือนก่อน

    second best to being a student in your class

  • @jimh6189
    @jimh6189 2 หลายเดือนก่อน

    The question asked by most intelligent students is this: If V+ is equal to V- then why is the op amp output 2V when the input is 1V (with gain of 2 as shown here), and not equal to zero? Since it seems that nobody has the answer to this question I will take my best guess: I think that it's because of the *time delay* between the assertion of the output and the feedback loop back to the op amp input. So as V1 approaches V2, the output approaches 0V. However, when the output voltage just start to drop (say 1.99999V) the voltage divider feedback node voltage also drops. At this point the V- input no longer is equal to the V+ input. With V+ not equal to V- the output voltage goes back up again. So, in essence, V1 never equals V2, but rather V2 oscillates back and forth between V1+ and V1-. Also, the output voltage should also oscillate between say 1.99999V and 2.00001V. You probably will not be able to see such a small oscillation on an oscilloscope (signal to noise ratio). The only way to test this theory is to delay the feedback of the voltage divider (think capacitor) sufficiently that the V1 - V2 imbalance lasts long enough for the output to oscillate. Of course I would not expect a simple college professor to think of such an experiment. By understanding how to make op amps fail is critical to understanding how to make your designs stable.

  • @jimh6189
    @jimh6189 2 หลายเดือนก่อน

    So, it looks like the inverting op amp configuration is exactly the same as the non-inverting, except that the voltage input and GND are simply swapped. Why the circuit is drawn upside down and the resistor configuration is completely changed to obscure this fact baffles me. Try drawing the non-inverting op amp first, then just swap the input with ground. Is the circuit now the inverting op-amp configuration. Because for me that would be much easier to remember. Now, for the sake of the schematic I guess you have to flip everything upside down because people expect ground to face, well...
    towards the ground?
    Sorry, I didn't know if you like intellectual comments or just fan worship. I don't do the latter.