Design Representation

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[@ritampal3393]

thank you sir for your helpful content. this helped a lot in our final year semester exam

[@shubhamsaini5542]

Good lecture

[@maharshisanandyadav]

Sir suggest the Best Text book for this subject

[@akshrastogi2479]

At 4 bit adder verilog code in instance B0 the carryin port is defined as cy_in but ci is written.

[@vijaypratapsharma7001]

The best lectures available on VLSI DESIGN

[@proudindian9807]

The best lectures available on VLSI DESIGN, thank you soo much Sir

[@vinaychipirichetti5855]

Very helpful and good lectures.
Thank you sir.

[@shaun1165]

Thank you for the overview of different representations of digital design. The ripple carry adder example was very clear and concise. Would love to learn more about the physical assignment of design components.

[@soniamai8243]

thank you Sir for your good content.

[@reshmas3714]

Thank you sir

[@NaveenYoYoDude]

Any idea where we can get the slides?

[@sJANJULURISONIYA]

If you join the nptel course ,they will provide these ppts

[@got624]

Do u found slides

[@pawansharma6226]

do you have it???​@@sJANJULURISONIYA