I'm learning a LOT from this series. I was an electronics hobbiest in my teens (during the late 1970s). I recently returned to hardware after 40 years of software engineering. I have been "hand soldering" with a soldering iron. I've seen videos on "micro soldering" from folks repairing modern laptop circuit boards. I thought the hot-air approach was only for that. THIS is the first time I've seen "paste" applied (with a template no less) and SMDs hot-aired onto a virgin board. Also, the tools you're using (CAD and such for circuit diagrams and circuit board design) have been very instructive. Watching you do this helps me know that my own custom circuit boards are in my future. Thanks again for a great series.
Glad you are enjoying this. One thing many later arrivals to the series don't pick up on immediately is that the main cpu series was pretty much me starting in electronics. My first designed pcb's, first smd soldering are all there. If I can learn to do it anyone can!
Someone out there ought to write a simulator for this thing so we can play around with some code for it, send it to you and see it run ont this beast. Just epic to see this thing become what it is. Thanks James.
Awesome to see more VGA progress. I thought it was odd when you said AND gate and were adding a 7432. I thought at the time you just misspoke. Great to see you got it working.
Demorgan tells us ANDs and ORs are equivalent with inverted inputs and output. Although not intended in this case, a 7432 is a quad 2-input AND, with inversion bubbles all around.
No kidding, I’m sitting right now hooking up my 25.175 MHz oscillator and ‘161 timer ICs to begin my own VGA card when I saw this video was uploaded. It’s nice to have your videos for inspiration, great stuff!
Watched twice. The Intrigue. I love how you open with "Hopefully I won't come across anything that makes me doubt the PCB layout"... Ominous foreshadowings ? Was that thunder
Thanks Rod! Very pleased you’ve been enjoying this stuff, not sure about the expert bit. These work lies in between the stuff I’m truest expert in and things I’m learning as I go.
Awesome as always! I managed to spot the 74HCT32 mistake, but my lack of experience led me to believe I was wrong about the active low outputs, and you were just OR-ing two active high outputs. Turns out I was half-right, since I mistakenly thought you needed a NAND gate to OR the two active low outputs! I've finally got my hands on some chips / MCUs recently and just need project ideas now.
This was excellent. I really appreciate the amount of time you are putting into your videos. I imagine working on all of this already tedious enough, without trying to work around a camera and all the provisions it requires. This was especially interesting. I am curious if you are thinking about shrinking this all down when the components are all finished. Let me just reiterate how interesting all of this. Thanks!!
Nice board. I saw the HCT32 placed in the schematic at the same time you mentioned needing to AND the 138 outputs to create 8K regions. Easy enough mistake, and, of course, the saving grace was the identical pinout between the 08 and 32. (Thanks to the guys in the 70's that standardized the pinouts for 2 input gates!) Fortunately, using the OR gates simply caused no memory selections to occur. Your R & R looked spectacularly easy, too! Wish I could have the same level of skill/luck when doing the same. :) Finally, you seemed to very quickly come to the conclusion that grounding was an issue. I don't think I'd have been able to solve one like that so quickly. My first suspicion was that loading was periodically not occurring in the H-scroll register or the data was getting corrupted on the way to H-scroll, which it seems was partially correct, but for different reasons than I suspected. Nice work. (Sorry for the long comment, but alot happened in this video about making video!)
When I pulled the register lines high and the distortion was still happening I was immediately suspicious of the line counter, that is being driven by a temporary fly cable coming out of the top of the sync board with no ground return (The ground return path from that is crazy!). Pretty sure the signal will be much cleaner with that connected properly.
It wasn't quite clear if the ground bounce problem and extra grounds was only the protoboards, or the pcbs; If you find that you need extra grounds between the card and the backplane, you can find a spot where there is ground both on the backplane and the card, preferably in-grid for aesthetics, and just drill through both. I my box of fixes I have a 2mm drill I think is for wood as it has a spike in the middle, but it is excellent for removing solder mask around a new hole. Perfect dual-side soldered pins that look factory:-). I am quite curious to what the signal integrity looks like, and there will probably be a few video-worthy surprises in there. Eye diagrams maybe?
Interesting! Hopefully I wont' need to consider modding the boards but I do think I need to pay more attention to ground return paths. I'll be spending some time with the scope soon but the likely reason for it being especially bad is the two clusters of long signal wires between the pcb's and the breadboards that don't have a ground return.
@@weirdboyjim I'm currently planning out a PCB CPU myself, and one of the central features I'm designing for is for any long-distance signals to use differential signaling -- using using M-LVDS transcievers and differential trace routiong with signal-to-signal length matching. Hoping to be able to run >100 MHz clocks!
Another excellent video! I was a bit confused about your changing around some of the lines on the 138s. Would that not mess with where in the address space the VGA circuit will be? Say for instance the memory mapped I/O registers?
Interested in your backplane concept. It makes sense for video since everything is laid out flat, however generally cards slot in bookshelf style - on edge with a standard backplane/motherboard connection. Using the 3rd dimension to manage space. Are you considering an option to collapse various parts of the backplane into the traditional motherboard/90º cards arrangement? I guess no functional reason - other than it perhaps standardises bus/line access within a system.
I'm laying everything out flat for presentation more than anything else. Technically when people say "backplane" it's mostly direct connections, this is more of an interconnect board.
@@weirdboyjim LOL!! Indeed. There are almost too many to make sense, unless you focus on just one module, otherwise it is just visual noise. I am really jazzed about the tile map graphics subsystem. And one final note, you misspelled palette in EasyEDA, it is of no real consequence, and it is an easy fix, it just bugged me. Your videos are just so much fun and educational. I wonder how complex deep pipe lining, branch prediction and speculative execution would get.
Nice. But that 32 / 08 mix up had me shouting at the TV as soon as you drew it on the schematic. Easy, I know, but I was also looking at a bunch of 138s and other similar stuff logic last week when reverse engineering a board that I put in my junk box about 30 years ago... Glad you got there without too much pain. I am sure more grounds with the signals would help prevent the marginal glitching that you then saw, but there's also a good chance that it will clean up enough as soon as you get the rest of the design moved on to a proper PCB instead of the prototyping boards.
Yeah, I need to account for ground more but after staring at the build while editing the video I'm pretty confident this the issue here was the signals coming out of the debug pins in the sync board driving the vertical counter. The ground return path is very awful for the signal.
These problems might be more avoidable if traditional logical symbols were used instead of representations of the physical ICs. Can’t wait to see what games you can write for the beast!
Nice video once again. Interesting that the PCB version seemed to be more prone to grounding issues, I would have thought the other way around. I wonder what's the reason for that. By the way - I'm not sure if this was printed anywhere on the circuit board, but the word should be "palette", not "pallete".
Not sure about this here yet but in the past the ground issues have been at the worst at the boundary between the pcb's and breadboards as I end up with longer wires there.
Yes although the count would be distorted by using chips with functionality that is unused (Think of all the output and enable lines that are pulled high or low). There is also an interesting discussion in the discord at the moment on creating functionality from transistors that shows it can be much more efficient to do it directly than using direct mapping from gates to their transistor arrangement counter parts.
Maybe a bit early for this question, but anyway. Given you don't have interrupts, is handling sprite collisions easy enough? Are interrupts actually used by games developers to handle sprite collisions?
There were some platforms that had some feedback from the sprite system that could be used for collisions. Understand I'm not trying to reproduce any pre-existing system. My sprite system will be very basic just for assisting with visuals, no reason why collision can't be done in software.
I usually release the pcb schematics a little while after showing the circuit soldered and working. oshwlab.com/weirdboyjim?page=1&tab=project You can always bug me on the relevant project channel on discord if I'm being slow.
I'm not experienced at all with this chip-level logic circuits, that's why it fascinates me that much. But I'm not sure if I fully understand the part with the 74HC138s: Is every possible address in that range really pulled out to one separate line, or are there gaps where addresses don't do anything? Are somehow the EasyEDA files accessible to read ?
You'd only use them to point to chunks of memory, how big a chunk is up to you. The 138 has 8 possible outputs, so you could use it to point to 8K chunks of a 64K address space, or 4K chunks of a 32K one. For example, if you wired the input lines to A13-A15 of the address bus that gives you 8x8K blocks of address space. If on the other hand you wired it so the 138 was only active when Address line A13 was low, but A14 and A15 were high and connected A10-A12 to the inputs, you'd have 8x1K blocks situated between 0xC000 and 0xDFFF.
@@2thinkcritically That's not really what I meant. I don't have the schematic in front of me, so excuse me, when I recall it wrongly. Wasn't it so that when A13-A15 were low, the first output was set High and therefore Enabling the second 138 which uses A9-A11. So whenever A13, A14, or A15 is low, the second 138 will be disabled, so A9-A11 will be irrelevant thus creating gaps in the adress space, because 00100011111111 does the same as 00101011111111
@@Schwuuuuup In also writing this without access to a schematic, so take anything I say here as examples of operation rather than anything that specifically relate to this project 😁 If A13-A15 are wired into the inputs of the first 138, and the second has it's /enable line connected to Y0 of the first 138, then the second 138 will be active when A13-A15 are all low. If the second 138 has its inputs connected to A9-A11 then yes, A12 is technically being ignored, but only when the second 138 is active - assuming A12 isn't connected somewhere else with the circuits connected to outputs of the second 138.
@@2thinkcritically Sure, if A9-A11 is used somewhere else, the gaps could be filled, but I did not see any of this. the second set of 138 uses A3-A5 and A0-A3 on their address pins and A6, A7 and A8 on their enable Pins. In the meantime I looked up the datasheet for the 138, and there is a reference design consisting of 4 138s and one inverter to give you 32 outputs in an contiguous address space. this seems much cleaner and less wasteful to me ;-)
The 138 is a 3 to 8 lines decoder. So you can take 3 lines in binary and decode that to 8 selection lines. There are various select inputs as well that let you make for more complex arrangements. I actually made a video about the chip early on which you may find useful. th-cam.com/video/F2KTyoMUQQA/w-d-xo.html
The circuit is driving 640x480 but that would take a lot of ram, more than I can address to do well. Eventually the circuit will make the full resolution by having a tile map that references 8x8 tiles. That will loose the flexibility of a true bitmap but you can move things around quickly (hence early gaming systems using a similar technique).
@@weirdboyjim Very cool. I'll look forward to that feature. It occurred to me that if you weren't doing full 640x480, you didn't necessarily have to drive the circuits at 25Mhz. And if the future includes a 8x8 tile then you still need that clock rate.
![[MV] A leap of faith...ความเชื่อใจครั้งสุดท้าย (From "Petrichor the series")](http://i.ytimg.com/vi/U1piZH2CNXA/mqdefault.jpg)
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I'm learning a LOT from this series. I was an electronics hobbiest in my teens (during the late 1970s). I recently returned to hardware after 40 years of software engineering. I have been "hand soldering" with a soldering iron. I've seen videos on "micro soldering" from folks repairing modern laptop circuit boards. I thought the hot-air approach was only for that. THIS is the first time I've seen "paste" applied (with a template no less) and SMDs hot-aired onto a virgin board. Also, the tools you're using (CAD and such for circuit diagrams and circuit board design) have been very instructive. Watching you do this helps me know that my own custom circuit boards are in my future. Thanks again for a great series.
Glad you are enjoying this. One thing many later arrivals to the series don't pick up on immediately is that the main cpu series was pretty much me starting in electronics. My first designed pcb's, first smd soldering are all there. If I can learn to do it anyone can!
I think its awesome that you show the mistakes you make during the process. It's easy for people to forget that making errors is apart of the process.
Of course, my channel is supposed to be documenting projects, not playing pretend ;-)
keeping us addicted to digital architecture one video at a time
I'm just happy people are finding this stuff interesting!
Heard FPGA in one video and can't wait for the DIY FPGA from ROM chips.
Someone out there ought to write a simulator for this thing so we can play around with some code for it, send it to you and see it run ont this beast. Just epic to see this thing become what it is. Thanks James.
There are actually a few different ones floating around now. I have a simulator I've been working on myself that I'll release at some point.
Awesome to see more VGA progress. I thought it was odd when you said AND gate and were adding a 7432. I thought at the time you just misspoke. Great to see you got it working.
Yeah, it was a stupid mistake that I don't have a good excuse for.
Demorgan tells us ANDs and ORs are equivalent with inverted inputs and output. Although not intended in this case, a 7432 is a quad 2-input AND, with inversion bubbles all around.
@@lmiddleman I believe that's exactly how James is using the 7408, as a quad 2-input OR with active low inputs and outputs.
No kidding, I’m sitting right now hooking up my 25.175 MHz oscillator and ‘161 timer ICs to begin my own VGA card when I saw this video was uploaded.
It’s nice to have your videos for inspiration, great stuff!
Nice! Hope it goes well!
Watched twice. The Intrigue. I love how you open with "Hopefully I won't come across anything that makes me doubt the PCB layout"... Ominous foreshadowings ? Was that thunder
There are already a few things I'd like to change on it :-)
You are such a bad ass. It's a pleasure watching an expert work. Thank you for the content.
Thanks Rod! Very pleased you’ve been enjoying this stuff, not sure about the expert bit. These work lies in between the stuff I’m truest expert in and things I’m learning as I go.
Rough and Tough. These are the moments sent to try us. Well played sir.
Thanks! Not the worst issues I've dealt with.
Awesome as always! I managed to spot the 74HCT32 mistake, but my lack of experience led me to believe I was wrong about the active low outputs, and you were just OR-ing two active high outputs. Turns out I was half-right, since I mistakenly thought you needed a NAND gate to OR the two active low outputs!
I've finally got my hands on some chips / MCUs recently and just need project ideas now.
Thanks! One of the worst things about this youtube lark is watching your own mistakes back during the video editing process!
This was excellent. I really appreciate the amount of time you are putting into your videos. I imagine working on all of this already tedious enough, without trying to work around a camera and all the provisions it requires. This was especially interesting. I am curious if you are thinking about shrinking this all down when the components are all finished. Let me just reiterate how interesting all of this. Thanks!!
Glad you are finding it interesting! If I wasn't trying to keep it all as sperate modules I could probably save a bunch of space.
Nice board. I saw the HCT32 placed in the schematic at the same time you mentioned needing to AND the 138 outputs to create 8K regions. Easy enough mistake, and, of course, the saving grace was the identical pinout between the 08 and 32. (Thanks to the guys in the 70's that standardized the pinouts for 2 input gates!) Fortunately, using the OR gates simply caused no memory selections to occur.
Your R & R looked spectacularly easy, too! Wish I could have the same level of skill/luck when doing the same. :)
Finally, you seemed to very quickly come to the conclusion that grounding was an issue. I don't think I'd have been able to solve one like that so quickly. My first suspicion was that loading was periodically not occurring in the H-scroll register or the data was getting corrupted on the way to H-scroll, which it seems was partially correct, but for different reasons than I suspected. Nice work.
(Sorry for the long comment, but alot happened in this video about making video!)
When I pulled the register lines high and the distortion was still happening I was immediately suspicious of the line counter, that is being driven by a temporary fly cable coming out of the top of the sync board with no ground return (The ground return path from that is crazy!). Pretty sure the signal will be much cleaner with that connected properly.
It wasn't quite clear if the ground bounce problem and extra grounds was only the protoboards, or the pcbs; If you find that you need extra grounds between the card and the backplane, you can find a spot where there is ground both on the backplane and the card, preferably in-grid for aesthetics, and just drill through both. I my box of fixes I have a 2mm drill I think is for wood as it has a spike in the middle, but it is excellent for removing solder mask around a new hole. Perfect dual-side soldered pins that look factory:-). I am quite curious to what the signal integrity looks like, and there will probably be a few video-worthy surprises in there. Eye diagrams maybe?
Interesting! Hopefully I wont' need to consider modding the boards but I do think I need to pay more attention to ground return paths. I'll be spending some time with the scope soon but the likely reason for it being especially bad is the two clusters of long signal wires between the pcb's and the breadboards that don't have a ground return.
@@weirdboyjim I'm currently planning out a PCB CPU myself, and one of the central features I'm designing for is for any long-distance signals to use differential signaling -- using using M-LVDS transcievers and differential trace routiong with signal-to-signal length matching. Hoping to be able to run >100 MHz clocks!
Another excellent video! I was a bit confused about your changing around some of the lines on the 138s. Would that not mess with where in the address space the VGA circuit will be? Say for instance the memory mapped I/O registers?
Well I did move the vga registers from 0x8b00-0x8b07 to 0x8b80 -0x8b87 as it saved me an extra chip.
@@weirdboyjim Ah, I missed that change, sorry.
Your voice is your best asset. The rest is simply perfect
I think everyone hates hearing their own voice so it's weird to hear someone say something positive!
Interested in your backplane concept.
It makes sense for video since everything is laid out flat, however generally cards slot in bookshelf style - on edge with a standard backplane/motherboard connection.
Using the 3rd dimension to manage space.
Are you considering an option to collapse various parts of the backplane into the traditional motherboard/90º cards arrangement?
I guess no functional reason - other than it perhaps standardises bus/line access within a system.
I'm laying everything out flat for presentation more than anything else. Technically when people say "backplane" it's mostly direct connections, this is more of an interconnect board.
I find your lack of LEDs disturbing. But I agree a bunch of LEDs on this board would be redundant.
My "Led's per square foot" average is still up there with some display panels!
@@weirdboyjim LOL!! Indeed. There are almost too many to make sense, unless you focus on just one module, otherwise it is just visual noise.
I am really jazzed about the tile map graphics subsystem.
And one final note, you misspelled palette in EasyEDA, it is of no real consequence, and it is an easy fix, it just bugged me. Your videos are just so much fun and educational. I wonder how complex deep pipe lining, branch prediction and speculative execution would get.
Fascinating stuff, good job, great video!
Thanks Marcel!
Nice. But that 32 / 08 mix up had me shouting at the TV as soon as you drew it on the schematic. Easy, I know, but I was also looking at a bunch of 138s and other similar stuff logic last week when reverse engineering a board that I put in my junk box about 30 years ago... Glad you got there without too much pain. I am sure more grounds with the signals would help prevent the marginal glitching that you then saw, but there's also a good chance that it will clean up enough as soon as you get the rest of the design moved on to a proper PCB instead of the prototyping boards.
Yeah, I need to account for ground more but after staring at the build while editing the video I'm pretty confident this the issue here was the signals coming out of the debug pins in the sync board driving the vertical counter. The ground return path is very awful for the signal.
Great progress, matey! Nicely done!
Thanks George.
These problems might be more avoidable if traditional logical symbols were used instead of representations of the physical ICs. Can’t wait to see what games you can write for the beast!
Don’t underestimate the range of mistakes an engineer can make!
Nice video once again. Interesting that the PCB version seemed to be more prone to grounding issues, I would have thought the other way around. I wonder what's the reason for that. By the way - I'm not sure if this was printed anywhere on the circuit board, but the word should be "palette", not "pallete".
Not sure about this here yet but in the past the ground issues have been at the worst at the boundary between the pcb's and breadboards as I end up with longer wires there.
It would be interesting to know how many transistors this cpu build is up to if we tallied up all the IC's.
Yes although the count would be distorted by using chips with functionality that is unused (Think of all the output and enable lines that are pulled high or low). There is also an interesting discussion in the discord at the moment on creating functionality from transistors that shows it can be much more efficient to do it directly than using direct mapping from gates to their transistor arrangement counter parts.
Excellent. Glued to every minute. 👍
Glad you liked it!
Maybe a bit early for this question, but anyway. Given you don't have interrupts, is handling sprite collisions easy enough? Are interrupts actually used by games developers to handle sprite collisions?
There were some platforms that had some feedback from the sprite system that could be used for collisions. Understand I'm not trying to reproduce any pre-existing system. My sprite system will be very basic just for assisting with visuals, no reason why collision can't be done in software.
Did I miss an episode? I'm not sure ...did you do the sprites and tile maps circuits already? Otherwise.... well done...looking great!
Those are still to come but I can’t avoid a bit of preparation work In other pcb’s.
@@weirdboyjim Ah ok... was not sure..thanks!
Ooo.. Tile, sprite and palette data, Sounds like you are going for a big upgrade to the VGA circuitry. Are you designing the VIC chip James?
Not really designing to match any specific functionality set, just trying to explore the general 8-bit era tools.
@@weirdboyjimLooking forward to it.
Amazing videos! Can we get or buy your schematics?
I usually release the pcb schematics a little while after showing the circuit soldered and working. oshwlab.com/weirdboyjim?page=1&tab=project You can always bug me on the relevant project channel on discord if I'm being slow.
@@weirdboyjim Thanks James, keep up the good work! As always, I look forward to your next video!
You made it look so easy!
Thanks Philip, glad you are enjoying!
And, or, same thing, really :)
Can confuse it even more by saying I needed to logically OR the signals which requires AND gates for active low signals.
@@weirdboyjim everytime I try something like this (e.g. to wire up one chip to an atmega), active high and/or active high gets me
Yeah james is just keep going'!!!
I'll do my best!
I'm not experienced at all with this chip-level logic circuits, that's why it fascinates me that much. But I'm not sure if I fully understand the part with the 74HC138s: Is every possible address in that range really pulled out to one separate line, or are there gaps where addresses don't do anything?
Are somehow the EasyEDA files accessible to read ?
You'd only use them to point to chunks of memory, how big a chunk is up to you. The 138 has 8 possible outputs, so you could use it to point to 8K chunks of a 64K address space, or 4K chunks of a 32K one. For example, if you wired the input lines to A13-A15 of the address bus that gives you 8x8K blocks of address space. If on the other hand you wired it so the 138 was only active when Address line A13 was low, but A14 and A15 were high and connected A10-A12 to the inputs, you'd have 8x1K blocks situated between 0xC000 and 0xDFFF.
@@2thinkcritically That's not really what I meant. I don't have the schematic in front of me, so excuse me, when I recall it wrongly. Wasn't it so that when A13-A15 were low, the first output was set High and therefore Enabling the second 138 which uses A9-A11. So whenever A13, A14, or A15 is low, the second 138 will be disabled, so A9-A11 will be irrelevant thus creating gaps in the adress space, because 00100011111111 does the same as 00101011111111
@@Schwuuuuup In also writing this without access to a schematic, so take anything I say here as examples of operation rather than anything that specifically relate to this project 😁
If A13-A15 are wired into the inputs of the first 138, and the second has it's /enable line connected to Y0 of the first 138, then the second 138 will be active when A13-A15 are all low. If the second 138 has its inputs connected to A9-A11 then yes, A12 is technically being ignored, but only when the second 138 is active - assuming A12 isn't connected somewhere else with the circuits connected to outputs of the second 138.
@@2thinkcritically Sure, if A9-A11 is used somewhere else, the gaps could be filled, but I did not see any of this. the second set of 138 uses A3-A5 and A0-A3 on their address pins and A6, A7 and A8 on their enable Pins. In the meantime I looked up the datasheet for the 138, and there is a reference design consisting of 4 138s and one inverter to give you 32 outputs in an contiguous address space. this seems much cleaner and less wasteful to me ;-)
The 138 is a 3 to 8 lines decoder. So you can take 3 lines in binary and decode that to 8 selection lines. There are various select inputs as well that let you make for more complex arrangements. I actually made a video about the chip early on which you may find useful. th-cam.com/video/F2KTyoMUQQA/w-d-xo.html
yet again, good work
Thanks Steven!
Should the board be "VGA Interface" and not "Memory Interface"? 🤷
Naming things is hard! Inside the vga it's the "Memory Interface", in the system as a whole it's the "Vga Interface".
@@weirdboyjim makes sense. I can see why it's memory interface. Anywho! Nice progress!
29:00 - i thought these microscope are useless but if you manage to use them they might indeed be handy! :)
Take a look here: th-cam.com/video/6NBQCpCHtKQ/w-d-xo.html if you want to see few more comments on it.
great work james!
Thank you! Cheers Kim!
Will this run Crysis 2 plz?
Hmm, what was the min-spec for that again?
@@weirdboyjim it was always "one step up from the system you currently own."
I personally would be happy with Doom
Well done!
Thanks Peter!
Whats the actual resolution of your vga? Because 8k of ram implies less than 640x480.
The circuit is driving 640x480 but that would take a lot of ram, more than I can address to do well. Eventually the circuit will make the full resolution by having a tile map that references 8x8 tiles. That will loose the flexibility of a true bitmap but you can move things around quickly (hence early gaming systems using a similar technique).
@@weirdboyjim Very cool. I'll look forward to that feature. It occurred to me that if you weren't doing full 640x480, you didn't necessarily have to drive the circuits at 25Mhz. And if the future includes a 8x8 tile then you still need that clock rate.
Too easy to order the PCB. I'd be in trouble.
SMD looks so much easier than through hole.
Yeah, smd was really devised to make mass assembly easier.