I can't believe how you brought this small chip that was invented in 1971 back to life and instilled in the heart of every listener the spirit of enjoying this simple invention. Thnx mate
The 555 was, is and will be. It's one of the timeless chips which is ironic, being a timer. I still use one every chance I get. A search for 555 at Digikey returns 416 line items and shows they have stocking levels in the millions of chips. Fun fact: Every Apple ][ computer with a 5 1/4 disk drive contained at least nine 555 cores. (1 for power on reset, 1 for cursor blinking, 1 for key repeat, 4 for reading joystick pots, and 2 for timing disk drive motors)
That active load is indeed a neat little trick. I used one in the input stage of my homemade op-amp, it not only increases the gain per stage but also the GBW product making the op-amp faster.
The 2 comparators have different operating points, but for both of them the need is to, when the input is out of the mid range, to have a fast charge injection or removal from the flip flop stage, so they are designed, for the upper one, to turn on and supply current into the flip flop stage fast, but recovery when it drops is not as critical, provided it is just fast enough. Same for the lower, it pulls current out of the flip flop, turning it to the other state fast, but recovery again, as the slow edge does not worry the output state at all, is slow. This use of one input to the flip flop being active high, and the other active low, helped with the design, saving the need to put in an inversion stage, with the need for then level shifting of the one, to handle the different levels of the comparators, and also the need for large areas consumed by polysilicon resistors, as the transistor active loads are much smaller than the equivalent in polysilicon resistors, and the 100k pull down on the lower comparator is achieved by having the resistor actually being made using a very small JFET, with the gate strapped to hold it hard off, and thus it varies resistance minimally with voltage, meaning it acts as a weak pull down R6 at trigger, keeping Q15 off, but using minimal board area. The flip flop designed that way needed fewer transistors, and also, as you just have a single output driving the power stages, you made it simpler as well. The different levels of the comparators also interfaced with the flip flop well, saving area, which was a big thing when designed, as making the chip smaller meant a lot more per 6inch wafer, and even more so with larger wafers. Thus no stability capacitors, instead using the inherent capacitors of the junctions to make the comparators stable at transition, and, aside from the output having that cross conduction in switching, made it faster. You got used to having a 555 timer design having the main power supply decoupling right by it, just for that, and the rest of the TTL barely needing any bypass overall. Till the advent of cheap mosfet drivers, you often found a 555 timer being used as an inverting driver and level shifter, simply using a 3k3 resistor from pin 5 to ground, to force it to be 'more or less' TTL compatible with a 12V supply. They say 500mA, but you can easily get the originals to 1A of current drive on a MOSFET gate, though the modern ones are wimpy compared to the old process ones, and for more pull down connect 7 to 3, to get that gate charge out faster. Better have that 1000uF low ESR capacitor right by pins 1 and 8 though, the current would be nasty. Still got a few TO100 can versions, ran them with clip on heatsinks, driving piezo transducers direct in push pull, they ran rather hot without them, with them just merely uncomfortably warm, though the transducers were kind of hard driven, at 24Vpp on them, as ultrasonic deterrents. Worked on the bats, they decided to decamp after a week.
Moments like these make me hate 'apps' and web2-3.0... I *really* want to sit down and read this comment when my brain's in the right state... but how can I friggin' bookmark it for later?!
you touch really close to an idea that I have been thinking about regarding how to teach circuit design. that is the idea that what we should consider teaching first is not transistors, tubes, diodes, etc,... but rather start with those devices you see as root devices in Spice. that is current sources, controlled sources, voltage sources and the controlled version, etc. then AFTER students understand those items you behavior model transistors etc with the sources to explain the configuration/topology of various circuits. --- I imagine that had we been taught in that way - circuit design/analysis would be simpler.
we were taught that way... frankly, I found it exceptionally more confusing because there's no such thing as a current source without active components, so the transistor models were an act of infinite recursion. VERY confusing.
Small correction: A darlington pair differential amplifier has less differential current gain than a single transistor differential pair. Collector current ratio for single transistor pair is I0/I1=E^(DiffVoltage/TempVoltage), for darlington pair is I0/I1=E^(DiffVoltage/2 * TempVoltage). I think in case of 555, the Darlington pair decreases input current and allows seeing voltages very close to supply rail.
Darlingtons reduce the input currents of pins 2 and 6. Since most designs connect these two pins together, their NPN/PNP input currents tend to cancel out, at least roughly. The threshold voltages are 1/3 and 2/3 of VCC, therefore sensing at GND level is possible but not the primary usage of a timer IC.
According to the designer of the 555 Timer Hans Camenzind it got it's name because his boss at Signetics liked the number 555. At least that is what he said in his book Designing Analog Chips
I was wrong in my previous comment. The currents are not constant. But they are equal by current mirror. Using KCL at collector output node, the output current can be calculated as 2x the delta Ic of the right side or left side. Anyway the first stage is still a voltage-to-current amplifier.
I think I get the current mirror going into the two sides of the teeter-totter... The extra current on the other side is *blocked* from going through its collector, and therefore has to go *somewhere* which then forces that extra current into the base of the transistor in the *next stage* of the circuit. It wouldn't work well, I don't think, if the next stage couldn't sink it (e.g. if it were Hi-Z input).
15:43 I don't understand why you need Q5 and Q8. All 3 pins are connected together. If i pause the video and cover up pin 1 of Q5/Q8, pin 3 to pin 2 is basically a diode. When Q1 is turned on, it pulls the base of Q6 down, turning it on (Q6 is PNP), which allows current to flow out of pin 1 to R11 and Q15.
Q5+6 work as a current mirror although the "mirror ratio" is not 1:1. Same for Q8. You can also think of Q5 being a nonlinear current to voltage converter which is matched to the Vbe of Q6. The emitter resistors determine the ratio of collector currents.
Love the more in depth explanation. Oddly for that last few videos you put out seem to be about just the stuff I been wanting to get more understanding of. I been searching for discrete comparator circuits to understand it further (and possibly make my own comparator for the fun of it). Do you have a discord server?
@@IMSAIGuy Thank you, looks like a good read. It does show c-mos circuits provided you have fet's with a substrate terminal, which will prove hard to find to make one from discrete components but never the less it does provide a good understanding.
Op-Amps also have a lot of gain but make poor comparators unless one supplies some positive feedback to ensure some hysteresis and prevent oscillation at the threshold voltage. Is the current mirror in the 2/3 V comparator of the 555 effectively fulfilling the same role by injecting more current into the opposite side of the differential pair?
By holding the currents constant at the top, all the delta current will be squeezed out of the collector. They want maximum current, they don't want voltage.
Yes, but the duty cycle is a secondary effect. I have to dig out the old data sheet where it was called "FM", rather than the somewhat wishy-washy term "control".
I get what you wrote about SPWM and FM, but I don't understand the context of AM ? Which carrier frequency do you have in mind? Meanwhile, I found the diagram that calls pin 5 "FM". It's in a Valvo databook from 1988. Valvo was a German (Hamburg) subsidiary of Philips (Valvo made all kinds of tubes and semiconductors etc since the 1920s). In 1975, Philips bought Signetics. Most content of the book looks like it originally came from Signetics.
I was also wondering why they were throwing away so much gain. I think it's because They needed to drive Q15 almost into saturation to flip the flop. Using the dual current mirrors would require a bunch of transistors to get it right. Perhaps the juice just wasn't worth the squeeze. As soon as Q15 conducts, the circuit enters the discharge phase which has quite some dead-time and timing uncertainties due to transistors getting saturated. So why waste chip area to add precision to a phase that is anyway not gonna be precise?
Pin 6 comparator gain forms part of the timing precision when used as monostable timer. Pin 2 precision is only relevant when used as oscillator. Not primary goal obviously.
It's like we're a little kid sitting in your lap being explained circuits. Excellent explanation!
You have amplified my understanding of differential pairs, current mirrors and active loads.
I can't believe how you brought this small chip that was invented in 1971 back to life and instilled in the heart of every listener the spirit of enjoying this simple invention.
Thnx mate
The 555 was, is and will be. It's one of the timeless chips which is ironic, being a timer. I still use one every chance I get.
A search for 555 at Digikey returns 416 line items and shows they have stocking levels in the millions of chips.
Fun fact: Every Apple ][ computer with a 5 1/4 disk drive contained at least nine 555 cores. (1 for power on reset, 1 for cursor blinking, 1 for key repeat, 4 for reading joystick pots, and 2 for timing disk drive motors)
The 555 has so many things to teach us!
I’m always impressed with how clean the PWM signal appears on your scope. Thanks for the video!
That active load is indeed a neat little trick. I used one in the input stage of my homemade op-amp, it not only increases the gain per stage but also the GBW product making the op-amp faster.
The 2 comparators have different operating points, but for both of them the need is to, when the input is out of the mid range, to have a fast charge injection or removal from the flip flop stage, so they are designed, for the upper one, to turn on and supply current into the flip flop stage fast, but recovery when it drops is not as critical, provided it is just fast enough. Same for the lower, it pulls current out of the flip flop, turning it to the other state fast, but recovery again, as the slow edge does not worry the output state at all, is slow. This use of one input to the flip flop being active high, and the other active low, helped with the design, saving the need to put in an inversion stage, with the need for then level shifting of the one, to handle the different levels of the comparators, and also the need for large areas consumed by polysilicon resistors, as the transistor active loads are much smaller than the equivalent in polysilicon resistors, and the 100k pull down on the lower comparator is achieved by having the resistor actually being made using a very small JFET, with the gate strapped to hold it hard off, and thus it varies resistance minimally with voltage, meaning it acts as a weak pull down R6 at trigger, keeping Q15 off, but using minimal board area.
The flip flop designed that way needed fewer transistors, and also, as you just have a single output driving the power stages, you made it simpler as well. The different levels of the comparators also interfaced with the flip flop well, saving area, which was a big thing when designed, as making the chip smaller meant a lot more per 6inch wafer, and even more so with larger wafers. Thus no stability capacitors, instead using the inherent capacitors of the junctions to make the comparators stable at transition, and, aside from the output having that cross conduction in switching, made it faster. You got used to having a 555 timer design having the main power supply decoupling right by it, just for that, and the rest of the TTL barely needing any bypass overall.
Till the advent of cheap mosfet drivers, you often found a 555 timer being used as an inverting driver and level shifter, simply using a 3k3 resistor from pin 5 to ground, to force it to be 'more or less' TTL compatible with a 12V supply. They say 500mA, but you can easily get the originals to 1A of current drive on a MOSFET gate, though the modern ones are wimpy compared to the old process ones, and for more pull down connect 7 to 3, to get that gate charge out faster. Better have that 1000uF low ESR capacitor right by pins 1 and 8 though, the current would be nasty. Still got a few TO100 can versions, ran them with clip on heatsinks, driving piezo transducers direct in push pull, they ran rather hot without them, with them just merely uncomfortably warm, though the transducers were kind of hard driven, at 24Vpp on them, as ultrasonic deterrents. Worked on the bats, they decided to decamp after a week.
Moments like these make me hate 'apps' and web2-3.0...
I *really* want to sit down and read this comment when my brain's in the right state... but how can I friggin' bookmark it for later?!
I love this schematic video. Thanks!
Aha. The cell phone says this video was almos two months old. There should be lots of materials in the pipe ;)
you touch really close to an idea that I have been thinking about regarding how to teach circuit design. that is the idea that what we should consider teaching first is not transistors, tubes, diodes, etc,... but rather start with those devices you see as root devices in Spice. that is current sources, controlled sources, voltage sources and the controlled version, etc.
then AFTER students understand those items you behavior model transistors etc with the sources to explain the configuration/topology of various circuits.
---
I imagine that had we been taught in that way - circuit design/analysis would be simpler.
we were taught that way...
frankly, I found it exceptionally more confusing because there's no such thing as a current source without active components, so the transistor models were an act of infinite recursion. VERY confusing.
Small correction: A darlington pair differential amplifier has less differential current gain than a single transistor differential pair. Collector current ratio for single transistor pair is I0/I1=E^(DiffVoltage/TempVoltage), for darlington pair is I0/I1=E^(DiffVoltage/2 * TempVoltage). I think in case of 555, the Darlington pair decreases input current and allows seeing voltages very close to supply rail.
Darlingtons reduce the input currents of pins 2 and 6. Since most designs connect these two pins together, their NPN/PNP input currents tend to cancel out, at least roughly.
The threshold voltages are 1/3 and 2/3 of VCC, therefore sensing at GND level is possible but not the primary usage of a timer IC.
According to the designer of the 555 Timer Hans Camenzind it got it's name because his boss at Signetics liked the number 555. At least that is what he said in his book Designing Analog Chips
Awesome ! a new and improved 555 tutorial...cheers.
Learn a lot. Thanx.
I was wrong in my previous comment. The currents are not constant. But they are equal by current mirror. Using KCL at collector output node, the output current can be calculated as 2x the delta Ic of the right side or left side. Anyway the first stage is still a voltage-to-current amplifier.
I think I get the current mirror going into the two sides of the teeter-totter... The extra current on the other side is *blocked* from going through its collector, and therefore has to go *somewhere* which then forces that extra current into the base of the transistor in the *next stage* of the circuit.
It wouldn't work well, I don't think, if the next stage couldn't sink it (e.g. if it were Hi-Z input).
You're the best.
15:43 I don't understand why you need Q5 and Q8. All 3 pins are connected together. If i pause the video and cover up pin 1 of Q5/Q8, pin 3 to pin 2 is basically a diode. When Q1 is turned on, it pulls the base of Q6 down, turning it on (Q6 is PNP), which allows current to flow out of pin 1 to R11 and Q15.
Q5+6 work as a current mirror although the "mirror ratio" is not 1:1. Same for Q8. You can also think of Q5 being a nonlinear current to voltage converter which is matched to the Vbe of Q6. The emitter resistors determine the ratio of collector currents.
Love the more in depth explanation. Oddly for that last few videos you put out seem to be about just the stuff I been wanting to get more understanding of. I been searching for discrete comparator circuits to understand it further (and possibly make my own comparator for the fun of it). Do you have a discord server?
no
you should read this: www.designinganalogchips.com/_count/designinganalogchips.pdf
@@IMSAIGuy Thank you, looks like a good read. It does show c-mos circuits provided you have fet's with a substrate terminal, which will prove hard to find to make one from discrete components but never the less it does provide a good understanding.
Op-Amps also have a lot of gain but make poor comparators unless one supplies some positive feedback to ensure some hysteresis and prevent oscillation at the threshold voltage. Is the current mirror in the 2/3 V comparator of the 555 effectively fulfilling the same role by injecting more current into the opposite side of the differential pair?
By holding the currents constant at the top, all the delta current will be squeezed out of the collector. They want maximum current, they don't want voltage.
Pin 5 can be used for frequency modulation when the 555 is oscillating.
Yes, but the duty cycle is a secondary effect. I have to dig out the old data sheet where it was called "FM", rather than the somewhat wishy-washy term "control".
I get what you wrote about SPWM and FM, but I don't understand the context of AM ? Which carrier frequency do you have in mind?
Meanwhile, I found the diagram that calls pin 5 "FM". It's in a Valvo databook from 1988. Valvo was a German (Hamburg) subsidiary of Philips (Valvo made all kinds of tubes and semiconductors etc since the 1920s). In 1975, Philips bought Signetics. Most content of the book looks like it originally came from Signetics.
On many of your circuit/breadboard videos you use small bypass capacitors on your power rails. Could you do a short video on this topic?
Can someone explain why they didn't use the same buffered current mirror at the trigger comparator stage as at the threshold comparator?
I was also wondering why they were throwing away so much gain.
I think it's because They needed to drive Q15 almost into saturation to flip the flop. Using the dual current mirrors would require a bunch of transistors to get it right. Perhaps the juice just wasn't worth the squeeze. As soon as Q15 conducts, the circuit enters the discharge phase which has quite some dead-time and timing uncertainties due to transistors getting saturated. So why waste chip area to add precision to a phase that is anyway not gonna be precise?
Pin 6 comparator gain forms part of the timing precision when used as monostable timer.
Pin 2 precision is only relevant when used as oscillator. Not primary goal obviously.
@@Oldclunker-ge5zp Thanks, makes sense!