HWN - Analog Design Interview Question
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- เผยแพร่เมื่อ 19 ส.ค. 2024
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The output voltage at the end of section (2) is VDD*(R+R')/(2R+R'). There is no multiplication at the denominator.
Thanks👍
Please add correction to the output voltage at the end of section-2. It should be R+R+R' .
Thanx for the question. Why did you assume that MOSFET will turn on in the linear region? At the end of 1st region, VOUT= V(Drain)= VDD. The MOSFET will turn on in the Saturation region(VDD>VG(VDD)-VTH(VDD/2)) thus discharging the capacitor linearly and not exponentially!!! After sometime when V(drain) falls below VDD/2 then MOSFET will act as a switch with on resistance R'. After that whatever you said is correct.
agreed
No, if the transistor turns on in saturation, time time constraint will have the R in series with the supply. Once it enters linear region, time constraint will be R||(R + Ron).
@sohamlakhote9822
Hi Soham, at the end of the 1st region, V(drain) is not equal to Vout; there will be some voltage drop across the R connected to the drain; hence Vds will be lower than Vdd.
@@apurbadebnath1387It totally depends on value of R.
By intution and safe assumption, transistor turns on in SATURATION at the very instant that Vin switches from 0 to Vdd. This will cause a *constant* current of Id(switching+) = (Bn/2)*[Vgs-Vth]^(2) to flow through transistor.
At that very instant we need to check the drop through R and current. At very switching instant, Capacitor acts as a Voltage Source of value Vdd.
Hence at that very instant Drain Voltage of transistor is
Vdd - I(switching+)*R .
Now if this is greater than Vgs - Vth it means our assumption is correct and transistor will operate in Saturation till Drain Voltage drops below Vgs - Vth.
If at switching instant itself the value Vd = Vdd - I(switching+)*R < Vgs - Vth it means our assumption was wrong and transistor will turn on in linear region.
Assuming transistor turns on in Saturation region, at the very switching instant the current drawn from Vdd source would be 0. And entire transistor current which is constant is coming from capacitor. Hence capacitor will discharge linearly for a very short time instant.
As soon as Capacitor Voltage drops < Vdd, the current supply from Vdd source will increase and current from capacitor decreases to maintain constant current through transistor as long as it stays in Saturation region.
I hope this is correct explanation.
I think you mislabeled the y-axis
If not, your first clarifying question should have been "Can I assume that Vin is high enough to overcome the threshold voltage?" or something like that.
Thank you so much for being here! By any chance do you mean the y-axis in black? If so, what we failed to mention is that that waveform corresponds to Vin. The level that Vin goes is 0 --> VDD --> 0
@@HardwareNinja That clears it up. It would've been helpful to label the y-axis, but it's not a big deal.
You should have not taken the job as a member of this yt channal, but as a contractor, and not compromised on delivery of material to your viewers.
Thank you so much for being here! We won't be compromising on quality, but we would also like to challenge our community a bit more. We hope you understand :)
@@HardwareNinja thank you for your content and your mission, i hope it only grows :)
Tau = Rx . C
Rx = R || (R + R')
If we assume the time constant of the capacitor is small then the will charge and discharge rapidly assuming charging upto Vdd again and discharging upto Vdd/2(appx assuming R' and R are same) and this will continue upto infinity if the waveform Vdd is as given.....
Thank you so much for being here! Can you elaborate on what you mean by "this will continue upto infinity"?
This one I'm not sure, but isn't I_tau function = Vc / ( R + R' )
Similarly at initial point vc = vdd , so peak of Ic = I_tau peak
Vdd / (R+ R`)
Great question, thanks
Thank you so much for being here!
Initially the capacitor is charged and there’s no current through the transistor. The drain voltage should be vdd. If vin is less than vdd+vth then the transistor will turn on in saturation, which is confusing...
Yeah obviously the transistor turns on in saturation so that the capacitor is discharged to appx half the voltage because of the voltage divider to satisfy circuit laws.
Thank you so much for being here! Why would the transistor be ON if Vin is less than vdd + vth? Zero is less than Vdd + Vth, right? :)
Good to see after long time... please continue..I have some interview questions...how do I send you?
Thank you for planning to contribute to the community. Please e-mail us at hardware.interviews@gmail.com. Cheers!
Proper ninjas on this sites
Thanks ..but we really need hardware schematic design in deep.
The solution does not seems logical enough...
Thank you so much for being here! Could you elaborate on this a bit more so we can provide some additional clarity?
@Hadware Ninja is the time constant of the ckt is R||(R+R').C?