After a few nights of debugging timing issues with TTL logic with a modern 4-channel, digital storage oscilloscope I can't imagine how hard things must have been back in the day. There's a great non-fiction book that touches a lot on the toll it takes on people: "The Soul of the New Machine" by Tracy Kidder. After endlessly dealing with nanoseconds, one of the protagonists left a note: "I’m going to a commune in Vermont and will deal with no unit of time shorter than a season."
Yep, these timing issues can be tricky. If i can i get the circuit running at a slow speed but it's not always possible, particularly debugging video circuits.
This is fantastic, well done. I've always wanted to re-create the Spectrum but using modern parts like SRAM and no ULA. In your schematic, the raster rom data line are interleaved, Q0/Q8/Q1/Q9... Is that to make the VDx lines consecutive and easier to route ? And is that what the SwizzleData() funtions are for, to encode/decode the data to suit the physical chip pinout ?
Exactly. For some reason, i find the Q0/Q8/Q1/Q9... native format of the 27C322 almost impossible to debug. In single stepping mode, i can normally read off the hexadecimal value on the data pins with a logic probe going around a chip. I have to concentrate a lot more and make more mistakes in Q0/Q8/Q1/Q9... format, compared to Q0/Q1/Q2/Q3... format. So it's mainly to make debugging easier. The SwizzleData() function encodes the data before programming such that you can thing of the outputs as being Q0/Q1/Q2/Q3...
10:38 I did not expect to see the System ROM on the "ULA" side of the machine, instead of the traditional Z80 side, especially given that tight worst-case timing constraints. But... I guess SRAMs and ROMs do stack up neatly for compact signal routing.
Yeah, you're right. I could have put the ROM closer to the CPU now that you mention it. During the testing phase i tend to put a dummy image in the ROM to test the raster generator running without the CPU running, but i haven't shown that in the videos.
Great project! How about flash signal? Will it be generated from combined VA signals, or some additional counter will be used? What about U15, there is some tricky delay, is it for video signal disable while not in visible display area?
Enjoy. I was thinking of just using a 5555 timer, (AND) gating it with flash. This will feed into an exclusive OR gate on the pixel data. I actually simplified U15 in the next video. Originally i wanted to control/shift the timing of the border signal down to one pixel at a time, but it can all be simplified by delaying using HalfCPUClockBar on the flipflop feeding it.
@@DrMattRegan VSync is asserted on every frame? Then you can use 393 counter to divide it by 4 then another time by 4 (or 8/2) to get one flash toggle per 16 frames. Or something like that. I think this will be much easier than 5555 and for sure more accurate.
Great project! Thank you for sharing this video series. Do you have suggestions for a replacement chip that is currently available for the raster ROM chip? They are no longer produced. I can’t find ithe one used in the schematic anywhere near me.
Just added it to github. If you make a visual studio desktop application called VideoFSA and pop these two files in it should work. Let me know either way.
I just tried this procedure and it works. Under visual studio 2022 (which is free) Create a new project -> Windows Desktop Application Call it VideoFSA Copy the Github version VideoFSA.cpp and VideoFSA.h into the VideoFSA directory. This should replace the existing autogenerated copies of these files. Run.
this is very interesting, i'm more of a software guy, so i'm just about keeping up, but please tell me, are there any benefits to doing this? does negating the ULA allow for faster CPU speeds? the ability to double buffer or anything? why is SRAM better than DRAM for instance? it would be interesting to see a spectrum that could run a 7mhz variant of the z80 with locked vsync to allow games to run correctly without slowdown, but i don't know if there would need to be further changes to allow that..?
Well, the real purpose of the video is for teaching / entertainment. The first problem with the ULA is that they're not begin made anymore. If you find a good one, you are basically cannibalizing and existing machine. The desire hear is to show how the ULA works. The down side of SRAM is that it's six transistors per bit, vs 1 for DRAM, but you need extra circuitry / voltages to keep DRAM happy. This extra cost per bit doesn't really matter these days. We have complete control over where the interrupt signal occurs, so it may just be easier to adjust that rather than change the clock speed.
@@DrMattRegan that's interesting, would you have any interest in exploring anything like that? it occurs to me a number of decisions were made as necessity of cost and complexity that as you said are no longer an issue, even at a hobbyist level today. I had thoughts of re-purposing the flash and bright bits to expand the palette and if i remember correctly some timex variants did have additional graphics modes that allowed for attribute blocks of 8x4 or 8x3 pixels?
maybe a stupid question if we dealing with barely fast enough rom and fast ram with extra free unused space outside of memory map, wouldn't it be beneficial to timings to transfer rom into that ram and remap the ram as rom address space, the only problem is you would need some kind of one time executable boot loader program to transfer spectrum rom to upper ram and boot from there as a normal address space
Yeah, I wanted to stick with the spectrum ROM, but when I play the games via the external hardware, it does download the entire 64k into RAM and execute from there.
I guess you could, but it'd be complicated. Assuming you copy with the Z80 itself, you'd have to start in some sort of slower clock mode that paged the ROM in but was still able to write to RAM (possibly with a bigger than 16K ROM so you've got room for the copy program, although the 16/48K Spectrum ROM does have a little free space to fit the copy code in, but since both start at address zero you'd need to relocate when copying). After copying, this code would have to do something like write to an IO port to switch to normal operations. Also the Spectrum ROM and some games incorrectly write to ROM space, so you'd need to write-protect the bottom 16K of RAM after you were done.
This PCB is already full of multiplexers and buffers. A computer should compute something. So this already is not a home computer, anymore. So we are free to have fun with multiplexers and buffers! The ZX spectrum uses fast page mode. I think it would be really cool to show how fast-page mode and memory interleave go together. For example a memory controller could check if the CPU or videoDMA really needs memory. And then if this is the case, it could read ahead a few bytes and cache them (4 * 2 buffers ). Make this work also for 6502. Make this work for a character display with 16px wide patterns (2 byte burst) or 4 color pixels for games.
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Excellent job this. Been following the series, and you actually pulled it off. Hats off sir.
Thanks for the feedback, enjoy!
After a few nights of debugging timing issues with TTL logic with a modern 4-channel, digital storage oscilloscope I can't imagine how hard things must have been back in the day. There's a great non-fiction book that touches a lot on the toll it takes on people: "The Soul of the New Machine" by Tracy Kidder. After endlessly dealing with nanoseconds, one of the protagonists left a note: "I’m going to a commune in Vermont and will deal with no unit of time shorter than a season."
Yep, these timing issues can be tricky. If i can i get the circuit running at a slow speed but it's not always possible, particularly debugging video circuits.
Impressive, this is a very nice piece of work, congratulations on pulling this off.
@@PaulDriverPlus glad you like it.
Brilliant!!! Looking forward to the next part!
Glad you enjoyed it
Looks like I'll be ordering more chips and things. Next warm up the soldering iron. Great work.
Excellent. It's been a fun project.
This is fantastic, well done. I've always wanted to re-create the Spectrum but using modern parts like SRAM and no ULA.
In your schematic, the raster rom data line are interleaved, Q0/Q8/Q1/Q9...
Is that to make the VDx lines consecutive and easier to route ?
And is that what the SwizzleData() funtions are for, to encode/decode the data to suit the physical chip pinout ?
Exactly. For some reason, i find the Q0/Q8/Q1/Q9... native format of the 27C322 almost impossible to debug. In single stepping mode, i can normally read off the hexadecimal value on the data pins with a logic probe going around a chip.
I have to concentrate a lot more and make more mistakes in Q0/Q8/Q1/Q9...
format, compared to Q0/Q1/Q2/Q3... format. So it's mainly to make debugging easier.
The SwizzleData() function encodes the data before programming such that you can thing of the outputs as being Q0/Q1/Q2/Q3...
10:38 I did not expect to see the System ROM on the "ULA" side of the machine, instead of the traditional Z80 side, especially given that tight worst-case timing constraints. But... I guess SRAMs and ROMs do stack up neatly for compact signal routing.
Yeah, you're right. I could have put the ROM closer to the CPU now that you mention it. During the testing phase i tend to put a dummy image in the ROM to test the raster generator running without the CPU running, but i haven't shown that in the videos.
It's amazing how much could go wrong from a simple timing error.
It’s actually surprising how forgiving timing can be though. Usually the ROMs will go faster than their rated speed
@@DrMattRegan Neat.
Great project! How about flash signal? Will it be generated from combined VA signals, or some additional counter will be used? What about U15, there is some tricky delay, is it for video signal disable while not in visible display area?
Enjoy. I was thinking of just using a 5555 timer, (AND) gating it with flash. This will feed into an exclusive OR gate on the pixel data. I actually simplified U15 in the next video. Originally i wanted to control/shift the timing of the border signal down to one pixel at a time, but it can all be simplified by delaying using HalfCPUClockBar on the flipflop feeding it.
@@DrMattRegan VSync is asserted on every frame? Then you can use 393 counter to divide it by 4 then another time by 4 (or 8/2) to get one flash toggle per 16 frames. Or something like that. I think this will be much easier than 5555 and for sure more accurate.
Or use INT signal for correct timings alignment with begin frame interrupt
Great project! Thank you for sharing this video series. Do you have suggestions for a replacement chip that is currently available for the raster ROM chip? They are no longer produced. I can’t find ithe one used in the schematic anywhere near me.
Yep, you could use a pair of 27C512s
@@DrMattRegan Ah Great! Thank you very much!
Hello. Very interesting project. Can I get the firmware for the raster rom?
Yep, it’s on the GitHub page as VideoFSA.cpp. Just make a visual studio project and use this file.
@@DrMattReganOk friend, where can I get the VideoFSA.h library file?
Just added it to github. If you make a visual studio desktop application called VideoFSA and pop these two files in it should work. Let me know either way.
Hi. Unable to compile VideoFSA. Compiler Error C2065 Undeclared identifier IDI_VIDEOFSA and IDC_VIDEOFSA
I just tried this procedure and it works.
Under visual studio 2022 (which is free)
Create a new project -> Windows Desktop Application
Call it VideoFSA
Copy the Github version VideoFSA.cpp and VideoFSA.h into the VideoFSA directory.
This should replace the existing autogenerated copies of these files.
Run.
this is very interesting, i'm more of a software guy, so i'm just about keeping up, but please tell me, are there any benefits to doing this? does negating the ULA allow for faster CPU speeds? the ability to double buffer or anything? why is SRAM better than DRAM for instance? it would be interesting to see a spectrum that could run a 7mhz variant of the z80 with locked vsync to allow games to run correctly without slowdown, but i don't know if there would need to be further changes to allow that..?
Well, the real purpose of the video is for teaching / entertainment.
The first problem with the ULA is that they're not begin made anymore. If you find a good one, you are basically cannibalizing and existing machine. The desire hear is to show how the ULA works.
The down side of SRAM is that it's six transistors per bit, vs 1 for DRAM, but you need extra circuitry / voltages to keep DRAM happy. This extra cost per bit doesn't really matter these days.
We have complete control over where the interrupt signal occurs, so it may just be easier to adjust that rather than change the clock speed.
@@DrMattRegan that's interesting, would you have any interest in exploring anything like that? it occurs to me a number of decisions were made as necessity of cost and complexity that as you said are no longer an issue, even at a hobbyist level today. I had thoughts of re-purposing the flash and bright bits to expand the palette and if i remember correctly some timex variants did have additional graphics modes that allowed for attribute blocks of 8x4 or 8x3 pixels?
maybe a stupid question
if we dealing with barely fast enough rom and fast ram with extra free unused space outside of memory map, wouldn't it be beneficial to timings to transfer rom into that ram and remap the ram as rom address space, the only problem is you would need some kind of one time executable boot loader program to transfer spectrum rom to upper ram and boot from there as a normal address space
Yeah, I wanted to stick with the spectrum ROM, but when I play the games via the external hardware, it does download the entire 64k into RAM and execute from there.
I guess you could, but it'd be complicated. Assuming you copy with the Z80 itself, you'd have to start in some sort of slower clock mode that paged the ROM in but was still able to write to RAM (possibly with a bigger than 16K ROM so you've got room for the copy program, although the 16/48K Spectrum ROM does have a little free space to fit the copy code in, but since both start at address zero you'd need to relocate when copying). After copying, this code would have to do something like write to an IO port to switch to normal operations. Also the Spectrum ROM and some games incorrectly write to ROM space, so you'd need to write-protect the bottom 16K of RAM after you were done.
In the next project, where i use a TTL CPU instead of the Z80, i'll be writing to the RAM to act as a ROM.
static RAM? toooooo simple. Interesting explanation anyway, thanks.
Ha ha yes. When ever I feel the need to self flagellate I have a go at getting dynamic RAM to work!
This PCB is already full of multiplexers and buffers. A computer should compute something. So this already is not a home computer, anymore.
So we are free to have fun with multiplexers and buffers! The ZX spectrum uses fast page mode. I think it would be really cool to show how fast-page mode and memory interleave go together. For example a memory controller could check if the CPU or videoDMA really needs memory. And then if this is the case, it could read ahead a few bytes and cache them (4 * 2 buffers ).
Make this work also for 6502. Make this work for a character display with 16px wide patterns (2 byte burst) or 4 color pixels for games.
If you're interested, i have a video on DRAM usage in the Spectrum th-cam.com/video/VMosP_X2C8U/w-d-xo.html
Why not use a jk flip flop with q and not q for cpu skew problem, would do away with inverter as you already using data flip flop..
@@ntal5859 I want all the clocks to be in phase with each other, not just CPUClock and CPUClockbar. That’s the main reason.
Both the enterprise and the cpc use 4mhz can you double the video ram speed? Would this eliminate contention?
Umm, the trick is using static RAM. It’s faster than the dynamic RAM the production machines use, and it’s easier to use.
@@DrMattRegan have you seen the next?