Introduction to Direct Memory Access (DMA)
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- เผยแพร่เมื่อ 1 ม.ค. 2021
- We've learned how interrupts relieve the CPU of the burden of polling, but what about the data transfer? A DMA will handle that for us. This lesson shows how.
Takeaways: At the completion of this lesson, each student should be able to:
• explain the benefits of direct memory access (DMA),
• describe the process of cycle stealing,
• explain how a cache supports the use of DMA,
• list the four things the DMA needs to complete a transfer, and
• show how different DMA configurations affect the number of memory cycles stolen per data element transfer.
#dma #io #bus
Just discovered this channel. Awesome. You're a very good teacher, thank you.
So underrated content. Thank you!
Very cool overview about what DMA is! Easy to understand explanation
Wish I found your videos sooner! Good stuff
this should be trending honestly
Excellent teaching : the what and the why...thanks !
Thank you... perfect explanation!!
Excellent video, keep up the good work!
Thanks!!
wowie this is useful thanks a lot
How're you writing like that?
So as I understand, these functions (DMA Channels) are fixed and connected to specific/predefined interfaces like timers, UART or SPI and can be configured only with corresponding interface in order to decries clock cycles for data transfer. In other words I can't choose any random interface on software level and say ok, now do data transfer for ADC for example (if there is no DMA Channel for it).
I think I got it. Thank you.
Depending on the hardware, you may or may not have the ability to transfer data between any device and memory. I've worked with a number of architectures where you just give the DMA a source address, a destination address, whether to increment, decrement, or leave static each of those addresses with each transfer, and the amount of data to transfer, and it handles the transfer.
It depends entirely on the DMA engine’s design. You could have mere copiers to more sophisticated ones that understand a lot more context. If the DMA is based on a one-size-fits-all design principle then yes, you could transfer between any peripheral on your chip to any other peripheral or memory.
But sir here we use the arrays that are a run-time storage right, here it's possible for that
That means DMA interact with CPU?
why DMA have number of channels? Do they help to increase the speed of transfer?
As I've always understood it, a channel is assigned to a specific device. It can be rotated to another device, but only after completing its transfer for the first device.
No entendí nada =/
I'm guessing you understand a lot more than you think!
I'm Alone 😍😥