This is a great point that almost nobody is talking about. If they do it right this could be an advantage for them as Intel has been giving up on AVX512 for a lot of consumer parts.
The rumor mill has spread the info that it will be a 2 x 256 bit implementation, with nearly achieving Ice Lake performance levels (at the same core count/frequency).
@@seylaw That would make sense. Half arse the 512 aspect which is core but not the meat of why avx512 is good, focus on efficiently implementing the tasty optional extensions.
@@ghost_of_m403 what do you mean by Intel giving up on AVX-512 for consumer parts? I thought Alder Lake is the first gen to introduce it to desktop. It's disabled by default but the overwhelming majority of desktop users don't need it. I'm betting that no matter how AMD implements it, it's a lot faster than Intel considering 16 cores vs. 8.
They are similar to Intel's e cores but less cut down. As stated above they have less cache and reduced instructions but they are still compatible with everything X86 so it's simpler to work with in software. They also still have multithreading. I don't think they are as small in terms of silicon compared to Intel's e cores but they are otherwise superior (probably) as Intel iterates it will be very interesting to see how things pan out. It would be possible for AMD to jam 16C cores and 8 standard cores on their desktop platform with only 2 CCDs and the IO die but that will depend on how competitive Intel is.
That "SoC" they are designing for servers with the CPU, GPU and RAM all on the same "chip", that's what they should also aim for the desktop. We are at the point in time where discrete GPUs for non-game/non-video editing stuff are becoming irrelevant in 95% of the homes. Systems would be quite smaller - MacMini style - and still very powerful to do our work and day-to-day stuff.
Discrete RAM is still cheaper than 3D stacked memory, probably through most of DDR5 at least. At the very low end, APUs with soldered RAM are already dominant. Give HBM and 3D packaging another two or three gens and we'll start to see space and power constrained systems switch over.
"Rumours of my death are greatly exaggerated" -Threadripper. Love me some none pro threadripper , still rocking a 2950x , would love another enthusiast threadripper
AIE and adaptive SOC, I've been waiting for something like this, allowing automatic or user directed tweaks to instructions might be a real game changer.
I'm curious if we'll see integrated AI processing in HBM on the super APU Package? AMD has been scaling up their HBM bus size to rediculous levels, with that many packages, the lost capacity can be compensated for.
So exciting to see threadripper appearing again, needing the extra PCIE and memory. Will be waiting for it for my next build. Hopefully asrockrack also release a threadripper server motherboard. All my old zen chips are now in a asrockrack motherboard and enjoying a second life as servers.
@@rezaramadea7574 I don't see that being such a great idea. Even though they are going to DDR5 & 12 channel RAM if they scale to that many cores then the RAM bandwidth/core will be lower than current DDR4 systems. That could affect the overall performance if the cores are loaded enough.
Curious how one correlates PCIe with AMD Infinity fabric. Infinity fabric is the connection between chiplets. The clock speed can be managed. PCIe is comms between the CPU and components exterior to the CPU. The clocks are fixed based on the device being communicated with. Sure they're both serial comms, which is really a detriment for the Infinity fabric, but other than that I don't see what they have in common. A core on one chiplet doesn't use a PCIe controller to communicate with a core on another chiplet.
Super excited for new hardware from AMD, especially their new AIE accelerators. Very curious to see how well AMD would try to catch up to Nvidia on the AI frontier. I am also glad to see fast development on future products, especially with how AM5 is expected to be a long-lived platform like AM4 has been since 2017, and it is exciting for iterative upgrades without needing a new motherboard. Also that mega-APU seems like it is AMD’s answer to Nvidia’s upcoming Grace-Hopper. I think they make sure to have different processes is because they will be able to guarantee greater production capacity if they make some chips as 5nm, some as 4nm, and the IO chiplet being 6nm in the same year to split the lineup.
Absolutely. If you look at what we did with Ice Lake where we tested using Intel VNNI it makes more sense. Not every system will have GPUs and if you need only part of pipelines accelerated, then CPU AI built-in will be enough without the power and cost of a GPU. Intel's Sapphire acceleration will move that bar even higher for applications that do not need a GPU
AI training is very hard and since there are many algorithms it is done on GPUs or on specialized hardware like Google Tensor cards or exotic stuff like Cerebras or Tenstorrent. It's only needed to train the model once. For example, training a model to recognize cat pictures. AI inference needs to be done on every end device (like a phone, security camera, etc.) and is easy as it basically means feeding data to the trained model to get the output (confidence level of being a cat picture or not). It needs to be done as quickly and efficiently as possible. Ideally, if the model never changes (which is never true) and cost is no issue a custom ASIC can be done to run that exact model with 100% efficiency. Like a Bitcoin miner. In the real world, the next best way is to "burn" the model into an FPGA each and every time the model changes. CPUs and even GPUs are too generic for this inference to work optimally in speed and efficiency. The new mobile Ryzen is not just a CPU. It's an APU with CPU, GPU and now AIE. The AIE are specialized FPGA-type hardware accelerators mean for AI inference, which means they will be able to do inference orders or magnitude faster and with less power than traditional CPU or GPUs.
Someone should ask Amd on the record if the slide showing zen 4 threadripper can be interpreted as non pro variants coming back or not. Their answer will be helpful to some extent even if it’s corporate speak
That is a good point. TBH the Pro versions are much better so i hope at least full DIMM set. Then again, if it is big SP5 EPYC based, then that means 12x DIMMs as well
@@ServeTheHomeVideo afaic The more options the better. I’m ok with Threadripper pro, I prefer the features it comes with too although I don’t like the idea of a pro version of a product without a base version available. Just make a couple of sku’s available at least, and most importantly, consumer motherboards. Of all the AMD zen retail customers nobody paid more and got less from amd in every facet aside from the hardware, it’s so great that you could argue you don’t need years of socket support and I can accept that I would however at the very least ask that they make up for that by offering a product to upgrade to. It’s not cool at all to have someone upgrade to your platform and change their entire system and accessories setup around the fact they have more PCIE lanes than anything else offers etc. and for that 2 get 1 refresh for every 5 consumer and server refresh…it’s just less than ideal. I truly do understand the reasons they made all their choices, but I’m not sure I agree that the goodwill they received with threadripper is worth tossing out entirely…you can drastically reduce availability or whatever, but serve that market in some way is all I’m saying. If not with threadripper maybe some other HEDT solution/offering, but offer something…that’s my preference at least. Dual socket 5950x’s would be amazing 😂 I’d also reallllly love reference machines from AMD. a Intel ultra book style effort, but done better and for like super high performance desktops
Is CXL 2.x and PCI-5 synonymous with each other or no? I’m the sense that…like I’m asking will PCI-E 5 bring CXL 2 in all/most cases or not necessarily? I sent you a tweet about this a few days ago, I seem to recall you saying something like that but I may well be wrong.
CXL 2.0 will be used for memory expansion & sharing through PCIe (5.0). It can be used for things like memory pooling, which is useful for cloud providers where different nodes require differing amounts of memory at different times. Basically, it makes scaling memory more efficient (cheaper) for such workloads, which is good as memory is very expensive to scale. Only specific CPUs / devices support CXL 2.0.
3:21 Another way to get higher performance than IPC uptick is to get more cache hits... right? AMD and Intel have been dedicating more die to cache, and then there's V-CACHE... 🤔
Well presented, thank you! Wish they would use version numbers instead of codenames, who will ever remember if "Bergamo" is better than "Parma" in a while?
Everything should go to a year model naming convention like cars have always and software has finally done. No more code names, or other cryptic naming conventions.
Layman here. I've been wondering for a while about how exactly IPC improvements are made. I can understand that the earliest implementations of new features like speculative execution would have had a massive impact, as would the latest trend of in-CPU accelerators and specialised modules, but what are some other factors that improve IPC between these big steps? It can't all just be incremental improvements, can it? I'm specifically interested in increases in constant-frequency performance. Anyone got any good links or knowledge they're happy to share?
So, as someone who did cpu micro-achitechture study in bsc, the easiest way to put it is for every instruction, there's always many small micro-instructions that a process needs to carry out. For example, if you say "Add A, B" then "add" is the instruction, but it does small stuff as well such as fetch the number from location A of memory cache & move it to the based of adder, do the same for B, use the logic gates to get the result, move the result to the location of A, set flags for the number (is it zero, not a number, negative, odd, etc). So IPC performance also depends on how quickly the micro-instructions take place as well. RISC processors also have them, where one instruction may take one cycle to complete but the micro-instructions happen in a fraction of a cycle.
AMD IPC gains are mostly from branch prediction improvement and going super wide at the execution units. Zen3 can execute 15 different instructions at the same time. Of course most of the time this execution units are not doing anything because of data dependency and lack of instruction to execute that is why branch prediction is very important. The more accurate the branch prediction the more instruction can be made available for execution.
One way to increase single-threaded performance without raising clock with a know IPC increase would be to increase the cache, memory though put and execution window. Though that is scenario specific. In other words, if you can make your processor stall less on memory, memory heavy task will be faster, giving an increase in perf, that may not scale as well in mt cases (or use case that doesn't need a lot of memory access)...
SOOOO EXCITED!!!!! - This is just MIND BLOWING!!! There are so many thing I don't understand about it, but that's the whole point of technology: learning about the NEW STUFF!!! LOL - THANKS GUYS!!!
For v-cache I want to see all of Ryzen 7 and 9 have the option. The 12 core would have the best core/cache ratio on the market. I probably would have upgraded to a 5900x3d if it existed
Not gonna happen. The Server guys are buying all the Milan X and Genoa X available. Most probably AMD will allocate a single SKU for gamers and it will be a single chiplet part.
Siena looks like either single socket with lowered TDP or possible embedded Epyc. Ultra wideband IO supported but not high compute. One of the big markets for large numbers of efficient cores is the compartmenting of secure transactions. They're trying to reduce exposure to server side data breaches while also moving away from the single point of failure in a multitasking design. That's why Siena was highlighted for Telecoms and applications at the Edge of a network. You can use the hardware-based security tools to isolate dozens of temporary instances as they are continually spawned and destroyed. The X-series CPUs also have an appeal because they can complete a set of transactions without ever storing data in main memory. We are looking at over 1GB real cache memory per socket which approaches IBM Power's local working memory. The heavy compute APUs are pushing shared memory space more aggressively than before and we may see a fragment of this design in the rumored high-end gaming APU for thin laptops. I doubt they will issue a laptop CPU with HBM memory at this time, but they cannot "equal or beat" an RTX 3060 with dual-slot conventional laptop memory.
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well I hope they'll take some of that into thin and light affordable client desktops and laptops... not just only top tier servers 🥺
AMD still doesn't have a Zen 3 Threadripper yet (just the SI exclusive, overpriced Pro version) so I don't have my hopes up for a good Zen 4 Threadripper. TR4 showed much promise, TRX40 came along and wiped out all that good will with outrageous entry prices and it's abandonment. All I want is 12 to 16 current generation cores, 40 to 48 pcie lanes, quad channel memory and it not being overpriced. With any luck Intel revives HEDT because AMD certainly killed it. High Performance *Enthusiast* *Desktop* is not Workstation. There is plenty of space for both.
Wow, my exact same thoughts. 16 core cpus seems to be a waste for many of my current workload due to low memory bandwidth from dual channel. It is high time APU manufacturers move to Quad channel for higher end consumer APUs.
I thieorized back with Zen2 EPYC/Threadripper launch that AMD would be bringing us a mega APU. At the time i thought it would be a significantly smaller 7nm IO die instead of 14nm with fewer PCIe lanes and support for faster DDR4 (up to 4933 based on my 4750G) and then 1 or 2 5700XT dies with a shared pool of HBM2e/HBM3 as an L4 cache(for the GPU and CPU, and then the machine would treat system RAM as an L5 cache, or low latency cache where low latency is needed.
The idea of a server APU is way older than Zen 2, since their HSA initiative in 2012 AMD hinted at such a product and I hoped we would see it sooner. They put it finally on a roadmap. Don't forget that Fujitsu's A64FX shipped such a CPU with SVE2 vector engines + HBM in 2019! AMD (and Intel) are not pushing the technology as hard as others.
It still saddens me that AMD can't seem to find it in themselves to bring a decent h.264/265 HW video encoder to the table that can at least match Intel's old HD600 iGPU Series of QSV, never mind the latest 700 Series, which also seems to take the crown on the desktop from NVENC 7th Gen that was even re-used from Turing now onto Ampere. I purchased a 1650Super at launch just for Turing NVENC (original 1650 used Volta's NVENC) and will do the same when Intel finally launches Arc, as I could care less about Gaming performance....or just switch from AMD to Intel for a desktop CPU and forget the discrete video card completely.
Yeah. I can't wait to see some of those products in real life. Seems to me that AMD might not only be back in fight for AI, but might be winning. Of course everything here is shown in best light possible, but there is a lot (not enough ;) ) interesting stuff. Can't wait until you and Wendell get your hands on Genoa, Genoa-X and Bergamo. AMD should know that the 2 of you are basically the best marketing for them EVER. After watching your videos I want to buy a server. Even though I don' need one ;) I hope you will also check how good "AMD's" DPU's are. Are they really DPU's? How do they compare to Intel and NVIDIA etc.?
@@morosis82 I wish I could do it, but: a) money b) my Internet is 300/30 Mbit/s, though I could make fast interconnect between PC's c) sadly I would prefer if 12 and 16 core AMD CPU's offered at least 4 to 8 more PCIe lanes. I don't need a lot, but now I can have only 16x for GPU and 4X for 1 M.2. I have additional 20 PCIe lanes from good X570 chipset, but those will me good only for what? M.2 drives? Maybe a capture Card? Which means that top non-HEDT streaming system will have 1 GPU, 5X M.2 drives and a Capture Card. Do you know of X570 mobo that has good connectivity - like at least 1 (preferably 2) 2.5 Gbps ports? Or 10 Gbps port that maybe I can use a splitter to use it like 2 x 5Gbps?
@@jannegrey I have the Gigabyte X570S Aero that has 2.5G ethernet. My plans for it are a video card, a couple of m.2, some sata SSD and maybe 25G SFP28 to my rack. Leaves a slot for something else small.
I agree, but it isn't the first time. I think it was Zen 2 or RDNA they said the same thing. Its not like they just throw out all the RND they've done over the years, which is what the statement implies.
@@obake6290 "New Grounds-up architecture" makes u think like fx to ryzen or rocket lake to alder lake type change. Which isn't what they seem to be proposing at all. The detail sounds a lot more incremental
Sorry one other point. Intel who brought AVX-512 to desktop can only run it with their e cores disabled. AMD is going to be able to run it with 16 cores. I predict AMD BLOWING away Intel at AVX-512 for next gen products.
@@Azraleee 🤔 never thought about that my xeons are backed with 256Gb of Ram and everything is cached and I've fast sata/sas storage. We gonna see very soon my 5900HX is on the way and it should be installed with Funtoo 🧐.
What’s the deal with Intel’s FPGA manufacturer? Anything material come from that yet? Also did you see the Xilinx chip in the amd load tester from the Epyc test bed? And final question, I know a team at a small company that manufactures top of the line hardware in the automotive aftermarket space, they had been close to launching a xilinx equipped unit in 2019 then corona hit and they have still been unable me to launch it despite it using something like TSMC 28nm iirc, which is wild to think about, wonder how many Xilinx customers are suffering like that
"Absolutely crazy that it comes out in 2023" - yeah, only a couple of years late! The HBM APU was supposed to be in the market by 2020. And Fujitsu's A64FX demonstrated HBM + CPU in 2019 even. :) And only for the server segment?! Such a product would be great in notebooks and even on the desktop, too. I'd like to see Intel and AMD pushing technology a bit harder than they do right now.
@@ServeTheHomeVideo If the costs stay as high as they are, perhaps. But Samsung talked about low-cost HBM years ago (2016), but that hasn't materialized yet. Bringing down the cost doesn't seem to be a priority, I wonder why.
@@ServeTheHomeVideo In case of Apple, I think it is more of a question of volume as they more easily could shift the cost on the consumer who would be willing to pay more for an Apple product. But for the M1/M2 maybe the gains with LPDDR were good enough to make HBM unneccessary performance-wise and actually harmful for their sales targets. HBM volume still seems to be tiny in comparison to LPDDR.
HBM makers are not lowering prices. All the production gets used by high-end GPUs and other accelerators so the HBM prices went up a lot. That is what hurt AMD's graphics when they designed HBM for consumer. The HBM makers raised prices, and in the consumer market there is not enough margin/ room to raise prices to support HBM
@@ServeTheHomeVideo There still seems to be an issue with scaling up the production to drive volumes, as lowering the costs would surely drive further adoption in the industry. Or is it just another example for an oligopoly maximizing their profits instead of bringing us forward technologically in solving these problems? :)
I thought nobody would do java anywhere anymore guess sort of like there are still pieces of software using it but it’s not really something you use for new stuff..
True, but decades of development stemming from a time when SPARC was still big and helping to let x86 and commodity servers take over. There are probably hundreds of billions of dollars of development into enterprise Java at this point so the performance is important.
But do any or all of these have Pluton built in? That's all I really care about at this point and we can stop talking about any chips past the last ones that's don't have Pluton or it's equivalent.
Two points. One is the amount of compute power AMD is expecting to get from CDNA gen to gen is INSANE. I'm sure they're going to pull it off since misleading investors opens you up to lawsuits. Two, while AMD HAS BEEN able to get a lot of benefits from something like chiplets that can be used in multiple CPU architectures, those days are about gone. The reasons are many, but the jist is AMD is branching out and trying to win in laptop, multiple server architectures, WS, desktop CPUs, GPUs of a wide variety. Zen 3+ for instance is excellent for some categories of laptop, but not so much others. You see AMD responding with more categories of APUs for laptop, and that's what they should do. The same is going to be true for CPUs across a wide spectrum of compute devices. They've cut into Intel because Intel just wasn't ready for what AMD could do, added to their 10nm woes. But Intel isn't stupid. Intel DOES however need to get back on top when it comes to fabrication, or at least be on par with TSMC. TSMC is NEVER going to give Intel capacity for something like a line of CPUs, unless Intel is paying to build a TSMC fab.
I think AMD also has the patent, on the vertical logic core design. note: we R still in a linear/horizontal logic core design! great vid.. good luck! Lake,Falls,pond,rapids,blizzard,Zoo keeper....20 yrs ago AMD was kind of plain processors! no dual threading! I'd like to see a 4:1 Thread 2 Core ratio..OMG! U mean CXL is still awake? don't forget VMware has a product 4 U???
The reason they don't go to 4 threads is because they aren't only concerned about the throughput but also the single thread performance. So if you invest a lot of effort and energy in making the single thread performant, this means you have a strong branch predictor. And with a strong branch predictor there are less execution bubbles there to exploit for additional threads. Solutions which offer many threads on a single core only care about multithreaded output, and so they can neglect things like the branch predictor since competing threads will fill those pipeline execution bubbles. This is why I don't think we'll see more than 2 threads on their main performance cores. I wouldn't rule it out for the high density cores however.
The big flaw on the part of AMD is the tremendous wattage required to run these parts. Intel has the same problem. They are trying to dazzle us with whiz-bang features and what not but at the end of the day, your energy bill is becoming significant. Something has to give.
AMD, Intel Nvidia all swinging percent volume toward commercial (data center) B2B as cost increases; TSMC + 20% into second half 2022, Sumco + 30% wafer price increase. I expect to see more demand supply balancing in consumer including as Intel reconfigures from producing for supply to producing for cost optimized demand so too will AMD. On the massive multicores there appears to be some sort of business of compute impasse currently, saturation waiting software on hardware so far ahead sans AL/ML applications optimization to address data (bases) that never grow less and ever increase. My Seeking Alpha comment line today completes Xeon Today and AMD Epyc Today WW channel just read down the general comment line. Data shows massive core vis-a-vis general enterprise business compute market by core sweet spots. Right massive core too big for the majority of segments. Supply data shows AMD really did not supply Rome past run end more like OEM dumping but McNamara at financial day said Milan would specifically continue and appears the big sales opportunity for VARS to go after to begin replacing (sans AVX512 currently pre Zen 4) the 400M unit installed base of cache starved Xeon Skylake and Cascade Lakes storage and server market currently. Corporate business compute appears outside Silver grades to have been somewhat underserved the last 5 years with AMD eyes on business of compute over corporate enterprise, the general compute market, Here are the current by SKU 'core grade' sweet spots; Here's Ice recap again; Ice and Milan volume in the channel are near equal P40C = 4.91% full run to date supply and + 53% in the prior 9 weeks P38C = 2.09% + 300% P36C = 5.98% + 170% P32C = 10.18% + 70% G32C = 7.53% + 192% G28C = 14.60% + 74% G26C = 2.15% < 60% G24C = 7.29% + 89% G20C = 0.26% and n/a currently G18C = 4.31% + 12.5% G16C = 6.53% + 26% G12C = 1.75% < 60% G8C = 3.57% + 166% All Silver = 25.51% + 37% let's look at Silver All W = 3.34% < 40% Ice Silver are 0.008% of Skylake + Cascade Lakes Silver. 20C = 6.31% and flat 16C = 28.83% + 18.52% prior nine weeks 12C = 43.24% + 71.43% shows where Intel thinks channel 2P volume is 10C = 0.90% and flat with back gen 10C selling in very high volume makes current generation moot? 8C = 20.72% + 27.78% Epyc Milan recap: 64C = 35.21% full run to date supply and + 19.5% in the prior 9 weeks 56C = 3.67% + 11% 48C = 3.62% + 420% 32C = 18.21% + 91% 28C = 2.66% + 34% 24C = 20.26% + 19.6% 16C = 14.05% + 58.8% 8C = 2.33 < 16.7% Skylake + Cascade Lake overall sales trend again last nine weeks recap, 4C = 1.86% supply + 24.2% gain last nine week (trade in) 6C = 1.86% + 9.7% 8C = 12.26% < 38.2% shows a sweet spot 10C = 7.89% < 45% shows applications by core sweet spot 12C = 11.04% < 20.7% 14C = 11,89% < 40.09% sweet spot 16C = 11.78% < 8.5% 18C = 6.8% + 20.6% trade in 20C = 9.51% < 14.9% applications sweet spot enters virtual 22C = 2.26% + 1.4% 24C = 8.31% < 2.1% 26C = 2.08% + 2% 28C = 12.44% + 4.4% (virtual environment) Skylake = 32.37% of the sample (WW channel supply) Cascade Lakes = 66.76% of the sample at x2 Skylake available Ice placed in XSL/XCL sample = 0.97% Here's v4; 4C = 7.22% < 7.9% in the last nine weeks 6C = 2.81% < 11.28% 8C = 13.59% + 10.69% 10C = 13.78% < 79.16% 12C = 8.64% < 16.63% 14C = 21.37% and flat So you move to Scalable Skylake 14C for that optimized application 16C = 11.81% < 12.40% 18C = 7.91% < 16.61% moving from Haswell 18C to Broadwell 20C = 3.97% < 6.72% 22C = 8.90% + 29.95% moving to Skylake or Epyc? Likely Intel because of existing application optimizations tied to an Intel platform? Anyway a lot more data at my Seeking Alpha comment line just read down the comment string I cover Copper Lake that just appeared in the open market, E7/E5 MP, v3 and v2. Looks like the sales emphasis waiting AI/ML platform applications optimization is turning to a good four to six quarters of general market 'corporate IT' commercial sales. Specific Sapphire rapids my premise is hardware ahead of software and subsequently not exactly SR whole product currently beyond hyperscale / public cloud. The underserved general IT market is about to get served. Mike Bruzzone, Camp Marketing
seriously when is AMD going to make a proper Gaming APU?? and by proper I mean a 8c/16t with at least Vega 20-25, I mean if the 5700G has Radeon Vega 8 and it's THAT good imagine if it had triple that! and Yes I know the older Ryzen 7 PRO 4750G had Vega 8 as well but they were a lot weaker! also the even older Ryzen 5 3400G Radeon RX Vega 11 but it's now a lot weaker compared to the new gen. so yeah Imagine a Ryzen 7 8c/16t with Vega 20-25, the performance will be amazing! If it even surpasses my puny GTX 1050 Ti I could finally sell my GPU and go APU-only build! LOL! it's not like I'm a hardcore gamer anyway, I don't mind playing at 1080p Low (also because my monitor is 144hz I rarely go that high)
Hey Patrick, you're cool for who you are and what you built, don't need to try too hard but.. that background or studio you use for shooting your videos: it's time toss it! Thanks for you content
I'm VERY interested to see AMD's avx512 implementation. Their architecture tends to be highly efficient, and 512...tends not to be lol.
This is a great point that almost nobody is talking about. If they do it right this could be an advantage for them as Intel has been giving up on AVX512 for a lot of consumer parts.
The rumor mill has spread the info that it will be a 2 x 256 bit implementation, with nearly achieving Ice Lake performance levels (at the same core count/frequency).
@@seylaw That would make sense. Half arse the 512 aspect which is core but not the meat of why avx512 is good, focus on efficiently implementing the tasty optional extensions.
I am intressed on 1nm from AMD and intel would be in 5nm maybe :d
@@ghost_of_m403 what do you mean by Intel giving up on AVX-512 for consumer parts? I thought Alder Lake is the first gen to introduce it to desktop. It's disabled by default but the overwhelming majority of desktop users don't need it.
I'm betting that no matter how AMD implements it, it's a lot faster than Intel considering 16 cores vs. 8.
Zen 4C and Zen 5C could be standard Zen4/5 core with smaller L2 or L3 cache. This way, AMD can put more cores into same space.
The best leaks I've seen for Zen 4c (Moore's Law is Dead) implied reduced cache and reduced instructions.
They are similar to Intel's e cores but less cut down. As stated above they have less cache and reduced instructions but they are still compatible with everything X86 so it's simpler to work with in software. They also still have multithreading. I don't think they are as small in terms of silicon compared to Intel's e cores but they are otherwise superior (probably) as Intel iterates it will be very interesting to see how things pan out. It would be possible for AMD to jam 16C cores and 8 standard cores on their desktop platform with only 2 CCDs and the IO die but that will depend on how competitive Intel is.
could the C stand for compute?
@@ayrendraganas8686 cloud
@@ayrendraganas8686 it stands for cloud, they were originally called dense or D internally but they felt it was too easily confused with 3D SKUs.
Zen 5 Turin up to 256 cores 512thread on two socket 1028threads wow
That "SoC" they are designing for servers with the CPU, GPU and RAM all on the same "chip", that's what they should also aim for the desktop. We are at the point in time where discrete GPUs for non-game/non-video editing stuff are becoming irrelevant in 95% of the homes. Systems would be quite smaller - MacMini style - and still very powerful to do our work and day-to-day stuff.
Discrete RAM is still cheaper than 3D stacked memory, probably through most of DDR5 at least. At the very low end, APUs with soldered RAM are already dominant. Give HBM and 3D packaging another two or three gens and we'll start to see space and power constrained systems switch over.
They could do it, but at what price? It's all about economics feasibility. In the enterprise space, price doesn't matter much.
Some propper mid to high range gaming APU or M1 like would be nice indeed
"Rumours of my death are greatly exaggerated" -Threadripper.
Love me some none pro threadripper , still rocking a 2950x , would love another enthusiast threadripper
AIE and adaptive SOC, I've been waiting for something like this, allowing automatic or user directed tweaks to instructions might be a real game changer.
"AMD usually uses a 'fast follower' approach in term's of ISA improvements."
Like with x86-64?
That was a long time ago. AMD talks about this as a strategy these days
I'm curious if we'll see integrated AI processing in HBM on the super APU Package? AMD has been scaling up their HBM bus size to rediculous levels, with that many packages, the lost capacity can be compensated for.
So exciting to see threadripper appearing again, needing the extra PCIE and memory. Will be waiting for it for my next build. Hopefully asrockrack also release a threadripper server motherboard. All my old zen chips are now in a asrockrack motherboard and enjoying a second life as servers.
My guess is that TR will be OEM only as last generation
Wonder if 3dvcache would be any good for TR.
Zen 5 for server is rumoured to have 256 cores while Zen 5c has 384 cores. We could see that 1000 core CPU by Zen 8
Isn't it only 192 cores (2x Genoa) & 256 cores (2x Bergamo) ??
@@rezaramadea7574 I don't see that being such a great idea. Even though they are going to DDR5 & 12 channel RAM if they scale to that many cores then the RAM bandwidth/core will be lower than current DDR4 systems. That could affect the overall performance if the cores are loaded enough.
Would this be a good chip for an audio server for a DAW?
Is Siena like the successor of the Epyc 3000 and will compete with the Xeon D line up?
I think of it more like Genoa platforms are so big and expensive that AMD needs something smaller
Curious how one correlates PCIe with AMD Infinity fabric. Infinity fabric is the connection between chiplets. The clock speed can be managed. PCIe is comms between the CPU and components exterior to the CPU. The clocks are fixed based on the device being communicated with. Sure they're both serial comms, which is really a detriment for the Infinity fabric, but other than that I don't see what they have in common. A core on one chiplet doesn't use a PCIe controller to communicate with a core on another chiplet.
Super excited for new hardware from AMD, especially their new AIE accelerators. Very curious to see how well AMD would try to catch up to Nvidia on the AI frontier. I am also glad to see fast development on future products, especially with how AM5 is expected to be a long-lived platform like AM4 has been since 2017, and it is exciting for iterative upgrades without needing a new motherboard.
Also that mega-APU seems like it is AMD’s answer to Nvidia’s upcoming Grace-Hopper.
I think they make sure to have different processes is because they will be able to guarantee greater production capacity if they make some chips as 5nm, some as 4nm, and the IO chiplet being 6nm in the same year to split the lineup.
It is closer to Intel Falcon Shores than Grace Hopper. G-H has LPDDR for the Arm side and HBM for the GPU side
Their approach is entirely different, it involves sparsity and is vastly more efficient, Nvidia won't be able to compete if it catches on.
Are you going to make a video about the just-launched AMD Instinct MI300?
We covered it in this video and in a main site article. Expect a more in depth video when we get hands on hopefully for their launch
I don't get the ai part... Is any serious AI application running on cpu instead of gpu? Sounds more like a gimmick
Absolutely. If you look at what we did with Ice Lake where we tested using Intel VNNI it makes more sense. Not every system will have GPUs and if you need only part of pipelines accelerated, then CPU AI built-in will be enough without the power and cost of a GPU. Intel's Sapphire acceleration will move that bar even higher for applications that do not need a GPU
AI training is very hard and since there are many algorithms it is done on GPUs or on specialized hardware like Google Tensor cards or exotic stuff like Cerebras or Tenstorrent. It's only needed to train the model once. For example, training a model to recognize cat pictures.
AI inference needs to be done on every end device (like a phone, security camera, etc.) and is easy as it basically means feeding data to the trained model to get the output (confidence level of being a cat picture or not). It needs to be done as quickly and efficiently as possible. Ideally, if the model never changes (which is never true) and cost is no issue a custom ASIC can be done to run that exact model with 100% efficiency. Like a Bitcoin miner.
In the real world, the next best way is to "burn" the model into an FPGA each and every time the model changes. CPUs and even GPUs are too generic for this inference to work optimally in speed and efficiency.
The new mobile Ryzen is not just a CPU. It's an APU with CPU, GPU and now AIE. The AIE are specialized FPGA-type hardware accelerators mean for AI inference, which means they will be able to do inference orders or magnitude faster and with less power than traditional CPU or GPUs.
I was expecting him to start out with "What a crowd, what a crowd. I'm well now but let me tell ya last week I was in rough shape, are you kiddin."
Someone should ask Amd on the record if the slide showing zen 4 threadripper can be interpreted as non pro variants coming back or not. Their answer will be helpful to some extent even if it’s corporate speak
That is a good point. TBH the Pro versions are much better so i hope at least full DIMM set. Then again, if it is big SP5 EPYC based, then that means 12x DIMMs as well
@@ServeTheHomeVideo afaic The more options the better. I’m ok with Threadripper pro, I prefer the features it comes with too although I don’t like the idea of a pro version of a product without a base version available.
Just make a couple of sku’s available at least, and most importantly, consumer motherboards. Of all the AMD zen retail customers nobody paid more and got less from amd in every facet aside from the hardware, it’s so great that you could argue you don’t need years of socket support and I can accept that I would however at the very least ask that they make up for that by offering a product to upgrade to. It’s not cool at all to have someone upgrade to your platform and change their entire system and accessories setup around the fact they have more PCIE lanes than anything else offers etc. and for that 2 get 1 refresh for every 5 consumer and server refresh…it’s just less than ideal.
I truly do understand the reasons they made all their choices, but I’m not sure I agree that the goodwill they received with threadripper is worth tossing out entirely…you can drastically reduce availability or whatever, but serve that market in some way is all I’m saying.
If not with threadripper maybe some other HEDT solution/offering, but offer something…that’s my preference at least. Dual socket 5950x’s would be amazing 😂
I’d also reallllly love reference machines from AMD. a Intel ultra book style effort, but done better and for like super high performance desktops
Is CXL 2.x and PCI-5 synonymous with each other or no? I’m the sense that…like I’m asking will PCI-E 5 bring CXL 2 in all/most cases or not necessarily? I sent you a tweet about this a few days ago, I seem to recall you saying something like that but I may well be wrong.
CXL 2.0 will be used for memory expansion & sharing through PCIe (5.0). It can be used for things like memory pooling, which is useful for cloud providers where different nodes require differing amounts of memory at different times. Basically, it makes scaling memory more efficient (cheaper) for such workloads, which is good as memory is very expensive to scale.
Only specific CPUs / devices support CXL 2.0.
🤔 So will AIE be an integrated FPGA ? If so, with how many gates ? And freely addressable?
12:58 really good one!
I don't understand anything lol. What I'd like to know is what performance can we expect from apu in 2022, 2023 and then?
… “it’s absolutely crazy!” Love your enthusiasm!
Thank you. Harder when I am sick :-/
@@ServeTheHomeVideo Caffeine ?
I was thinking the same thing. It's a lot easier to be excited about learning when your teacher / presenter is also excited about it.
I have not had any for 9 days. Rough
3:21 Another way to get higher performance than IPC uptick is to get more cache hits... right? AMD and Intel have been dedicating more die to cache, and then there's V-CACHE... 🤔
Well presented, thank you! Wish they would use version numbers instead of codenames, who will ever remember if "Bergamo" is better than "Parma" in a while?
Everything should go to a year model naming convention like cars have always and software has finally done. No more code names, or other cryptic naming conventions.
@@MrV1NC3N7V3G4 I guess the problem is that they don't know which year something will release until it's released.
This is very true.
Layman here. I've been wondering for a while about how exactly IPC improvements are made. I can understand that the earliest implementations of new features like speculative execution would have had a massive impact, as would the latest trend of in-CPU accelerators and specialised modules, but what are some other factors that improve IPC between these big steps? It can't all just be incremental improvements, can it? I'm specifically interested in increases in constant-frequency performance. Anyone got any good links or knowledge they're happy to share?
So, as someone who did cpu micro-achitechture study in bsc, the easiest way to put it is for every instruction, there's always many small micro-instructions that a process needs to carry out. For example, if you say "Add A, B" then "add" is the instruction, but it does small stuff as well such as fetch the number from location A of memory cache & move it to the based of adder, do the same for B, use the logic gates to get the result, move the result to the location of A, set flags for the number (is it zero, not a number, negative, odd, etc).
So IPC performance also depends on how quickly the micro-instructions take place as well.
RISC processors also have them, where one instruction may take one cycle to complete but the micro-instructions happen in a fraction of a cycle.
@@arnabbiswasalsodeep fantastic stuff, thank you!
AMD IPC gains are mostly from branch prediction improvement and going super wide at the execution units. Zen3 can execute 15 different instructions at the same time. Of course most of the time this execution units are not doing anything because of data dependency and lack of instruction to execute that is why branch prediction is very important. The more accurate the branch prediction the more instruction can be made available for execution.
@@kazedcat true, our branch predictor is the most accurate and efficient In the industry.
I can't wait for when CPUs start getting advertised with kibi threads
Java performance is similar to design work we did with Sun 22 years ago in the SPARC Java Chip for use in FTTH/B gateway.
AMD CXL for consumers?
One way to increase single-threaded performance without raising clock with a know IPC increase would be to increase the cache, memory though put and execution window. Though that is scenario specific.
In other words, if you can make your processor stall less on memory, memory heavy task will be faster, giving an increase in perf, that may not scale as well in mt cases (or use case that doesn't need a lot of memory access)...
That is exactly what AMD did to get such a large IPC increase Zen 2 to Zen 3
Would be interesting to see a Moonshot node with one of those compute APUs
Sadly I do not think the old Moonshot node we had could cook these APUs
@@ServeTheHomeVideo presuming you mean cool? If so, that was also my thought. The moonshot seems to tap out at 65W with the M510.
Would be nice if they would do something like M1 for Windows Gaming PCs!!.
SOOOO EXCITED!!!!! - This is just MIND BLOWING!!! There are so many thing I don't understand about it, but that's the whole point of technology: learning about the NEW STUFF!!! LOL - THANKS GUYS!!!
CXL 2.0 was the super exciting one you mentioned that we should look out for and was most exciting for home enthusiasts right?
For v-cache I want to see all of Ryzen 7 and 9 have the option. The 12 core would have the best core/cache ratio on the market. I probably would have upgraded to a 5900x3d if it existed
Not gonna happen. The Server guys are buying all the Milan X and Genoa X available. Most probably AMD will allocate a single SKU for gamers and it will be a single chiplet part.
Siena looks like either single socket with lowered TDP or possible embedded Epyc. Ultra wideband IO supported but not high compute. One of the big markets for large numbers of efficient cores is the compartmenting of secure transactions. They're trying to reduce exposure to server side data breaches while also moving away from the single point of failure in a multitasking design. That's why Siena was highlighted for Telecoms and applications at the Edge of a network. You can use the hardware-based security tools to isolate dozens of temporary instances as they are continually spawned and destroyed. The X-series CPUs also have an appeal because they can complete a set of transactions without ever storing data in main memory. We are looking at over 1GB real cache memory per socket which approaches IBM Power's local working memory.
The heavy compute APUs are pushing shared memory space more aggressively than before and we may see a fragment of this design in the rumored high-end gaming APU for thin laptops. I doubt they will issue a laptop CPU with HBM memory at this time, but they cannot "equal or beat" an RTX 3060 with dual-slot conventional laptop memory.
well I hope they'll take some of that into thin and light affordable client desktops and laptops... not just only top tier servers 🥺
They already confirmed the Phoenix APUs (Zen 4) will be in thin and lights (and dragon range for the "H" Series)
AI Extensions = Skynet Terminator CPU
AMD still doesn't have a Zen 3 Threadripper yet (just the SI exclusive, overpriced Pro version) so I don't have my hopes up for a good Zen 4 Threadripper. TR4 showed much promise, TRX40 came along and wiped out all that good will with outrageous entry prices and it's abandonment.
All I want is 12 to 16 current generation cores, 40 to 48 pcie lanes, quad channel memory and it not being overpriced. With any luck Intel revives HEDT because AMD certainly killed it. High Performance *Enthusiast* *Desktop* is not Workstation. There is plenty of space for both.
TR Pro 5000 series is no longer going to be Lenovo exclusive. We should be getting our first motherboard for it in the next week.
Wow, my exact same thoughts. 16 core cpus seems to be a waste for many of my current workload due to low memory bandwidth from dual channel. It is high time APU manufacturers move to Quad channel for higher end consumer APUs.
I thieorized back with Zen2 EPYC/Threadripper launch that AMD would be bringing us a mega APU. At the time i thought it would be a significantly smaller 7nm IO die instead of 14nm with fewer PCIe lanes and support for faster DDR4 (up to 4933 based on my 4750G) and then 1 or 2 5700XT dies with a shared pool of HBM2e/HBM3 as an L4 cache(for the GPU and CPU, and then the machine would treat system RAM as an L5 cache, or low latency cache where low latency is needed.
The idea of a server APU is way older than Zen 2, since their HSA initiative in 2012 AMD hinted at such a product and I hoped we would see it sooner. They put it finally on a roadmap. Don't forget that Fujitsu's A64FX shipped such a CPU with SVE2 vector engines + HBM in 2019! AMD (and Intel) are not pushing the technology as hard as others.
It still saddens me that AMD can't seem to find it in themselves to bring a decent h.264/265 HW video encoder to the table that can at least match Intel's old HD600 iGPU Series of QSV, never mind the latest 700 Series, which also seems to take the crown on the desktop from NVENC 7th Gen that was even re-used from Turing now onto Ampere. I purchased a 1650Super at launch just for Turing NVENC (original 1650 used Volta's NVENC) and will do the same when Intel finally launches Arc, as I could care less about Gaming performance....or just switch from AMD to Intel for a desktop CPU and forget the discrete video card completely.
what you mean, h.264/265 encoder is already there.
Amd own xilinx to do that
Yeah. I can't wait to see some of those products in real life. Seems to me that AMD might not only be back in fight for AI, but might be winning. Of course everything here is shown in best light possible, but there is a lot (not enough ;) ) interesting stuff. Can't wait until you and Wendell get your hands on Genoa, Genoa-X and Bergamo. AMD should know that the 2 of you are basically the best marketing for them EVER. After watching your videos I want to buy a server. Even though I don' need one ;)
I hope you will also check how good "AMD's" DPU's are. Are they really DPU's? How do they compare to Intel and NVIDIA etc.?
We have been trying to do Pensando DPUs for years. Hopefully as part of AMD we will be able to get one.
@@ServeTheHomeVideo Oh yeah. I remember recent video on acquisition and you mentioned that. I hope AMD will be more forthcoming than Pensando.
These videos among others are the reason I upgraded my homelab to Epyc. Not so much for performance, but connectivity.
@@morosis82 I wish I could do it, but:
a) money
b) my Internet is 300/30 Mbit/s, though I could make fast interconnect between PC's
c) sadly I would prefer if 12 and 16 core AMD CPU's offered at least 4 to 8 more PCIe lanes. I don't need a lot, but now I can have only 16x for GPU and 4X for 1 M.2. I have additional 20 PCIe lanes from good X570 chipset, but those will me good only for what? M.2 drives? Maybe a capture Card? Which means that top non-HEDT streaming system will have 1 GPU, 5X M.2 drives and a Capture Card.
Do you know of X570 mobo that has good connectivity - like at least 1 (preferably 2) 2.5 Gbps ports? Or 10 Gbps port that maybe I can use a splitter to use it like 2 x 5Gbps?
@@jannegrey I have the Gigabyte X570S Aero that has 2.5G ethernet. My plans for it are a video card, a couple of m.2, some sata SSD and maybe 25G SFP28 to my rack. Leaves a slot for something else small.
Yes the slide "new grounds-up microarchitecture" sounded overstated to me as well. Certainly raised an eyebrow anyways.
I agree, but it isn't the first time. I think it was Zen 2 or RDNA they said the same thing. Its not like they just throw out all the RND they've done over the years, which is what the statement implies.
@@obake6290 "New Grounds-up architecture" makes u think like fx to ryzen or rocket lake to alder lake type change. Which isn't what they seem to be proposing at all. The detail sounds a lot more incremental
@@christopherjackson2157 I wonder if it is going to be a large overhaul like we saw going from Zen 2 > Zen 3.
Sorry one other point. Intel who brought AVX-512 to desktop can only run it with their e cores disabled. AMD is going to be able to run it with 16 cores. I predict AMD BLOWING away Intel at AVX-512 for next gen products.
I really don't see any improvement in my compilation workflow going from 2014 Xeon trough Ryzen 7 to new gen Intel...
Sounds like you are limited by your storage.
@@Azraleee 🤔 never thought about that my xeons are backed with 256Gb of Ram and everything is cached and I've fast sata/sas storage.
We gonna see very soon my 5900HX is on the way and it should be installed with Funtoo 🧐.
What’s the deal with Intel’s FPGA manufacturer? Anything material come from that yet? Also did you see the Xilinx chip in the amd load tester from the Epyc test bed?
And final question, I know a team at a small company that manufactures top of the line hardware in the automotive aftermarket space, they had been close to launching a xilinx equipped unit in 2019 then corona hit and they have still been unable me to launch it despite it using something like TSMC 28nm iirc, which is wild to think about, wonder how many Xilinx customers are suffering like that
lol, "8% IPC doesn't sound exciting" -- except there are 96 cores! that's almost an 8 zen 3 cores of improvement alone.
Turin on a publicly released slide is nice to finally see ffs i feel like the old lady from titanic.
"Absolutely crazy that it comes out in 2023" - yeah, only a couple of years late! The HBM APU was supposed to be in the market by 2020. And Fujitsu's A64FX demonstrated HBM + CPU in 2019 even. :) And only for the server segment?! Such a product would be great in notebooks and even on the desktop, too. I'd like to see Intel and AMD pushing technology a bit harder than they do right now.
HBM costs do not make it feasible for the notebook market. That is why Apple is using LPDDR
@@ServeTheHomeVideo If the costs stay as high as they are, perhaps. But Samsung talked about low-cost HBM years ago (2016), but that hasn't materialized yet. Bringing down the cost doesn't seem to be a priority, I wonder why.
@@ServeTheHomeVideo In case of Apple, I think it is more of a question of volume as they more easily could shift the cost on the consumer who would be willing to pay more for an Apple product. But for the M1/M2 maybe the gains with LPDDR were good enough to make HBM unneccessary performance-wise and actually harmful for their sales targets. HBM volume still seems to be tiny in comparison to LPDDR.
HBM makers are not lowering prices. All the production gets used by high-end GPUs and other accelerators so the HBM prices went up a lot. That is what hurt AMD's graphics when they designed HBM for consumer. The HBM makers raised prices, and in the consumer market there is not enough margin/ room to raise prices to support HBM
@@ServeTheHomeVideo There still seems to be an issue with scaling up the production to drive volumes, as lowering the costs would surely drive further adoption in the industry. Or is it just another example for an oligopoly maximizing their profits instead of bringing us forward technologically in solving these problems? :)
Do you have a video on the current state of Intel Vs amd and who’s got what to offer? You said intel is pushing them hard, curious how/where exactly.
Ridge above the Rapids :) It's intentionally cheeky.
AMD has been cheeky before. When they were introducing socket 939 (Maybe it was 940? Oops) the test motherboard had the Intel jingle on it.
I can't wait for amd to come out with the 7000g
I thought nobody would do java anywhere anymore guess sort of like there are still pieces of software using it but it’s not really something you use for new stuff..
Java is still huge in the enterprise software space
@@ServeTheHomeVideo Sad for those folks spring users i guess.. eats memory and cpu perf like nothing and delivers in comparison not much.
True, but decades of development stemming from a time when SPARC was still big and helping to let x86 and commodity servers take over. There are probably hundreds of billions of dollars of development into enterprise Java at this point so the performance is important.
@@platin2148 In the enterprise space Java is used a lot in ERP software. Because of this Java will not be going away anytime soon.
@@jeremyschulthess63 Yeah so it’s a cobol
But do any or all of these have Pluton built in? That's all I really care about at this point and we can stop talking about any chips past the last ones that's don't have Pluton or it's equivalent.
That thumbnail cropping is what peak performance looks like LOL
I was expecting the instinct to be more like apus on consoles
Yeah Go AMD ftw!
Two points. One is the amount of compute power AMD is expecting to get from CDNA gen to gen is INSANE. I'm sure they're going to pull it off since misleading investors opens you up to lawsuits.
Two, while AMD HAS BEEN able to get a lot of benefits from something like chiplets that can be used in multiple CPU architectures, those days are about gone. The reasons are many, but the jist is AMD is branching out and trying to win in laptop, multiple server architectures, WS, desktop CPUs, GPUs of a wide variety. Zen 3+ for instance is excellent for some categories of laptop, but not so much others. You see AMD responding with more categories of APUs for laptop, and that's what they should do. The same is going to be true for CPUs across a wide spectrum of compute devices. They've cut into Intel because Intel just wasn't ready for what AMD could do, added to their 10nm woes. But Intel isn't stupid. Intel DOES however need to get back on top when it comes to fabrication, or at least be on par with TSMC. TSMC is NEVER going to give Intel capacity for something like a line of CPUs, unless Intel is paying to build a TSMC fab.
I am still very amused that memory expansion boards are back after 30+ years.
I think AMD also has the patent, on the vertical logic core design. note: we R still in a linear/horizontal logic core design! great vid.. good luck!
Lake,Falls,pond,rapids,blizzard,Zoo keeper....20 yrs ago AMD was kind of plain processors! no dual threading! I'd like to see a
4:1 Thread 2 Core ratio..OMG! U mean CXL is still awake? don't forget VMware has a product 4 U???
The reason they don't go to 4 threads is because they aren't only concerned about the throughput but also the single thread performance. So if you invest a lot of effort and energy in making the single thread performant, this means you have a strong branch predictor. And with a strong branch predictor there are less execution bubbles there to exploit for additional threads.
Solutions which offer many threads on a single core only care about multithreaded output, and so they can neglect things like the branch predictor since competing threads will fill those pipeline execution bubbles.
This is why I don't think we'll see more than 2 threads on their main performance cores. I wouldn't rule it out for the high density cores however.
The big flaw on the part of AMD is the tremendous wattage required to run these parts. Intel has the same problem. They are trying to dazzle us with whiz-bang features and what not but at the end of the day, your energy bill is becoming significant. Something has to give.
I loooooveee AMD!! :))
FPGAs!
FPGA Chiplets
why are people so excited about APU's when in reality people only uses Dedicated graphics ?
This is moving from dedicated GPUs to APUs for the supercomptuer industry as the next step past the new #1 Frontier and #3 Lumi that just debuted.
nothing exists until its actually out and available
AMD the PowerPoint king is back.
AMD, Intel Nvidia all swinging percent volume toward commercial (data center) B2B as cost increases; TSMC + 20% into second half 2022, Sumco + 30% wafer price increase. I expect to see more demand supply balancing in consumer including as Intel reconfigures from producing for supply to producing for cost optimized demand so too will AMD. On the massive multicores there appears to be some sort of business of compute impasse currently, saturation waiting software on hardware so far ahead sans AL/ML applications optimization to address data (bases) that never grow less and ever increase. My Seeking Alpha comment line today completes Xeon Today and AMD Epyc Today WW channel just read down the general comment line. Data shows massive core vis-a-vis general enterprise business compute market by core sweet spots. Right massive core too big for the majority of segments. Supply data shows AMD really did not supply Rome past run end more like OEM dumping but McNamara at financial day said Milan would specifically continue and appears the big sales opportunity for VARS to go after to begin replacing (sans AVX512 currently pre Zen 4) the 400M unit installed base of cache starved Xeon Skylake and Cascade Lakes storage and server market currently. Corporate business compute appears outside Silver grades to have been somewhat underserved the last 5 years with AMD eyes on business of compute over corporate enterprise, the general compute market, Here are the current by SKU 'core grade' sweet spots;
Here's Ice recap again; Ice and Milan volume in the channel are near equal
P40C = 4.91% full run to date supply and + 53% in the prior 9 weeks
P38C = 2.09% + 300%
P36C = 5.98% + 170%
P32C = 10.18% + 70%
G32C = 7.53% + 192%
G28C = 14.60% + 74%
G26C = 2.15% < 60%
G24C = 7.29% + 89%
G20C = 0.26% and n/a currently
G18C = 4.31% + 12.5%
G16C = 6.53% + 26%
G12C = 1.75% < 60%
G8C = 3.57% + 166%
All Silver = 25.51% + 37% let's look at Silver
All W = 3.34% < 40%
Ice Silver are 0.008% of Skylake + Cascade Lakes Silver.
20C = 6.31% and flat
16C = 28.83% + 18.52% prior nine weeks
12C = 43.24% + 71.43% shows where Intel thinks channel 2P volume is
10C = 0.90% and flat with back gen 10C selling in very high volume makes current generation moot?
8C = 20.72% + 27.78%
Epyc Milan recap:
64C = 35.21% full run to date supply and + 19.5% in the prior 9 weeks
56C = 3.67% + 11%
48C = 3.62% + 420%
32C = 18.21% + 91%
28C = 2.66% + 34%
24C = 20.26% + 19.6%
16C = 14.05% + 58.8%
8C = 2.33 < 16.7%
Skylake + Cascade Lake overall sales trend again last nine weeks recap,
4C = 1.86% supply + 24.2% gain last nine week (trade in)
6C = 1.86% + 9.7%
8C = 12.26% < 38.2% shows a sweet spot
10C = 7.89% < 45% shows applications by core sweet spot
12C = 11.04% < 20.7%
14C = 11,89% < 40.09% sweet spot
16C = 11.78% < 8.5%
18C = 6.8% + 20.6% trade in
20C = 9.51% < 14.9% applications sweet spot enters virtual
22C = 2.26% + 1.4%
24C = 8.31% < 2.1%
26C = 2.08% + 2%
28C = 12.44% + 4.4% (virtual environment)
Skylake = 32.37% of the sample (WW channel supply)
Cascade Lakes = 66.76% of the sample at x2 Skylake available
Ice placed in XSL/XCL sample = 0.97%
Here's v4;
4C = 7.22% < 7.9% in the last nine weeks
6C = 2.81% < 11.28%
8C = 13.59% + 10.69%
10C = 13.78% < 79.16%
12C = 8.64% < 16.63%
14C = 21.37% and flat
So you move to Scalable Skylake 14C for that optimized application
16C = 11.81% < 12.40%
18C = 7.91% < 16.61% moving from Haswell 18C to Broadwell
20C = 3.97% < 6.72%
22C = 8.90% + 29.95% moving to Skylake or Epyc?
Likely Intel because of existing application optimizations tied to an Intel platform?
Anyway a lot more data at my Seeking Alpha comment line just read down the comment string I cover Copper Lake that just appeared in the open market, E7/E5 MP, v3 and v2.
Looks like the sales emphasis waiting AI/ML platform applications optimization is turning to a good four to six quarters of general market 'corporate IT' commercial sales. Specific Sapphire rapids my premise is hardware ahead of software and subsequently not exactly SR whole product currently beyond hyperscale / public cloud. The underserved general IT market is about to get served.
Mike Bruzzone, Camp Marketing
seriously when is AMD going to make a proper Gaming APU?? and by proper I mean a 8c/16t with at least Vega 20-25, I mean if the 5700G has Radeon Vega 8 and it's THAT good imagine if it had triple that!
and Yes I know the older Ryzen 7 PRO 4750G had Vega 8 as well but they were a lot weaker!
also the even older Ryzen 5 3400G Radeon RX Vega 11 but it's now a lot weaker compared to the new gen.
so yeah Imagine a Ryzen 7 8c/16t with Vega 20-25, the performance will be amazing! If it even surpasses my puny GTX 1050 Ti I could finally sell my GPU and go APU-only build! LOL!
it's not like I'm a hardcore gamer anyway, I don't mind playing at 1080p Low (also because my monitor is 144hz I rarely go that high)
This APU existed, it was called Kaby Lake-G. Vega is done for iGPU, from now on it's RDNA all the way.
Hey Patrick,
you're cool for who you are and what you built, don't need to try too hard but.. that background or studio you use for shooting your videos: it's time toss it! Thanks for you content
I love this backdrop! Especially when he literally hangs incredibly expensive server hardware from it lol.
video cards industry will die very soon.......
"AWS and everybody can drive around in better and better Ferraris". Personally I would never buy a Ferrari. I don't trust Italian engineering.