3x trace capacity for via current makes sense. The cross-sectional area of the copper leading through the hole should be about Pi * D - minus a bit because it'll be just slightly smaller on the inside of the hole than the outside.
thanks pete! also: from what ive read in altiums reference guides, the reason youre not supposed to run a large trace around the board is that high power can cause warping (due to heat) and stress the solder joints
At a place I worked at in the mid-late 90's we had a third use for a separate set of power & ground planes. We made EEG machines, so normal use of our products the input stages were connected to a patient's scalp, sometimes the input stages could actually be connected to a patient's brain with deep-brain probes. So, we had some boards with three plain pairs, a digital power/gnd pair, analog power/gnd pair, and patient connected power/gnd pair for patient safety isolation. (Almost all our boards were 4-layer with the planes internal, almost no SMT (this was the 90's) so connecting to internal planes was almost automatic.) Granted, this is a special case, but there it is. Also, as I remember, our digital and analog plane sets were connected at a single place back near the power supply section, not near/under the analog/digital hybrid chip as you showed on your white board. Are these more style issues, or do you see pros and cons to both methods? (I don't remember how patient isolation was maintained at the power supply section. I was the tech drafting the PWB layout to the engineer's rules, not the engineer defining the rules.)
Why would I use a polygon pour for something else than power? 1) Heatsink plane - e.g. from an linear regulator or such 2) To save the etching solution - more copper left = less and faster etching
Most analog ground pins and digital ground pins are actually connected internally (for chips such as an ADC). However, this is still the reason you connect below the chip. I recommend reading about mixed signal design, such as by Henry Ott or in the ADI book (edited by Hank Zumbahlen), Linear Circuit Design Handbook (free online).
Just a guess that the current rating of trace vs via is related to the width but now related to the circumference of the circle as the conduction path so use pi? I'm guessing that's where the rule of thumb is from, length of 2pi*r, or pi*diameter, so via width as the diameter *pi* flat trace current rating?
Hi Pete. I am a noob to electronics design and recently had my first design made by OSH Park. Needless to say there are a few issues. I was wondering if you would be interested in dissecting my design as a part 3 of this video series? I think this could be quite valuable for many viewers.
Clearly, with SparkFun's fabrication capability--you are going to have to make up a board with all the via sizes, and light 'em up! I see no reason why you guys can't be the authority on this. BONUS: FIRE. Never a bad thing when planned. Even better when you can record it for SCIENCE!
I'm in the middle of a project and was looking for a general guidance on how to make PCBs in Eagle, rather than a tutorial. It's awesome, thanks Pete!
3x trace capacity for via current makes sense. The cross-sectional area of the copper leading through the hole should be about Pi * D - minus a bit because it'll be just slightly smaller on the inside of the hole than the outside.
thanks pete! also: from what ive read in altiums reference guides, the reason youre not supposed to run a large trace around the board is that high power can cause warping (due to heat) and stress the solder joints
I like to add test points to my coms lines (SPI,I2C, etc ...) is very useful when is time to probe with the scope
At a place I worked at in the mid-late 90's we had a third use for a separate set of power & ground planes. We made EEG machines, so normal use of our products the input stages were connected to a patient's scalp, sometimes the input stages could actually be connected to a patient's brain with deep-brain probes. So, we had some boards with three plain pairs, a digital power/gnd pair, analog power/gnd pair, and patient connected power/gnd pair for patient safety isolation. (Almost all our boards were 4-layer with the planes internal, almost no SMT (this was the 90's) so connecting to internal planes was almost automatic.) Granted, this is a special case, but there it is.
Also, as I remember, our digital and analog plane sets were connected at a single place back near the power supply section, not near/under the analog/digital hybrid chip as you showed on your white board. Are these more style issues, or do you see pros and cons to both methods?
(I don't remember how patient isolation was maintained at the power supply section. I was the tech drafting the PWB layout to the engineer's rules, not the engineer defining the rules.)
hey!
great job man!
Why would I use a polygon pour for something else than power?
1) Heatsink plane - e.g. from an linear regulator or such
2) To save the etching solution - more copper left = less and faster etching
what about high voltage pcb layout? for example tube stuff and amps. maybe some info on that?
I guess you could use a fill area for capacitive touch or to add capacitive load to a signal.
Most analog ground pins and digital ground pins are actually connected internally (for chips such as an ADC). However, this is still the reason you connect below the chip. I recommend reading about mixed signal design, such as by Henry Ott or in the ADI book (edited by Hank Zumbahlen), Linear Circuit Design Handbook (free online).
Just a guess that the current rating of trace vs via is related to the width but now related to the circumference of the circle as the conduction path so use pi? I'm guessing that's where the rule of thumb is from, length of 2pi*r, or pi*diameter, so via width as the diameter *pi* flat trace current rating?
Hi Pete. I am a noob to electronics design and recently had my first design made by OSH Park. Needless to say there are a few issues. I was wondering if you would be interested in dissecting my design as a part 3 of this video series? I think this could be quite valuable for many viewers.
One other possible reason for large pours/planes would be heat sinking for voltage regulators,big IC's or transistors,etc.
Clearly, with SparkFun's fabrication capability--you are going to have to make up a board with all the via sizes, and light 'em up! I see no reason why you guys can't be the authority on this.
BONUS: FIRE. Never a bad thing when planned. Even better when you can record it for SCIENCE!
needs moar links and annotations