ฝัง
- เผยแพร่เมื่อ 27 ก.ย. 2024
- 2024 European LLVM Developers' Meeting
llvm.org/devmt...
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Sign Extension Optimizations inside LLVM
Speaker: Panagiotis Karouzakis
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Slides: llvm.org/devmt...
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In certain programs not all the expressions need to use all available bits of precision by the target machine. Also, there are many 32 bit programs that now run in 64-bit targets. Usually, in integer arithmetic and in floating-point arithmetic not all the expressions of a program need all the width of the register, but due to the switch from 32 to 64-bit architectures the registers are usually 64 bits. The compiler has to perform sign extensions in the narrow operations to preserve meaning. However, we can eliminate some sign extensions because not all of them are needed. The key is to know what each operator accepts and produces in their upper bits. Doing it in the LLVM Frontend only adds support for this optimization for one language. In this approach, we performed this optimization inside the LLVM IR. One problem is that if we find an optimal solution for one Node, it might not result in an optimal overall solution. If we had an abstract syntax tree, this problem is completely solvable using Dynamic Programming. This not the case with SSA-form in LLVM IR, because we have a DAG with many users. In this work we explore how to apply the dynamic programming optimization from syntax trees where each node occurs once to LLVM IR where each instruction may be involved in multiple chains.
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