NAND gates are universal gates, which means they can be used to represent all of the other gates. This makes circuitry (not this kind of circuitry, but the real life kind) a lot simpler. so that's why. As a side note, NOR gates have the same effect.
Why did u reverse ur system of binary counting for inputs in the multiplexer u started from up to down in the first example and then from down to up in the second example? Thank u sir for your time
I am not quite sure of this, but from what i understand, the NAND logical door is cheaper and faster than an AND one. What he uses are NAND gates followed by an inversor, which is the same as an AND gate :)
Excuse me sir, but i think youre using NAND gates and are calling them AND gates. This takes a huge blow in the credibility of this video.
+Carlos Sanchez ye john sort it out mate
Wow. Exactly what i needed, thanks a lot, good sir.
NAND gates are universal gates, which means they can be used to represent all of the other gates. This makes circuitry (not this kind of circuitry, but the real life kind) a lot simpler. so that's why. As a side note, NOR gates have the same effect.
You have been using a symbol for NAND calling it AND.
HARDY
+shand seimela That is the symbol for NAND gates. Youre wrong Sir
thank you man, I was confusing the operation of a decoder with a multiplexer.
Exactly what i needed. many many thanks sir:):)
thank you ... it was helpful to get a basic idea
Why did u reverse ur system of binary counting for inputs in the multiplexer u started from up to down in the first example and then from down to up in the second example? Thank u sir for your time
so much better than my professor.
I am not quite sure of this, but from what i understand, the NAND logical door is cheaper and faster than an AND one. What he uses are NAND gates followed by an inversor, which is the same as an AND gate :)
great video
thanks!
No, he uses a NAND gate (which is an AND gate followed by and inverter) but preceded by to inverters, which makes it an OR gate.
i had the same thoughts.
same question !!
Can someoe explain why he uses NAND gates? Shouldn't they be AND gates?
thanks for your efforts but in 1:55 you said AND gate !! but you drew a NAND gates ? can you explain to me ????
thank you very much
I guess NAND gates are viable as long as you put an inverter at the end. Maybe this design is to decrease logical effort...
it is because he is using a low active decoders.
tnx
two*
"1,000"
use AND gate not NAND !!!
Decoder is wrong using NAND gate
confusing. you don't explain enough
hi brother