Addition & Subtraction (Signed Mag.) | Hardware Algorithm || Computer Organization and Architecture

#architecture #organization #cao #coa #kcs302 #aktu #sapnakatiyar #addition #substraction #hardware #algorithm #flowchart #signed_magnitude
This video lecture is about the Addition & Subtraction of Signed Magnitude Numbers (Hardware Algorithm).
There are three ways of representing negative fixed point binary numbers:
1) Signed magnitude
2) Signed 1’s complement
3) Signed 2’s complement
Signed 2’s complemented form is used mostly.
When two signed numbers A and B are added and subtracted, we find 8 different conditions, described in the table. Addition & Subtraction Hardware Algorithm has been discussed in detail along with Flow Chart.
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[@thakurabhishekrajput_love]

Very very nice teaching method i have no any doubt related to this topic

[@jellaashrithsai1018]

madam plz use a large arrow to display where u are
so that we can see

[@user-hw5vb7wl7g]

ma'am U ARE THE LIFE SAVER FOR STUDENTS

[@DrSapnaKatiyar]

Thank you 😊
Please share with others also...

[@DrSapnaKatiyar]

Anshul from which institute you are??

[@user-hw5vb7wl7g]

@@DrSapnaKatiyar from jecrc jaipur

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🎯 Key Takeaways for quick navigation:
00:00 🧮 Addition and subtraction of signed magnitude numbers in computer organization and architecture involves a hardware algorithm and considerations of the sign bit in operations.
02:38 🖥️ Computers primarily use the signed two's complement representation to perform arithmetic operations with integers, as it simplifies addition and subtraction processes for negative binary numbers.
06:19 🔀 In signed magnitude addition and subtraction, when the signs of the numbers are opposite, the actual operation (addition or subtraction) performed is opposite to what's required due to the XOR comparison of sign bits.
08:36 📶 The hardware algorithm for addition involves checking the XOR of sign bits: when the XOR is 0, addition occurs; when XOR is 1, it triggers the opposite operation (subtraction) due to differing signs.
16:53 🔄 During hardware algorithm execution, if signs are opposite and addition is required, subtraction will be performed, and vice versa, leading to the correct outcome despite the opposite indicated operation.

[@AYUSHPATEL-lq8ks]

THANK you soo much mam, Today is our exam. Your lectures helped us a lot.

[@DrSapnaKatiyar]

All the best Ayush...

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@@DrSapnaKatiyar thank you mam😇