Shift Register | SISO SIPO PISO and PIPO | KTU CST203 ECT203 ITT203 EET206 | Logic System Design

[@letslearnelectronics8169]

Thank you sir all your classes are helpful

[@sijoa8204]

sir your teaching is very excellent easy to understand thanks

[@lofigirl676]

@23:15 siso positive edge triggering alle? but waveform clock pulse negative edge triggering aayitanallo varachekune

[@sneh_hh]

8:45

[@YUKKTHI-q1p]

Really Great classes sir

[@_z2397]

sir ithil timing diagram thettalle 9:13 karanam positive edge triggering varumpol alle active akullu sir varachathil negative edge triggering alle active akunne... please. verifiy

[@ShastraTechnicalInstitute]

Negative Edge Triggering Method is most widely used ! Clock will activate only if Falling Edge Occurs

[@sana.snavas5172]

Negative clock pole ano positive clickintem@shastra technical institute

[@nithyat9025]

Sir ,I have a doubt,timing diagram varakkumbo clk kazhinju Qa,Qb,Qc,Qd like this ee order il varakkamo

[@sijoa8204]

Varakyam

[@noobxshot3672]

Eth 5 module alle

[@unique_dreamer_]

Yes

[@edutechbynandu]

4

[@Helen64]

2019 scheme il piso pipo indoo..please replyy

[@pikachu-il2jp]

2 playlist indllo

[@dennaaj8532]

AWSome classes sir❤️❤️

[@anandmohan5538]

Super class

[@nixongeorge7999]

Superb class

[@mitul22br]

Sir SISO de waveform negative edge triggering based anello vannekkunnath. Theoryil positive edge triggering aanu paranjathu

[@aryasreekumard6552]

Thank you so much sir .

[@bhavyar6778]

Sir notes??

[@Rahul-jk7es]

Life saver

[@ashmi1237]

Sir, verilog nte videos cheyyumoo??

[@ShastraTechnicalInstitute]

Yes Cheyyunnundu ! Will be uploaded after Jan 10th

[@ashmi1237]

@@ShastraTechnicalInstitute thank you sir

[@learnece9538]

th-cam.com/video/UHHiRxquAXI/w-d-xo.html

[@Lobster.Gaming]

Sir full adder and subtracter universal gate vechu chayuna video idummo....it would be really helpful 😊

[@rockstreethomie]

Do right and left really matters?

[@naachuuu8865]

Sir, sirinte notes evda available?

[@Abhiram-gx8si]

എന്റെ സാറേ 😻

[@appu2871]

Thanks a lot sir 😻

[@aswinjayaji3127]

2019 schemenu piso pipo undo ?? athu padikkano

[@sijo3751]

Yes

[@hennamaria8967]

But ktu syllabus il ella lo 😑

[@Helen64]

samedoubt here

[@mithrabinu950]

Sir
SIPO 3 Flip-flop vech varachal tett ano ...

[@sulochanag7750]

Sir ithinte notes tharamoo

[@ansara7952]

Hello sir,can you please uploade classes Ece Minior subject analog communication & please create a playlist for that subject

[@ShastraTechnicalInstitute]

Okay I will try

[@learnece9538]

th-cam.com/video/UHHiRxquAXI/w-d-xo.html

[@chaithanyaraghav9319]

*Logic circuit design Sample Question paper (EC) plzzz 🙏🙏🙏🙏🙏🙏it would be very helpful for students like me 🙏🙏🙏🙏* 🙂🙂🙂

[@sana.snavas5172]

Thank you sir😇

[@fathimanubla975]

Sir syllabusl piso pipo illalo appo ath xam nn chodikn chance undo???

[@ShastraTechnicalInstitute]

PISO PIPO koode padikkanam

[@murielleosias5018]

Hello Sir, Can You Please Upload Classes Related to PLA, Rom Etc.. M

[@ShastraTechnicalInstitute]

Sure !

[@learnece9538]

th-cam.com/video/UHHiRxquAXI/w-d-xo.html

[@rayeesashihas1332]

Great sir😍

[@athulc.k4155]

First msb ano lsb ano SISO il pass cheiyyunne?

[@aiswaryaanil8679]

Thank u sir

[@ShastraTechnicalInstitute]

Most welcome!❤❤

[@crv2706]

സാർ ഇതിന്റെ നോട്ട് തരുമോ ഉണ്ടങ്കിൽ

[@ShastraTechnicalInstitute]

Ready aayitt ayakkam

[@brtkid3553]

@CRV note thramo

[@pikachu-il2jp]

@@ShastraTechnicalInstitute motes eggneya sr aykknee..tel ondo

[@jasimihsan2912]

Thanks..

[@greeshmanp7589]

Thank u sir