PWM DAC - Ripple Cancelation
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- เผยแพร่เมื่อ 3 ธ.ค. 2024
- In this video, Gregory shows a technique to increase response time using ripple cancelation on a PWM DAC.
When engineering digital and analog mixed systems, one of the technics to analog voltage synthesis is the usage of filtered PWM signals.
One of the challenges of this technic is that to get the output ripple lower than 1 LSB, the demands on the filter time constant increase. This increase slows the rising edge response, limiting the actuation and the bandwidth when used in closed loop systems.
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Great stuff!
Though I'm not gonna lie, it took me a while to realize you were saying ripple and not hippo :D
Hahahahahaha 🤦♀️🤦♀️🤦♀️ I will get better at this, thank you for pointing me out
I thought the exact same thing!
How can you say resolution but not ripple? Languages are weird, lol. Nice video by the way :)
hahahah... I hope I'm getting better at this. Thanks man
@@AllElectronicsChannel no worries mate. Your content is good, keep it up!
Hi Gregory, thanks for the video :) do you share the values for R and C in your settings (both 2nd and 3rd order filter) ?
I just searched in my notes and unfortunately did not find =/
You can easily simulate it using LT Spice. Use an AC simulation, with two AC sources.
The source the simulates the output of the inverter gate you use -1 or 180 phase
I wanted to ask if the inverter means the complementary signal so when it is 0 must be 1 and when 1 must be 0 or if it is 5V the inverted one will be -5V.
On = 5V, off = 0V
Hi Gregory,
(If I may call you by your first name ;) )
I have a dear question concerning my Projects and I think many would appreciate your answer to it also.
I am currently designing a Arduino based Synthesizer Controller/Sequencer.
As background-Info: Synthesizers use control voltages from 0-10 Volts (In my case 0-5V) to control Pitch of notes and many other Parameters.
Now, my problem is I want to use my Arduino due PWM output (1KHz Stock PWM, 5V PWM) to generate said Voltages, but they underlie 2 Specifications:
- Fast: the Pitch change will have to be very fast as the Human ear can detect Pitches in milliseconds (actually I do not know for sure) but really you can hear the difference.
- No Ripple: As 1 Octave is described by 1 volt, one single note is 1/12=0,083mV from the other.
Technically you shouldn't hear the voltage range of maybe 0,006mV or even more (I am no hearing specialist ;) ) but I would want it to be as small as possible.
So therefore, I would ask you for a second of your time to maybe describe some quick circuit which could meet these specs, as I am honestly not really capable of doing it (even though your Video is very interesting but I could not do it myself... and I'm lazy) ;)
If you don't have Time I of course understand it.
Also I think the Synthesizer community will praise this as they have a big community on Facebook and would love such content, just so you know ;)
PM me for my mail if you want :)
Greets
Frederik
Really enjoyed your design technique to reduce ripple of digitally constructed signals.... Thank you very much for these design tips series ....
Thanks man! Please leave some suggestions to the next topics
Interesting solution, although when using an active device anyway (like an opamp) I would rather go for a 3rd order lowpass I think.
Which can be easily made with just one amplifier (so 1/2 of a dual opamp).
In fact, even a 4th order filter can be made with just one amplifier.
Yep! This solution is more useful when you can generate the complementary PWM withing the uC.
And advantage of the output inverter gate is that you could use a separated and more stable power supply for the PWM signal, needed for high resolution.
In my last video I showed the DAC I made using two 8 bits PWM and the ripple cancellation technique to generate a theoretical 16 bits signal.
From my measures it seems that It has almost 14 bits os real resolution.
Thank you for your comment !
@@AllElectronicsChannel i have actually been simulating on this and it seems like that the performance is close to a 2nd order filter. It's possible to make a passive 2nd order filter with the same amount of components.
The analytical response is exactly of a 2nd filter
@@AllElectronicsChannel Interesting. So why wasting a whole port for it?
In the end is one more way of doing things.
Some advantages:
- lower output impedance because stages are not cascaded
- usage of a cmos gate to isolate the pwm supply, using a more stable and precise voltage