I just purchased a mint Agilent 1670G 136 channel with opt 002, even came with ALL the pod cables, pod tips and grabbers!. I have been able to navigate the system using the manual but this series of videos was very helpful.
Thank you for taking the time to produce this video. Triggering is the key and a video on your thought process for selecting the trigger set-up in a few different scenarios would be very interesting and helpful.
This was VERY helpful. I've totally new to logic analyzers and have an HP 1664A which seems very similar to this model. I'm actually trying to troubleshoot a RAM upgrade in my ZX81 and a series of episodes helping troubleshoot the ICs would be really interesting to us retro computer guys.
Thanks, this is a needed video. Wish they'd had youtube when I learned. You are correct, the more pods the better. The Z-80 is an excellent choice, makes it easy.
Great video as always. Maybe in one of the next videos, you can also explain a setup for a negative logic bus. I had a lot of headaches until I figured it out, even though is obvious once you know where to look.
Great intro, thanks. I would appreciate a more direct view of the analyzer screen (full on) once the probes are hooked up - very hard to read the screen with your camera angle (at least for these old eyes).
Would you have any idea where I could get flying lead pods without having to spend like $100 a pop? I have a 1660CS that came with the braided cables but not the passive flying-lead probes. I've designed some PCBs that have the internals (just a small RC passive circuit), but ideally I'd be able to get some actual hardware and not spend 10x what I spent on the LA itself...
When you're powering up the device under test (DUT) do you worry about grounding issues - in the same way you might if you were hooking up an oscilloscope? I can see there's only the Line and Neutral wires going into the Z80 but there's a ground connection on the Neutral wire back at the mains. I've tried hard to get my head around these issues but I'm still unsure.
I have two questions if you dont mind: First...are you saying no matter which chip I would analyze, I have to make sure one of the probes is on the clock in order to read the other probed pins....and the clock should be pulsing hi & low?....and second question: You had 16 probes connected..then another 8 probes....then the last probe....thats 25 total....why did we only see 3 lines then? I was expecting to see multiple lines in action....but only one represent all of the address and one represented all of the data...and one was the clock....Im confused as to what I was looking at. Do you have a video explaining how to understand whats on the screen?
I just purchased a mint Agilent 1670G 136 channel with opt 002, even came with ALL the pod cables, pod tips and grabbers!. I have been able to navigate the system using the manual but this series of videos was very helpful.
literally posted 5 days after I picked up an HP 1670E, good video :)
Thank you so much for this tutorial! I just recapped my HP 1662A and never really understood it. Now I can really use it!
Thank you for taking the time to produce this video. Triggering is the key and a video on your thought process for selecting the trigger set-up in a few different scenarios would be very interesting and helpful.
Brilliant series of videos and nice presentation. Thank you!
This was VERY helpful. I've totally new to logic analyzers and have an HP 1664A which seems very similar to this model. I'm actually trying to troubleshoot a RAM upgrade in my ZX81 and a series of episodes helping troubleshoot the ICs would be really interesting to us retro computer guys.
Nice Video... I'd like to se some more trigger functions, and also se some z80 inverse assembler...
Thanks, this is a needed video. Wish they'd had youtube when I learned. You are correct, the more pods the better. The Z-80 is an excellent choice, makes it easy.
Amazing video please continue.
Excellent series!
I use a mouse on my HP-1673G great video
Great video as always.
Maybe in one of the next videos, you can also explain a setup for a negative logic bus. I had a lot of headaches until I figured it out, even though is obvious once you know where to look.
Great intro, thanks. I would appreciate a more direct view of the analyzer screen (full on) once the probes are hooked up - very hard to read the screen with your camera angle (at least for these old eyes).
I'd love an in depth look at more complex triggering. I have a 1670e, and often find myself chasing my tail trying to build more than basic triggers.
Would you have any idea where I could get flying lead pods without having to spend like $100 a pop? I have a 1660CS that came with the braided cables but not the passive flying-lead probes. I've designed some PCBs that have the internals (just a small RC passive circuit), but ideally I'd be able to get some actual hardware and not spend 10x what I spent on the LA itself...
When you're powering up the device under test (DUT) do you worry about grounding issues - in the same way you might if you were hooking up an oscilloscope? I can see there's only the Line and Neutral wires going into the Z80 but there's a ground connection on the Neutral wire back at the mains. I've tried hard to get my head around these issues but I'm still unsure.
Yes I mention this in one of the videos. In general you should connect the ground connection on each pod.
I have two questions if you dont mind: First...are you saying no matter which chip I would analyze, I have to make sure one of the probes is on the clock in order to read the other probed pins....and the clock should be pulsing hi & low?....and second question: You had 16 probes connected..then another 8 probes....then the last probe....thats 25 total....why did we only see 3 lines then? I was expecting to see multiple lines in action....but only one represent all of the address and one represented all of the data...and one was the clock....Im confused as to what I was looking at. Do you have a video explaining how to understand whats on the screen?
Uma linha para Dados, uma para endereço, e a última adicionada para MREQ.