AMD's cpu division is astonishing. At this point, can we call their turnaround from Bulldozer to Zen 5 the greatest recovery we've ever seen from a tech company? From near bankruptcy in 2014, to not only catching up with a dominant Intel, but have them scrambling into massive company restructures, just to compete. I don't know if there's a CEO Hall of Fame, but Lisa Su should be a first class inductee.
@@NeilBooth Yeah, while I appreciate what Lisa Su has done to manage the launch and subsequent launches of future Zen products, I really believe that Rory Read deserves a bit more acknowledgement for being able to keep AMD afloat post-Bulldozer.
At least recently, but it is in the same ballpark of Apple on the verge of bankruptcy in the 90s, which was bailed out by Microsoft in it's darkest hour to avoid legal issues from going from an effective monopoly to a clear one without even a visible competitor in the consumer market. To not only growing past Microsoft's stock value in around a decade, but maintaining a strong position for decades now.
No point , people just buy nvidia , look at rtx3050 is 50% slower than rx6600 and people still bought more rtx3050 , same price , $250 .00 . Rtx3070 8gb sold more than entire rx6000 line up from amd , rtx3070 only 8 GB still $500.00 and rx6800xt 16gb is 40% faster same price now , still people buy gimped nvidia hardware . So no point competing .you can't fix dumb people .
No point. Nvidia has turned the gpu market into a software battle amd can't win. Gimmicks like physx and rtx in the gaming market, and cuda in the business and pro market. Amd can't dominate the market until they can tell devs what to code, and they can't tell devs what to code until they dominate the market.
with what ive been hearing from game devs is they dont want to work with nvidia anymore because they are holding back on vram that they need alot of devs thought 8gb to only be on low end by now
@@kintustis Well, Nvidia has shot off their own limbs by hamstringing the VRAM on their GPUs as low VRAM means no RTX at higher resolutions lol. The calculations for Raytracing and Physx have to reside somewhere and that's VRAM.
This shows the effect of solid competition, where the two combatants trade blows. The general purpose CPU market is healthy. This is sorely needed in the GPU space.
@@gamingtemplar9893This exactly. People will whine about "free markets creating monopolies" (or in this case duopolies) but the second you dig into any of them you'll find a mountain of unnecessary regulations, giant piles of money from government subsidising and massive amounts spent on lobbying for politicians that are gung-ho about increasing taxes and the previously mentioned regulations further.
@@gamingtemplar9893 bruh the fact that you think the poor GPU market is due to ‘regulations’ and ‘not free market capitalism’ is absolutely ridiculous. I don’t know what kind of logic you’re using to suggest that the lack of competition is due to too much regulation. That’s absurd.
It's not a healthy competition it's still a duopoly. For a healthy competition we need 2-3 more CPU manufacturers and then the real competition would begin
@@egonieser For sure. A race with more than two participants is far more healthy. However, I'll point to the GPU space, which currently has three players, and that's not doing consumers any favours. We need neck-and-neck races for this to work, no matter how many companies are competing against each other.
@@shepardpolska irrelevant. The 7700K was the only decent product from the 7000 series (maybe the non-K as well), but all others had poor performance and terrible value.
@@filipealves6602 Sorry? 7700k is practically 6700k with a higher clock. You were better off buying cheaper skylake CPUs Benchmarks from the time show the 7700k being like 7% faster on avarage and like 3% faster in games over the 6700k
@@filipealves6602 Wrong. The Pentium G4560 added Hyperthreading to the pentiums and made i3s irrelevant at the time. Shit was fucking awesome back then.
Excellent video as usual, always love these clarifying analyses. The l2$ being able to be tripled at no latency cost is huge. The reason why Intel and AMD have been sparing with cache sizes is because in an increase in size is in an increase in latency. I’m sure that if they didn’t have latency penalties they would grow the cache even at the cost of die increases. We know that data center loves more l2$ from Intel always having a bigger l2$ since Skylake-X. We also know that gaming loves more cache. Since AMD uses the same dues for data center and consumer, they will certainly implement this in the coming years. We know from both AMD and Intel that they can easily incorporate a cache size increase in as little as a year, so perhaps a Zen 5+ in 2024 to go against Arrow Lake. A Zen 6 in 2024 doesn’t seem impossible, but AMD likes to wait more than a year to bring out a new micro architecture. The ladder interconnect is certainly interesting, but probably not that consequential. Ring buses have excellent performance for 8 cores. It is definitely going to be consequential for Zen 5c because those 16 cores will get excellent latency enhancements. For Zen 5 I would expect no more than 1-2%, and probably negligible enhancements from the switch alone.
An increase is size usually means taking up more die space as well. Less circuits for execution will take down performance, so it's very much an art (science) of utilizing die space with maximum efficiency (or effectiveness, if you prefer).
@Steve Sherman No. Maybe the price will increase but nowhere near to what's happened to GPUs. Both Intel and AMD are competitive in x86, with multiple platform choices being viable as CPU uplifts are not even close to as big as GPUs gen to gen.
From what I remember, Jim Keller was hired by AMD to design the ZEN architecture. It was a huge announcement during AMD's financial crisis in 2012, and his return to AMD was regarded as AMD's last stance in the industry. If ZEN failed AMD was done. In retrospect, Jim Keller saved AMD. So when you say he didn't work on ZEN5, which is true, but neither did he work with any other ZEN design but the first one. Keller was hired to make "ZEN" as a whole, ZEN 2, 3, 4, and 5 is all AMD tinkering with the design that Keller left behind.
@@NadeemAhmed-nv2br There's no such thing as a complete redesign. Everyone always takes what they already know works and assembles it in slightly improved ways.
@@rightwingsafetysquad9872 Actually , Jim Keller himself talks in interviews that every 5 years companies tha design CPUs have to design something new.
@@NadeemAhmed-nv2br not at all, they're both chiplets, and they both use infinity fabric. and if they were indeed complete redesigns, they wouldnt call them ZEN. but if you're an individual who works at AMD, you can prove me wrong right?
Jim's interview with Dr Cutress made it clear he was putting the team together and managing, it's really Michael Clarke also interviewed by Dr Cutress who was the architect of Zen.
Makes sense. Otherwise, that chiplet would balloon in size. And AMD is really particular about core size, and chiplet size by extension. Will be curious to see if they decide to segment their products based on L2 cache size in the future.
Can't be the only one out there still perfectly happy with their Zen3-rigs until they really can't no more.. which should still be a pretty while off ☺ Meanwhile those major IPC bumps and multiplying corecounts ahead should make plenty look forward to whenever that day comes already 👍 thanks for the video!
Zen 3000 and 5000 will be competitive until the consoles refresh, at least. What the PS6 and Xbox Series Y (or whatever) use will determine what specs you need to aim for.
Zen 5 should arrive right about when I finish my car payments, heralding my biggest CPU upgrade since I moved from a Core2quad Q9550 to a Core i7 5820K :D
If I remember correctly in one of his first videos on YT, Dr. Ian Cuttress (TechTechPotato) paid you an homage in expanding on the idea in your videos on "Interposers and butterdonuts". In it he also claimed (IIRC) that they did check and ask AMD about L3 in Zen 3 and that according to AMD it wasn't exactly a bi-directional ringbus, but something that acted like it for 8 cores. Though apparently back then they still didn't have an idea what exactly to do in the future to scale it up. But this was one of the biggest obstacles in creating 16 cores CCX. It seems that now they will only make L3 smaller, with Vcache being substitute and perhaps in the next one they will get rid of L3 on the die completely and will use only Vcache as a source of L3. It's not penalty free, but it might be better than either connecting through Infinity Fabric or some other thing like mesh topology. Which technically scales better that ringbus, but it's still not fantastic for the numbers we're talking about.
LMFAO the thought of manufactures trying to avoid benchmarks by shoving as many cores and threads as possible so that the benchmarks fail to grasp the full power is hilarious to me
This is where my hype starts, for Intel responses as well. AMD's new trend in delivering beefier APUs can't be a coincident or just share RND expansion, Intel Tiles are coming too
Yeah 100%, dGPU still will be useful and wanted but I feel like my needs are met on the mid-end unless I want to do some Ray Tracing in games and that'll get even better with time @@wahidpawana424
I disagree with the claim "Phenom was awful"... Phenom II was very competitive with Core2 duo and quad, and still a decent option vs Clarkdale and low end Lynnfield chips. When Sandy Bridge came out, it was left in the dust like everything else. It was just that AMD's next big thing was very late to market and had a wildly optimistic design that went in the wrong direction entirely.
Definitely not awful, but still quite a bit behind even Bloomfield (the first Nehalem processors). I moved from a Phenom II 955 to an i7 950 back then, and did some gaming benchmark tests before and after. In very CPU-limited settings, the i7 950 was 40%+ faster than the Phenom II 955. That's with the former at 3.69GHz and the latter at 3.6GHz, so almost the same clock speed. At the time, I had a 5970 and mostly played at 2560x1600, and there were still many CPU-limited scenarios at that resolution. For example, one of my old tested games was _Dirt 2._ At 2560x1600, highest settings, and 4xAA, the i7 950's average frame rate was 114, while the Phenom II 955's was 80. _Company of Heroes,_ also with highest settings and 4xAA, was much heavier on the GPU, but still showed a 14% advantage for the i7 (138fps vs 121fps). So while the Phenom II was a good CPU, it was still considerably outclassed by Nehalem. And then came Bulldozer, meaning AMD wasn't a viable option for years.
The Phenom II could trade blows with most of Intel’s lineup when it came out in everything except AVX workloads and random memory latency. It still does better than my I5-6500 in everything except gaming. You would think 20ns versus 68ns in RAM latency for a random address would hurt the Phenom II but apparently it doesn’t in most tasks. I have no explanation for that.
Phenom 1 was awful, but Phenom 2 was pretty damn good. I had both when they were new. Phenom 1's biggest let down was it's woeful clocks and 0 ability to OC. I couldn't even get 100Mhz out of any Phenom 1 chips back in the day, but my Phenom 2 chips had way higher stock clocks and could clock typically 600-1000Mhz more than stock with a conservative OC. Then bulldozer and related gen came out, I agree they were shite for the lower end stuff, being slower than Phenom 2 in most cases, but the late higher end Bulldozer family chips were actually a good step faster than Phenom 2. I got given a 8320 and I replaced my Phenom 2 X945 and it was a lot quicker in general and gaming too. Over the years as windows got better, the old faildozer got faster and aged less than even intel at the time and left Phenom 2 in the dust. My main system is still the 8320 and is snappier than my zen+ or zen2? work laptop but I put most of that down to win 10 being a much slower OS for general tasks than win 7 is.
I agree that Phenom II wasn't awful. Phenom II introduced the first 6-core CPU's to the mainstream consumer desktop CPU market. Unfortunately, most software couldn't take advantage of that many cores, but if you found some, you were a happy camper. My friend had a Phenom II X6 that did him so well, he went directly to a Ryzen 7 3700X from that old badboy (and this was a gaming PC). The cores helped it scale well over the years, especially once he upgraded from Win7 to Win10.
There was a leak, i think it was by Moores Law is Dead, that said that we wouldn't get 16 core chiplets (aka zen5D/C), on desktop, for desktop. Sadly it seems for zen5, that we have to surffice with 16 core, again, max.... Unless they do more than 2 chiplet pr desktop cpu... Zen6 would get Zen6D/C for desktop, supposely, though... (all rumours, so take it with a grain of salt)
@Thomas B by the time zen6 comes, it will be down to 2 or 3nm processing, vs the current 5nm. Of cause tripling the l2 cache will cost some more in power, but im sure its doable without hitting Intel max tdp of 250watts ;)
Honestly, even as someone that doesn't use a laptop that often, I am really excited about it. It opens up a whole new world of possibilities with laptops, and may even turn me into a laptop user lmao. I have a 10708GB and a 7700x, and this 28W cpu will have more cpu and gpu performance than my whole Full sized tower.
@@johns.1898 Counterpoint (not really), Pascal, Turing and Ampere's 3060 (ironic). Though, the 40 series laptop chips are real bad, literally a tier lower for any chip 4060 and beyond, instead of downclocked ones like those I mentioned in those not-really-counterpoint.
The problem with CB and high thread counts is why presumably AMD decided to use C-ray way back (as your videos discussed, re my detailed explanation at the time), because it made for good PR, so it's interesting that AMD did not use C-Ray for later launches. Perhaps it's because C-Ray can't highlight gains from the likes of AVX, it's such a very simple and not exactly real-world test (it just looks good for PR because it scales so well). Wasn't there an article way back talking about a similar problem with an earlier version of CB? I forget where I read it now, but it was a similar notion, newer SKUs with a lot of threads weren't being exploited as well as they ought because of the limitations of CB at the time.
I snapped up a bundle deal so am on AM5, X670 mobo. I am excited for these future architectures though; I will definitely buy the last gen of AM5 and slot it into my motherboard down the line. Just waiting on the GPU market to improve. So far everything this generation has been a pass. I am going to go radeon but am waiting for a more affordable option that far exceeds my gtx 1080.
I wouldn't interpret too much into the Tenstorrent slide. Probably Jim Keller made a well educated guess and maybe picked the higher end of likely IPC increase because he wanted to have a best/worst case comparison to dedicated machine learning hardware. The way these kind of slides are presented in the industry he probably didn't think that much about the labeling until someone prompted him for a clarification/correction. The big L2 cache is interesting. Maybe the engineers at AMD made a chip at the upper end of what is possible to better test and gauge the performance implications of cache size. The end product might use the amount that AMD found as the best compromise.
this is what ive been wanting to see for years true competition, and amd is slowly catching nvidia on performance and software amd vs 2 giants 2024 and 2025 are looking interesting for pc hardware
I kinda miss those quad core days. When you bought 50% (or more) more cores than you needed, you at least got HEDT features. Now, you're stuck spending HEDT money on babies first socket (consumer parts) and if you want a fully featured enthusiast machine that starts at 2500 bucks for a 12 core, board and 64gb of overclocked registered ecc.
The difference is that back then very few applications would even use 4 cores. The fact that a 4C4T part delivered maximum gaming performance means that games only needed like 3 cores with the fourth going to background tasks. Now games want 6 cores and there are many consumer applications that can use up to 16 cores. The mainstream has eaten into HEDT. The only difference is massive IO and even higher core counts. The core counts are only necessary for workstation applications, and with the death of multi-gpu the IO enhancements are unnecessary as well. An enthusiast just needs 16 lanes for the GPU and 4-8 lanes for SSDs. The mainstream also has gotten so much better IO since the old days.
The golden days where i7-7700k was 5-10% faster then the i7-6700k, and most of the improvement was higher clock speeds that you can get on the 6700k anyway without even raising the voltage.
@@dex6316 @Dex There are very few applications that use more than 8 cores. There is no reason for 12 and 16 core parts on the consumer platform. Yet people are celebrating paying HEDT money for consumer hardware when a high end enthusiast system should have 40 to 48 PCIE lanes and quad channel memory.
@@peterconnell2496 The good old days was HEDT. Yeah, what you said is a fine budget gaming platform but I don't want a budget gaming platform, I want a high end enthusiast PC.
A new Jim video. Sweet, always look forward to your content. Edit: Watched the video, it's so exciting to see innovation again. So glad AMD constantly pushing the envelope since we consumers benefit.
I think Keller's ability to "estimate" is likely from his existing intimate knowledge of the architecture. He probably worked out future projections long before he left.
hey, I had both a Phenom and a Bulldozer. I had the legendary 960T and I also had the 8320 - the 8320 was actually v good in windows vs my 4790k, which I found lacking in windows (but obviously made up phenomenally in Games).
This is why I went with a 7800X3D instead of the dead 13900k. I can slot in a new CPU to my motherboard, instead of having to buy an all new one as with 13900k.
I'm not getting excited about expensive chips with excessive L2 again, not after spending a huge amount ($600usd) on a 4400+ x2 (the cheapest double cache model) Toledo back in 2005-2006, it was over a thousand dollars (usd) for a 4800+ x2! Ryan Shrout at PC Perspective did a great review on the 4400+ and actually got the cache amounts right which seemed impossible for most internet pages to get right, but I must have had more money than sense, I realised that soon after buying it, sold it, bought my first laptop, a core 2 with MXM gpu, zero regrets
13th generation’s Raptor Lake will be refreshed into Raptor Lake refresh. Whether that’s 13th generation or 14th generation is yet to be seen. 2024 is likely to use Meteor Lake up to the i5. That’s a 6+8 design using Redwood Cove and Crestmont for a 15-25% IPC gain. The i7s and i9s will utilize Arrow Lake in an 8+16 design. Lion Cove is another 20%+ IPC gain over Redwood Cove and Skymont is expected to be a proper micro architectural enhancement as well. I think there is a decent chance a 6+8 14600K based on Arrow Lake will exist. Lion Cove will definitely beat Zen 5 in IPC, and possibly Zen 6 as well.
Wonder with this increase in L2 cache and intel doing what they are with L4 if AMD either in zen 5 or zen 6 will just have vcache as the standard going forward?
I'm by no means sure, but I don't think Cinebench uses CPU affinity. I think it simply has a hard-coded rendering thread limit, and creates only up to 256. I believe it lets the OS schedule them, which means it's only doubling up on physical cores when the thread count exceeds the core count.
Imagine Intel actually got "Adamantium" to fab chips with!!! You could push unlimited voltage through it because once fabbed it's indestructible! I suppose Adamantine will have to do though. Plus paying royalties to Marvel comics on every chip sold is probably not too attractive to Intel.
@Steve ShermanMore like: Intel 1: Hey AMD has this really cool 'V-Cache' technology that extends their l3$. They are beating us in gaming because of it. Intel 2: Hey that sounds like our old Crystal Well cache implementation. Why don't we take that and make it bigger and faster on a smaller node? Intel 1: That sounds like a great project. We can either die stack it like Lakefield or keep it on package like Crystal Well. Any ideas for names? Intel 2: Uhh... I don't know... Adamantine I guess...
Its a no brainer ... go with the safe 4nm option while easilly pulling 20% IPC and if they try they can get to 30% Wait for 3nm to mature and release Zen6 on that , do a minimal IPC increase but double the cores and make IPC the focus of Zen7
14:44 L2 cache increase is useless unless TLB and other buffer sizes are increased too, to make use of L2 by prefetching from RAM, anandtech low level CPU reviews have found multiple times that doubling L2 cache improves IPC by 2.5% only, biggest update about zen 5 is going 5 - wide or 6 - wide to finally match beat everyone in the market(including ARM) for IPC crown..
@@portman8909 i would say go for it, that 96MB L3 cache will probably won't be obsolete in next 10 years, intel's strategy of increasing L2 is kill their efficiency without much performance increase..
Increase cache size/speed is one of the oldest ways to gain performance, but it's also one of the most costly. With these constant increases across the board, it [for me] really highlights the struggles they're having to increase performance.
I would say performance is mostly a software problem these days now. Look at how terrible the new Star Wars game runs on pc even with a 4090 vs consoles
@@VoldoronGaming Wait, that's an EA release. Should be pleased to get a game at all for your money, typically it's just spit o your face (hence I've not given them money for at least several years)
I believe Zen 5 will be a massive IPC jump for AMD and will likely tie or narrowly beat MTL in ST IPC. The problem is MTL was a delayed project and ARL is already being loaded into the cylinder to shoot right after MTL clears the chamber. That will be 20% IPC for MTL (6 wide Redwood Cove) and another 25%+ IPC for ARL (8 wide Lion Cove) .
Keep on mind that AMD has lots of performance levers they can pull to increase performance. AMD probably narrowly wins against MTL and narrowly lose vs ARL if they pull all the stops. It's still good for consumers to have them leapfrogging each other like this!
I hate when people mocking over bulldozer. Yes, performance is terrible but it's fundamental for the design of Zen arch. Remember sharing resources? They doing it now but at better result.
3DVcache won't matter all that much when L2 cache gets much bigger. It still will do something, but not nearly as much as before. As such I expect L3 cache sizes to go down if they enlarge the L2. Would be interesting to see if they slowly evolve to the virtual L3 that IBM did. Where Really Large L2 per core, together also acts as shared L3.
Not really, they have very different performance characteristics. Some games (and other applications) would benefit immensely from a larger L2 cache, just like some games are benefiting immensely from a larger L3 cache, but it really depends on the memory access pattern of the game or application.
I don't see why they would produce these in hardware if they didn't plan to productize. They've been able to simulate with pretty good correlation larger caches for decades
It’s a safe bet that the R&D chips don’t contain just one or two changes from ‘base’ designs. There’s a whole bunch of other things they’re testing that weren’t in this leak (some of which will never see the light of day).
If only AMD would like to put the same effort into their Radeon division... But GPUs are responsible only for 3-5% of AMD's total revenue so they are quite irrelevant when compared to their CPU division where they can sell their products on both (private consumer and enterprise) markets and they also have Instinct, not to mention consoles market.
I agree. But it seems making GPUs is a totally different story than making CPUs. Look at Intel (making top tier CPUs) : their Arc it's not bad but well behind the green and red team.
They are putting a lot of effort in the GPU division tbh. The chiplet design is by no means an easy task. It's not delivering full benefits yet, but these major paradigm shifts take some time to perfect. Zen1 was not an outright win either. It took Zen2 and Zen3 to really cement AMD as a leader in CPUs.
@@SirMo zen 3 was what did it. Zen 2 was a blow to Intel for sure, but Zen 3 was a knockout punch. I’m hoping Radeon 8000 can iron out the kinks, but I don’t expect significant damage to Nvidia until 9000.
Memory is moving more and more and closer and closer to the CPU. I wouldn't be surprised if in a few years what we now call "L4" is big enough to actually run complete Operating Systems plus applications, and CPUs start "swapping" to RAM, so to speak. Intel did something relatively similar with Knights Landing before, just that there L4 was actually HBM. 3DVC and ADM are both steps to move this type of memory completely into the CPU. This kind of topology doesn't only provide much lower latency for memory access, but, and that's probably the more important factor, saves massive amounts of power.
I think we might see what Apple has done and put the Ram onto the package right next to the SOC. Which could be the end for upgrading your memory unless you buy a server, workstation or a super expensive "High End" motherboard that will still let you add in additional memory.
Alas, it's been quite disappointing on desktop. It's great in mobile and compute workloads in Linux, but it's done almost nothing for normal desktop users.
AMD L2 cache is exclusive to the CPUs, it can't be accessed by other CPU cores, so if the performance is up so much in MT but not up at all in ST it will be down to how it interacts with SMT or how it alleviates the load on the L3.
3MB of L2 per core? Thats more L2 cache per core than the 7840HS has of L3 per core. Is this a unified L2/L3 cache somewhat like IBM Zcache? Something like 32MB of L2 for an 8 core chip
I thought the same thing, in the end all architectures will have to move to such a caching scheme. Simply due to it being impossible to keep adding more cache due to scaling issues. The obvious direction has to be in using the same total amount more effectively. For now it will not be like zCache, simple because 3 MB is too small for that (IBM used 32MB L2 per core).
@@TheEVEInspiration Oh its 32MB per core? Wow, I thought it was 32MB total which is still alot of L2, though obviously slower than L2 because of the depth
As always Jim, you drop something interesting for the tech space. You started the vid mentioning AI. From everything I've heard nVidia are looking to use this as their new cash cow for their GPUs, I believe that will make a difference for the consumer GPU market, but what interests me is what AMD are doing with their consumer based CPUs and GPUs. They are the only tech company that produces both CPU and GPU. Currently it looks like they'll kill off entry level GPUs with their APUs, but where is the GPU market going and how much of what we see in Zen5 will drop into graphics?
I just want them to increase core count finally in desktop. I am sick of R5 6core and R7 8core since zen1. Meanwhile Intel increasing core count in core i5/i7 like crazy. I want from zen5 R5 8core for 250, R7 12core for 350 and R9 16core for 550usd or i wont buy it. Intel went from i5 6core/6 threads to 14cores/20threads meanwhile AMD still trying sell 6core/12 threads for 300usd since zen1😂
I'm sick of having all these cores & threads and basically no benefit from them if I'm not doing some kind of heavy work. A 5950x doesn't do a damn thing for me over a 6/12 when you have to go out of your way to find software to actually put a real load on the damn thing.
IMHO, the "Ladder" is simply multi-die stacking, how many runs do you want to climb.? 0, 1, 2, 3... Now multiply by the "default" (L3) cache arrangement 16, 32, 48, 64. Or perhaps 32, 64, 96, 128.!
The thing I want to know most is, will the new Zen5 be compatible with the AM5 socket? I'm in the R&D phase of building a new rig (out of necessity) and wondering is its worth it to drop $700 on a motherboard now to be able to put a Zen5 in it later. The x670e chipset meets all my requirements for connectivity, so I don't even care if a new chipset is released, just want the Zen5 to work in the board.
I just today received my 7800X3D so I'm sorted for a while but if AM5 does have the same support AM4 had a 16 Core Ryzen 7 9800X3D should be a nice upgrade in few years 😁😁
Great video, I don't think 3nm will give AMD any advantage over intel, it sounds controversial but here's why - Recent reports suggest TSMC struggling with 3nm capacity and volume ramp to meet Apple demand (remember intel is ahead of the queue next to Apple for 3nm wafer capacity at TSMC). So when Zen 5c comes out, probably late 2024, it will be in limited quantities to make a dent in anything, and intel will be prepping 18A ramp. If Zen 5 is to win, AMD has to do it on 4nm and make it impressive vs intel 3 products. I expect them to trade blows and i expect intel to break ahead as expected with 18A
3MB is a LOT for L2 and I'm guessing the latency will be pretty high, so if AMD is trying to limit latency L2 will cap at 2MB/core. This is going to make it to where Vcache is less effective so at some point the only way I see Vcache parts is if AMD pushes ALL L3 to a stacked die which would give them a lot of real estate on a very expensive node such as TSMC N3 for more cores or possibly getting the memory controller off the CCD because THAT config seems to have a problem, and probably why 4 sticks of memory runs so slowly and even 2 sticks cap at about 6000mts. If they stack all L3 on an N3 node and slow clocks a little so heat isn't an issue, for one they could use something like TSMC N6 for the cache and save money and two it would give them more space for getting past an 8c/16t core for desktop and move to maybe an 8+8 config (big-little) or at least 8+4 where the little cores are their "C" cores which still use SMT and the full X86-64 ISA so that would get them to 24t/core chiplet and a total of 48 threads for Ryzen, and really, they need to get to that point as long as they get their memory issues worked out. Also, maybe instead of CCD to CCD comms going through the IOD, it should be a direct connect from one CCD to the other. That would also reduce latency.
Did you stop the video or something? Jim literally wrote that AMD found that 2MB and 3MB L2 had NO LATENCY INCREASE. L2 cache will likely be limited to what's best for price to performance. As far as the memory controller and RAM speed limit, this is AMD's 1st gen of DDR5. Intel had the same issues with their 1st generation and AMD actually roughly matches 12th gen Intel as far as memory speeds and both have issues with 4 DIMMs which is a DDR5 thing). Zen 4 appears to be limited to 6400MT/s not 6000MT/s. Igor's Lab got 6400MT/s with multiple SK hynix and Samsung RAM kits on a 7950X back in October and Buildzoid reached DDR5-6200 CL26 on a 7600X more recently. Some AM5 motherboards are capable of DDR5-6600MT/s with 2 single rank DIMMs but not sure if anyone's reached that yet.
did you guys know that if superconductivity materials are used in a chip, a speeds of 770 Gigahertz can be achieved? Now you can only imagine how an extraterrestrial civilization can laugh about your 15% IPC increase and your 5Ghz+ speeds
Let's hope the IO chiplet gets a rework and they manage to double the 3600mhz ddr4 sweet spot to 7200mhz on zen5 and don't do a cut and paste from zen4 like zen 2 to 3.
I'd like to see AMD move to a large shared L2 on the CCX and move the L3 (and 3D Vcache) to the IO die. This should allow for larger L3 cache sizes and faster clocks on the CCX, but might increase latencies. However, I'm not sure how difficult this would be to design, so it might just be a pipe dream of mine.
No. L3 still on 3DV, no way it's gonna move to IO. If they afraid of Intela adamantine, they can add shared L4 on IO die. Better in latency department.
Now if only AMD can fix that scretchy DDR5 controller (or just give duel CCDs 4 memory channels). And the wonky 3D cache on 1 CCD. To not have a latency hit is interesting (as thats normally the catch with adding more cache). Caching and branch prediction get complex (branchless code [no If statements] is a big performance optimisation). I do wonder when AMD will add HBM to a CPU, seems like a naturally evolution to me, I guess 3D cache is a step in this direction.
Good, can't wait for it in laptops. Gives me some solace since nvidia laptop GPUs this gen are a straight scam and AMD is non-existent in laptops (besides the fact that seemingly 7000 series GPUs are bug out in VR) It makes waiting for the next generation of laptops seem worth it.
The thing that I find interesting is that the 30% is plausible if they upgrade all areas of the chip. But based on current leaks from when I'm writing this. It will be closer to 20% because they are not going to get every % due to cost. So a few % they will just ignore and settle for slightly lover gains. A cost efficient scalable architecture. Zen. Has a nice ring too it eh? AMD picked the technology they did for chiplets to reduce price at the cost of performance. Intel is now going to implement their tiles to reduce and optimize power consumption and performance but at a cost. I mean it can save money too. But I think not as much as AMD. Very interesting rn. But in all honesty, I'm cheering for AMD. Lol when I built my 1st AMD PC in 2000, I had no idea we would see this much power in my lifetime! Lol
I believe Jim Keller created the Zen architecture in the beginning, and once he was done he left AMD. There's still tons of work afterwards even if he created the CPU to make a production sku and given the time difference it does makes some sense.
AMD's cpu division is astonishing. At this point, can we call their turnaround from Bulldozer to Zen 5 the greatest recovery we've ever seen from a tech company?
From near bankruptcy in 2014, to not only catching up with a dominant Intel, but have them scrambling into massive company restructures, just to compete.
I don't know if there's a CEO Hall of Fame, but Lisa Su should be a first class inductee.
Ok but that is thanks to previous management, tape out time was like 5 years for Zen 1 check your history
@@NeilBooth Yeah, while I appreciate what Lisa Su has done to manage the launch and subsequent launches of future Zen products, I really believe that Rory Read deserves a bit more acknowledgement for being able to keep AMD afloat post-Bulldozer.
Amd’s most recent CEO’s deserve that recognition. Lisa has done and amazing job keeping them focused on the prize
@@AnotherLotte Rory Read is a new name to me. Sounds like I should read deeper on AMD's history.
At least recently, but it is in the same ballpark of Apple on the verge of bankruptcy in the 90s, which was bailed out by Microsoft in it's darkest hour to avoid legal issues from going from an effective monopoly to a clear one without even a visible competitor in the consumer market. To not only growing past Microsoft's stock value in around a decade, but maintaining a strong position for decades now.
I'm more interested to see if AMD can come back swinging w/ their GPU division like they did a few years ago w/ Ryzen in their CPU division.
No point , people just buy nvidia , look at rtx3050 is 50% slower than rx6600 and people still bought more rtx3050 , same price , $250 .00 .
Rtx3070 8gb sold more than entire rx6000 line up from amd , rtx3070 only 8 GB still $500.00 and rx6800xt 16gb is 40% faster same price now , still people buy gimped nvidia hardware .
So no point competing .you can't fix dumb people .
No point. Nvidia has turned the gpu market into a software battle amd can't win. Gimmicks like physx and rtx in the gaming market, and cuda in the business and pro market. Amd can't dominate the market until they can tell devs what to code, and they can't tell devs what to code until they dominate the market.
with what ive been hearing from game devs is they dont want to work with nvidia anymore because they are holding back on vram that they need alot of devs thought 8gb to only be on low end by now
@@kintustis Well, Nvidia has shot off their own limbs by hamstringing the VRAM on their GPUs as low VRAM means no RTX at higher resolutions lol. The calculations for Raytracing and Physx have to reside somewhere and that's VRAM.
@@earthtaurus5515 Nvidia has been doing that for decades at this point. Clearly it works for them, and they don't need to change anything.
This shows the effect of solid competition, where the two combatants trade blows. The general purpose CPU market is healthy. This is sorely needed in the GPU space.
@@gamingtemplar9893This exactly.
People will whine about "free markets creating monopolies" (or in this case duopolies) but the second you dig into any of them you'll find a mountain of unnecessary regulations, giant piles of money from government subsidising and massive amounts spent on lobbying for politicians that are gung-ho about increasing taxes and the previously mentioned regulations further.
@@gamingtemplar9893 why personally I am for enforcing anti-trust here in the US
@@gamingtemplar9893 bruh the fact that you think the poor GPU market is due to ‘regulations’ and ‘not free market capitalism’ is absolutely ridiculous. I don’t know what kind of logic you’re using to suggest that the lack of competition is due to too much regulation. That’s absurd.
It's not a healthy competition it's still a duopoly. For a healthy competition we need 2-3 more CPU manufacturers and then the real competition would begin
@@egonieser For sure. A race with more than two participants is far more healthy. However, I'll point to the GPU space, which currently has three players, and that's not doing consumers any favours. We need neck-and-neck races for this to work, no matter how many companies are competing against each other.
i remember when intel were selling the i7-6900K for 1k usd at retail 1k for a 8/16 thread cpu intel deserves all the beating they get I am here for it
And a whopping $1700 for the 10C/20T 6950K!!! Only 70% more for the privilege of two extra Intel cores!!! 😂
@@filipealves6602 Lets not forget the crazy improvement of i7-7700k over i7-6700k. 10% faster clock.
@@shepardpolska irrelevant. The 7700K was the only decent product from the 7000 series (maybe the non-K as well), but all others had poor performance and terrible value.
@@filipealves6602 Sorry? 7700k is practically 6700k with a higher clock. You were better off buying cheaper skylake CPUs Benchmarks from the time show the 7700k being like 7% faster on avarage and like 3% faster in games over the 6700k
@@filipealves6602 Wrong. The Pentium G4560 added Hyperthreading to the pentiums and made i3s irrelevant at the time. Shit was fucking awesome back then.
Excellent video as usual, always love these clarifying analyses.
The l2$ being able to be tripled at no latency cost is huge. The reason why Intel and AMD have been sparing with cache sizes is because in an increase in size is in an increase in latency. I’m sure that if they didn’t have latency penalties they would grow the cache even at the cost of die increases. We know that data center loves more l2$ from Intel always having a bigger l2$ since Skylake-X. We also know that gaming loves more cache.
Since AMD uses the same dues for data center and consumer, they will certainly implement this in the coming years. We know from both AMD and Intel that they can easily incorporate a cache size increase in as little as a year, so perhaps a Zen 5+ in 2024 to go against Arrow Lake. A Zen 6 in 2024 doesn’t seem impossible, but AMD likes to wait more than a year to bring out a new micro architecture.
The ladder interconnect is certainly interesting, but probably not that consequential. Ring buses have excellent performance for 8 cores. It is definitely going to be consequential for Zen 5c because those 16 cores will get excellent latency enhancements. For Zen 5 I would expect no more than 1-2%, and probably negligible enhancements from the switch alone.
An increase is size usually means taking up more die space as well. Less circuits for execution will take down performance, so it's very much an art (science) of utilizing die space with maximum efficiency (or effectiveness, if you prefer).
Ep(y)c. The fact that both AMD and Intel are both about to have one of their best uplifts in a decade is very exciting.
@Steve Sherman No. Maybe the price will increase but nowhere near to what's happened to GPUs. Both Intel and AMD are competitive in x86, with multiple platform choices being viable as CPU uplifts are not even close to as big as GPUs gen to gen.
i remeber the times when intel was dominating and offering those
From what I remember, Jim Keller was hired by AMD to design the ZEN architecture. It was a huge announcement during AMD's financial crisis in 2012, and his return to AMD was regarded as AMD's last stance in the industry. If ZEN failed AMD was done. In retrospect, Jim Keller saved AMD.
So when you say he didn't work on ZEN5, which is true, but neither did he work with any other ZEN design but the first one. Keller was hired to make "ZEN" as a whole, ZEN 2, 3, 4, and 5 is all AMD tinkering with the design that Keller left behind.
You do know Zen 3 and 5 are both complete redesigns right
@@NadeemAhmed-nv2br There's no such thing as a complete redesign. Everyone always takes what they already know works and assembles it in slightly improved ways.
@@rightwingsafetysquad9872 Actually , Jim Keller himself talks in interviews that every 5 years companies tha design CPUs have to design something new.
@@NadeemAhmed-nv2br not at all, they're both chiplets, and they both use infinity fabric. and if they were indeed complete redesigns, they wouldnt call them ZEN.
but if you're an individual who works at AMD, you can prove me wrong right?
Jim's interview with Dr Cutress made it clear he was putting the team together and managing, it's really Michael Clarke also interviewed by Dr Cutress who was the architect of Zen.
If they increase L2 to 3MB/core, they'll stack all L3 by default. Mark my words.
Makes sense. Otherwise, that chiplet would balloon in size. And AMD is really particular about core size, and chiplet size by extension. Will be curious to see if they decide to segment their products based on L2 cache size in the future.
That's in my mind too! 16 core CCD stacked on top of 128 MB of L3$!
@@KarrasBastomi could be for Zen 5c, but for Zen 5, we only get 8 cores per CCD. I expect the cores to be much wider than before though.
@@GeoStreber He talks about Zen6 and beyond
Can't be the only one out there still perfectly happy with their Zen3-rigs until they really can't no more.. which should still be a pretty while off ☺
Meanwhile those major IPC bumps and multiplying corecounts ahead should make plenty look forward to whenever that day comes already 👍 thanks for the video!
I'm rocking my 5950x, and looking how the things are panning out my next upgrade by 2026 is gonna be full AMD too. We're living interesting times.
R7 5800x3d here, loving it. Should keep my rig going quite happily for a few years to come.
Zen 2 here (3700x), can't complain
I recently upgraded from an R7 2700x to an R9 5900x. Damn that upgrade is very, very noticeable.
Zen 3000 and 5000 will be competitive until the consoles refresh, at least. What the PS6 and Xbox Series Y (or whatever) use will determine what specs you need to aim for.
Jeez. AMD really going for Intel's jugular, and they're not letting go. Thanks for the tech update Jim, wonderful as always.
Zen 5 should arrive right about when I finish my car payments, heralding my biggest CPU upgrade since I moved from a Core2quad Q9550 to a Core i7 5820K :D
"Alright guys" man i missed Jim. Looking forward to this one.
Ah it's a great start of my spring Holliday when Jim uploads!
Nice to hear you're friendly with Tom - he's a nice guy!
If I remember correctly in one of his first videos on YT, Dr. Ian Cuttress (TechTechPotato) paid you an homage in expanding on the idea in your videos on "Interposers and butterdonuts". In it he also claimed (IIRC) that they did check and ask AMD about L3 in Zen 3 and that according to AMD it wasn't exactly a bi-directional ringbus, but something that acted like it for 8 cores. Though apparently back then they still didn't have an idea what exactly to do in the future to scale it up.
But this was one of the biggest obstacles in creating 16 cores CCX. It seems that now they will only make L3 smaller, with Vcache being substitute and perhaps in the next one they will get rid of L3 on the die completely and will use only Vcache as a source of L3. It's not penalty free, but it might be better than either connecting through Infinity Fabric or some other thing like mesh topology. Which technically scales better that ringbus, but it's still not fantastic for the numbers we're talking about.
LMFAO the thought of manufactures trying to avoid benchmarks by shoving as many cores and threads as possible so that the benchmarks fail to grasp the full power is hilarious to me
This is where my hype starts, for Intel responses as well. AMD's new trend in delivering beefier APUs can't be a coincident or just share RND expansion, Intel Tiles are coming too
I can't wait for a time where we could ditch dedicated GPU as APU and continuous development of upscaling like FSR makes an improvement.
Yeah 100%, dGPU still will be useful and wanted but I feel like my needs are met on the mid-end unless I want to do some Ray Tracing in games and that'll get even better with time @@wahidpawana424
You Got the layout stuff right!
I disagree with the claim "Phenom was awful"... Phenom II was very competitive with Core2 duo and quad, and still a decent option vs Clarkdale and low end Lynnfield chips. When Sandy Bridge came out, it was left in the dust like everything else. It was just that AMD's next big thing was very late to market and had a wildly optimistic design that went in the wrong direction entirely.
Yeah Phenom II was by no means awful. It was the last good AMD architecture before Zen came out.
Definitely not awful, but still quite a bit behind even Bloomfield (the first Nehalem processors).
I moved from a Phenom II 955 to an i7 950 back then, and did some gaming benchmark tests before and after. In very CPU-limited settings, the i7 950 was 40%+ faster than the Phenom II 955. That's with the former at 3.69GHz and the latter at 3.6GHz, so almost the same clock speed.
At the time, I had a 5970 and mostly played at 2560x1600, and there were still many CPU-limited scenarios at that resolution. For example, one of my old tested games was _Dirt 2._ At 2560x1600, highest settings, and 4xAA, the i7 950's average frame rate was 114, while the Phenom II 955's was 80. _Company of Heroes,_ also with highest settings and 4xAA, was much heavier on the GPU, but still showed a 14% advantage for the i7 (138fps vs 121fps).
So while the Phenom II was a good CPU, it was still considerably outclassed by Nehalem. And then came Bulldozer, meaning AMD wasn't a viable option for years.
The Phenom II could trade blows with most of Intel’s lineup when it came out in everything except AVX workloads and random memory latency. It still does better than my I5-6500 in everything except gaming.
You would think 20ns versus 68ns in RAM latency for a random address would hurt the Phenom II but apparently it doesn’t in most tasks. I have no explanation for that.
Phenom 1 was awful, but Phenom 2 was pretty damn good. I had both when they were new. Phenom 1's biggest let down was it's woeful clocks and 0 ability to OC. I couldn't even get 100Mhz out of any Phenom 1 chips back in the day, but my Phenom 2 chips had way higher stock clocks and could clock typically 600-1000Mhz more than stock with a conservative OC.
Then bulldozer and related gen came out, I agree they were shite for the lower end stuff, being slower than Phenom 2 in most cases, but the late higher end Bulldozer family chips were actually a good step faster than Phenom 2. I got given a 8320 and I replaced my Phenom 2 X945 and it was a lot quicker in general and gaming too. Over the years as windows got better, the old faildozer got faster and aged less than even intel at the time and left Phenom 2 in the dust. My main system is still the 8320 and is snappier than my zen+ or zen2? work laptop but I put most of that down to win 10 being a much slower OS for general tasks than win 7 is.
I agree that Phenom II wasn't awful. Phenom II introduced the first 6-core CPU's to the mainstream consumer desktop CPU market. Unfortunately, most software couldn't take advantage of that many cores, but if you found some, you were a happy camper. My friend had a Phenom II X6 that did him so well, he went directly to a Ryzen 7 3700X from that old badboy (and this was a gaming PC). The cores helped it scale well over the years, especially once he upgraded from Win7 to Win10.
Why is this video only half the acceptable length Jim? 😜
32 cores on AM5 would be very nice to see.
There was a leak, i think it was by Moores Law is Dead, that said that we wouldn't get 16 core chiplets (aka zen5D/C), on desktop, for desktop. Sadly it seems for zen5, that we have to surffice with 16 core, again, max.... Unless they do more than 2 chiplet pr desktop cpu... Zen6 would get Zen6D/C for desktop, supposely, though... (all rumours, so take it with a grain of salt)
AM5 doesn’t have enough PCIe lanes or memory bandwidth to keep 32 cores fed.
@Thomas B by the time zen6 comes, it will be down to 2 or 3nm processing, vs the current 5nm. Of cause tripling the l2 cache will cost some more in power, but im sure its doable without hitting Intel max tdp of 250watts ;)
Then wait for a refresh on threadripper, etc.
@@onomatopoeia162003 Threadripper does not utilize AM5, nor AM4 socket
Love that butterdonuts are back in the discussion. Mmmmm, butter....donuts....
Intel / Wolverine crossover confirmed. Finally, Intel will be able to claw back its desktop performance crown.
Ok that's actually funny. I'd love to see some sort of collab because of the naming.
Can't wait for the Strix Halo, for all the MacBook tier integrated experience, and that Novideo pulling the GPU chips a tier down on mobile.
They've ALWAYS done this
Honestly, even as someone that doesn't use a laptop that often, I am really excited about it. It opens up a whole new world of possibilities with laptops, and may even turn me into a laptop user lmao. I have a 10708GB and a 7700x, and this 28W cpu will have more cpu and gpu performance than my whole Full sized tower.
@@johns.1898 Counterpoint (not really), Pascal, Turing and Ampere's 3060 (ironic).
Though, the 40 series laptop chips are real bad, literally a tier lower for any chip 4060 and beyond, instead of downclocked ones like those I mentioned in those not-really-counterpoint.
War is good in this sense. They keep battling and We keep Winning as Consumers
Linux Kernel now scales with more than 256 threads (still a mess in htop), so just keep the cores coming.
Thanks Jim, really looking forward to this Zen 5 launch, I really hope it's not all hype!
Jim, it's like 3am here... OMG... I'll just hit like and watch this later. Thanks!
The problem with CB and high thread counts is why presumably AMD decided to use C-ray way back (as your videos discussed, re my detailed explanation at the time), because it made for good PR, so it's interesting that AMD did not use C-Ray for later launches. Perhaps it's because C-Ray can't highlight gains from the likes of AVX, it's such a very simple and not exactly real-world test (it just looks good for PR because it scales so well).
Wasn't there an article way back talking about a similar problem with an earlier version of CB? I forget where I read it now, but it was a similar notion, newer SKUs with a lot of threads weren't being exploited as well as they ought because of the limitations of CB at the time.
I snapped up a bundle deal so am on AM5, X670 mobo. I am excited for these future architectures though; I will definitely buy the last gen of AM5 and slot it into my motherboard down the line. Just waiting on the GPU market to improve. So far everything this generation has been a pass. I am going to go radeon but am waiting for a more affordable option that far exceeds my gtx 1080.
Video aint played yet, but this had better fucking start with Alright guys hows it going, cos i sure as shit miss your breakdowns and videos.
YESHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A large L4 cache shared between CPU, iGPU would test AMD's APUs
I wouldn't interpret too much into the Tenstorrent slide. Probably Jim Keller made a well educated guess and maybe picked the higher end of likely IPC increase because he wanted to have a best/worst case comparison to dedicated machine learning hardware. The way these kind of slides are presented in the industry he probably didn't think that much about the labeling until someone prompted him for a clarification/correction.
The big L2 cache is interesting. Maybe the engineers at AMD made a chip at the upper end of what is possible to better test and gauge the performance implications of cache size. The end product might use the amount that AMD found as the best compromise.
this is what ive been wanting to see for years true competition, and amd is slowly catching nvidia on performance and software amd vs 2 giants 2024 and 2025 are looking interesting for pc hardware
It's always a good day when Adored puts out a new analysis video
I kinda miss those quad core days. When you bought 50% (or more) more cores than you needed, you at least got HEDT features. Now, you're stuck spending HEDT money on babies first socket (consumer parts) and if you want a fully featured enthusiast machine that starts at 2500 bucks for a 12 core, board and 64gb of overclocked registered ecc.
The difference is that back then very few applications would even use 4 cores. The fact that a 4C4T part delivered maximum gaming performance means that games only needed like 3 cores with the fourth going to background tasks. Now games want 6 cores and there are many consumer applications that can use up to 16 cores.
The mainstream has eaten into HEDT. The only difference is massive IO and even higher core counts. The core counts are only necessary for workstation applications, and with the death of multi-gpu the IO enhancements are unnecessary as well. An enthusiast just needs 16 lanes for the GPU and 4-8 lanes for SSDs. The mainstream also has gotten so much better IO since the old days.
a $140 6 core AMD 3600 & a $100 am4 mobo is a fine gaming platform. I think you have a very flawed memory of the good old days.
The golden days where i7-7700k was 5-10% faster then the i7-6700k, and most of the improvement was higher clock speeds that you can get on the 6700k anyway without even raising the voltage.
@@dex6316 @Dex There are very few applications that use more than 8 cores. There is no reason for 12 and 16 core parts on the consumer platform. Yet people are celebrating paying HEDT money for consumer hardware when a high end enthusiast system should have 40 to 48 PCIE lanes and quad channel memory.
@@peterconnell2496 The good old days was HEDT. Yeah, what you said is a fine budget gaming platform but I don't want a budget gaming platform, I want a high end enthusiast PC.
Love this channel ❤️. Been away for awhile but saw one of the videos by chance and realized how much I missed it!
A new Jim video. Sweet, always look forward to your content.
Edit: Watched the video, it's so exciting to see innovation again. So glad AMD constantly pushing the envelope since we consumers benefit.
I think Keller's ability to "estimate" is likely from his existing intimate knowledge of the architecture. He probably worked out future projections long before he left.
hey, I had both a Phenom and a Bulldozer. I had the legendary 960T and I also had the 8320 - the 8320 was actually v good in windows vs my 4790k, which I found lacking in windows (but obviously made up phenomenally in Games).
@@OverbiteGamesthose mobile A series processors were dreadful!
This is why I went with a 7800X3D instead of the dead 13900k. I can slot in a new CPU to my motherboard, instead of having to buy an all new one as with 13900k.
if you talk about the Moores Law video for half the time, please put the link in the description, would be greatly appreciated (at least by me)
im still here pumpung 144fps on 2k with 5800x3d
It turned out it is amazing, just not for consumers.
Amazon, Google, Facebook, they all love these zen 5 chips.
Consumers get about 3-5% uplift
It is not amazing even for them. Consumers get 3% uplift overall, 2% in gaming and 9% for those companies
The ladder looks like a mesh with three additional horizontal ways. What do they represent? Is there an additional vertical node between the cores?
I'm not getting excited about expensive chips with excessive L2 again, not after spending a huge amount ($600usd) on a 4400+ x2 (the cheapest double cache model) Toledo back in 2005-2006, it was over a thousand dollars (usd) for a 4800+ x2! Ryan Shrout at PC Perspective did a great review on the 4400+ and actually got the cache amounts right which seemed impossible for most internet pages to get right, but I must have had more money than sense, I realised that soon after buying it, sold it, bought my first laptop, a core 2 with MXM gpu, zero regrets
Nice one Jim ^^
Was waiting for this one ^^
Intel should worry? Any news on the zen 5's intel counterpart? 14X00k?
As far as is currently known, Intel 14X00k is cancelled on the desktop.
13th generation’s Raptor Lake will be refreshed into Raptor Lake refresh. Whether that’s 13th generation or 14th generation is yet to be seen.
2024 is likely to use Meteor Lake up to the i5. That’s a 6+8 design using Redwood Cove and Crestmont for a 15-25% IPC gain. The i7s and i9s will utilize Arrow Lake in an 8+16 design. Lion Cove is another 20%+ IPC gain over Redwood Cove and Skymont is expected to be a proper micro architectural enhancement as well. I think there is a decent chance a 6+8 14600K based on Arrow Lake will exist. Lion Cove will definitely beat Zen 5 in IPC, and possibly Zen 6 as well.
@@dex6316 very interesting!!
Any sources where i can read more?
@@B-KARIM Tom from the Moore’s Law is Dead TH-cam channel has a few leaks discussing this very topic. Check out his videos.
@@dex6316 The Intel fanboy has arrived!
Wonder with this increase in L2 cache and intel doing what they are with L4 if AMD either in zen 5 or zen 6 will just have vcache as the standard going forward?
I'm by no means sure, but I don't think Cinebench uses CPU affinity. I think it simply has a hard-coded rendering thread limit, and creates only up to 256. I believe it lets the OS schedule them, which means it's only doubling up on physical cores when the thread count exceeds the core count.
Imagine Intel actually got "Adamantium" to fab chips with!!! You could push unlimited voltage through it because once fabbed it's indestructible!
I suppose Adamantine will have to do though. Plus paying royalties to Marvel comics on every chip sold is probably not too attractive to Intel.
@Steve ShermanMore like:
Intel 1: Hey AMD has this really cool 'V-Cache' technology that extends their l3$. They are beating us in gaming because of it.
Intel 2: Hey that sounds like our old Crystal Well cache implementation. Why don't we take that and make it bigger and faster on a smaller node?
Intel 1: That sounds like a great project. We can either die stack it like Lakefield or keep it on package like Crystal Well. Any ideas for names?
Intel 2: Uhh... I don't know... Adamantine I guess...
Its a no brainer ... go with the safe 4nm option while easilly pulling 20% IPC and if they try they can get to 30%
Wait for 3nm to mature and release Zen6 on that , do a minimal IPC increase but double the cores and make IPC the focus of Zen7
14:44 L2 cache increase is useless unless TLB and other buffer sizes are increased too, to make use of L2 by prefetching from RAM, anandtech low level CPU reviews have found multiple times that doubling L2 cache improves IPC by 2.5% only, biggest update about zen 5 is going 5 - wide or 6 - wide to finally match beat everyone in the market(including ARM) for IPC crown..
I think I'll wait for Zen with V cache. I may as well buy a 7800x3d instead of a 8700 by the sounds of it.
@@portman8909 i would say go for it, that 96MB L3 cache will probably won't be obsolete in next 10 years, intel's strategy of increasing L2 is kill their efficiency without much performance increase..
Increase cache size/speed is one of the oldest ways to gain performance, but it's also one of the most costly. With these constant increases across the board, it [for me] really highlights the struggles they're having to increase performance.
I would say performance is mostly a software problem these days now. Look at how terrible the new Star Wars game runs on pc even with a 4090 vs consoles
@@VoldoronGaming Wait, that's an EA release. Should be pleased to get a game at all for your money, typically it's just spit o your face (hence I've not given them money for at least several years)
I believe Zen 5 will be a massive IPC jump for AMD and will likely tie or narrowly beat MTL in ST IPC. The problem is MTL was a delayed project and ARL is already being loaded into the cylinder to shoot right after MTL clears the chamber. That will be 20% IPC for MTL (6 wide Redwood Cove) and another 25%+ IPC for ARL (8 wide Lion Cove) .
Arrowlake will be a big challenge for AMD in the desktop yeah.
Keep on mind that AMD has lots of performance levers they can pull to increase performance. AMD probably narrowly wins against MTL and narrowly lose vs ARL if they pull all the stops. It's still good for consumers to have them leapfrogging each other like this!
This aged poorly, since MTL is a IPC regression. It gets like, 5-10% worse IPC then RPL
@@shepardpolska actually it doesn't. But keep believing Moore's Law is Dumb. IPC is flat but it is much more efficient overall.
I hate when people mocking over bulldozer. Yes, performance is terrible but it's fundamental for the design of Zen arch. Remember sharing resources? They doing it now but at better result.
3DVcache won't matter all that much when L2 cache gets much bigger.
It still will do something, but not nearly as much as before.
As such I expect L3 cache sizes to go down if they enlarge the L2.
Would be interesting to see if they slowly evolve to the virtual L3 that IBM did.
Where Really Large L2 per core, together also acts as shared L3.
Not really, they have very different performance characteristics. Some games (and other applications) would benefit immensely from a larger L2 cache, just like some games are benefiting immensely from a larger L3 cache, but it really depends on the memory access pattern of the game or application.
As always, quality and super interesting content!
Thx for making the vid, Jim!
I don't see why they would produce these in hardware if they didn't plan to productize. They've been able to simulate with pretty good correlation larger caches for decades
It’s a safe bet that the R&D chips don’t contain just one or two changes from ‘base’ designs. There’s a whole bunch of other things they’re testing that weren’t in this leak (some of which will never see the light of day).
If only AMD would like to put the same effort into their Radeon division...
But GPUs are responsible only for 3-5% of AMD's total revenue so they are quite irrelevant when compared to their CPU division where they can sell their products on both (private consumer and enterprise) markets and they also have Instinct, not to mention consoles market.
I agree. But it seems making GPUs is a totally different story than making CPUs. Look at Intel (making top tier CPUs) : their Arc it's not bad but well behind the green and red team.
They are putting a lot of effort in the GPU division tbh. The chiplet design is by no means an easy task. It's not delivering full benefits yet, but these major paradigm shifts take some time to perfect. Zen1 was not an outright win either. It took Zen2 and Zen3 to really cement AMD as a leader in CPUs.
@@SirMo zen 3 was what did it. Zen 2 was a blow to Intel for sure, but Zen 3 was a knockout punch. I’m hoping Radeon 8000 can iron out the kinks, but I don’t expect significant damage to Nvidia until 9000.
Such a ridiculous sentiment
@@RyTrapp0 Maybe watch the previous AdoredTV video where he has quite the same thoughts about AMD.
Memory is moving more and more and closer and closer to the CPU. I wouldn't be surprised if in a few years what we now call "L4" is big enough to actually run complete Operating Systems plus applications, and CPUs start "swapping" to RAM, so to speak. Intel did something relatively similar with Knights Landing before, just that there L4 was actually HBM. 3DVC and ADM are both steps to move this type of memory completely into the CPU. This kind of topology doesn't only provide much lower latency for memory access, but, and that's probably the more important factor, saves massive amounts of power.
I think we might see what Apple has done and put the Ram onto the package right next to the SOC.
Which could be the end for upgrading your memory unless you buy a server, workstation or a super expensive "High End" motherboard that will still let you add in additional memory.
Alas, it's been quite disappointing on desktop. It's great in mobile and compute workloads in Linux, but it's done almost nothing for normal desktop users.
AMD L2 cache is exclusive to the CPUs, it can't be accessed by other CPU cores, so if the performance is up so much in MT but not up at all in ST it will be down to how it interacts with SMT or how it alleviates the load on the L3.
3MB of L2 per core?
Thats more L2 cache per core than the 7840HS has of L3 per core.
Is this a unified L2/L3 cache somewhat like IBM Zcache? Something like 32MB of L2 for an 8 core chip
I thought the same thing, in the end all architectures will have to move to such a caching scheme. Simply due to it being impossible to keep adding more cache due to scaling issues. The obvious direction has to be in using the same total amount more effectively. For now it will not be like zCache, simple because 3 MB is too small for that (IBM used 32MB L2 per core).
@@TheEVEInspiration Oh its 32MB per core? Wow, I thought it was 32MB total which is still alot of L2, though obviously slower than L2 because of the depth
As always Jim, you drop something interesting for the tech space. You started the vid mentioning AI. From everything I've heard nVidia are looking to use this as their new cash cow for their GPUs, I believe that will make a difference for the consumer GPU market, but what interests me is what AMD are doing with their consumer based CPUs and GPUs. They are the only tech company that produces both CPU and GPU. Currently it looks like they'll kill off entry level GPUs with their APUs, but where is the GPU market going and how much of what we see in Zen5 will drop into graphics?
_"They are the only tech company that produces both CPU and GPU."_
Um, did you forget intel?
I just want them to increase core count finally in desktop.
I am sick of R5 6core and R7 8core since zen1. Meanwhile Intel increasing core count in core i5/i7 like crazy.
I want from zen5 R5 8core for 250, R7 12core for 350 and R9 16core for 550usd or i wont buy it.
Intel went from i5 6core/6 threads to 14cores/20threads meanwhile AMD still trying sell 6core/12 threads for 300usd since zen1😂
I'm sick of having all these cores & threads and basically no benefit from them if I'm not doing some kind of heavy work. A 5950x doesn't do a damn thing for me over a 6/12 when you have to go out of your way to find software to actually put a real load on the damn thing.
Intel went from 10 to 8, you use small cores interchangeably. Sorry this comment is false.
IMHO, the "Ladder" is simply multi-die stacking, how many runs do you want to climb.? 0, 1, 2, 3... Now multiply by the "default" (L3) cache arrangement 16, 32, 48, 64. Or perhaps 32, 64, 96, 128.!
Its Gonna Be (Expensive) Really Good
Brilliant video! Thank you Jim
Your topic always an eye opener. ❤❤❤
The thing I want to know most is, will the new Zen5 be compatible with the AM5 socket?
I'm in the R&D phase of building a new rig (out of necessity) and wondering is its worth it to drop $700 on a motherboard now to be able to put a Zen5 in it later. The x670e chipset meets all my requirements for connectivity, so I don't even care if a new chipset is released, just want the Zen5 to work in the board.
Of course it will be compatible, AMD stated to support AM5 until *at least* 2025. By then, Zen 5 will surely have been released.
During the netbook era, their bobcat cores(e-series) were faster than Intel atom in both CPU and IGP(AMD Radeon vs Intel GMA graphics FTW😂)
and way better than VIA Nano with S3 Graphics!!
I just today received my 7800X3D so I'm sorted for a while but if AM5 does have the same support AM4 had a 16 Core Ryzen 7 9800X3D should be a nice upgrade in few years 😁😁
should be fine til DDR6, however that will work.
Great video, I don't think 3nm will give AMD any advantage over intel, it sounds controversial but here's why - Recent reports suggest TSMC struggling with 3nm capacity and volume ramp to meet Apple demand (remember intel is ahead of the queue next to Apple for 3nm wafer capacity at TSMC). So when Zen 5c comes out, probably late 2024, it will be in limited quantities to make a dent in anything, and intel will be prepping 18A ramp. If Zen 5 is to win, AMD has to do it on 4nm and make it impressive vs intel 3 products. I expect them to trade blows and i expect intel to break ahead as expected with 18A
That's on server side, on client side will be similar intel will use either 20A or TSMC 3nm or both for Arrow Lake & Lunar Lake
3MB is a LOT for L2 and I'm guessing the latency will be pretty high, so if AMD is trying to limit latency L2 will cap at 2MB/core.
This is going to make it to where Vcache is less effective so at some point the only way I see Vcache parts is if AMD pushes ALL L3 to a stacked die which would give them a lot of real estate on a very expensive node such as TSMC N3 for more cores or possibly getting the memory controller off the CCD because THAT config seems to have a problem, and probably why 4 sticks of memory runs so slowly and even 2 sticks cap at about 6000mts.
If they stack all L3 on an N3 node and slow clocks a little so heat isn't an issue, for one they could use something like TSMC N6 for the cache and save money and two it would give them more space for getting past an 8c/16t core for desktop and move to maybe an 8+8 config (big-little) or at least 8+4 where the little cores are their "C" cores which still use SMT and the full X86-64 ISA so that would get them to 24t/core chiplet and a total of 48 threads for Ryzen, and really, they need to get to that point as long as they get their memory issues worked out. Also, maybe instead of CCD to CCD comms going through the IOD, it should be a direct connect from one CCD to the other. That would also reduce latency.
Did you stop the video or something? Jim literally wrote that AMD found that 2MB and 3MB L2 had NO LATENCY INCREASE. L2 cache will likely be limited to what's best for price to performance.
As far as the memory controller and RAM speed limit, this is AMD's 1st gen of DDR5. Intel had the same issues with their 1st generation and AMD actually roughly matches 12th gen Intel as far as memory speeds and both have issues with 4 DIMMs which is a DDR5 thing). Zen 4 appears to be limited to 6400MT/s not 6000MT/s. Igor's Lab got 6400MT/s with multiple SK hynix and Samsung RAM kits on a 7950X back in October and Buildzoid reached DDR5-6200 CL26 on a 7600X more recently. Some AM5 motherboards are capable of DDR5-6600MT/s with 2 single rank DIMMs but not sure if anyone's reached that yet.
Have they fixed vpcompressd m512{k1},zmm yet or is it still microcode?
did you guys know that if superconductivity materials are used in a chip, a speeds of 770 Gigahertz can be achieved? Now you can only imagine how an extraterrestrial civilization can laugh about your 15% IPC increase and your 5Ghz+ speeds
That is greate... but as a private consumer.... I want more efficient gpu. I hardly use the cpu power I got
Better to create gaming APU at this point.
@@klanas40 yea. Absolutly. With something like a zen 5 you can peobobly note use more than 2 or 3watt of cpu performance anyway
Ladder bus would be worse than a bifurcated ring bus on 8 core chiplet.
I tried to like the MLID video in the video and ended up just pausing it.
lmao
Love the video as usual Jim!
Pls make video about Ryzen Z1 and future Srix Point
It looks like they are ready to make a bold push against Apple M series mobile
Let's hope the IO chiplet gets a rework and they manage to double the 3600mhz ddr4 sweet spot to 7200mhz on zen5 and don't do a cut and paste from zen4 like zen 2 to 3.
Tents to rent. I can't unread that after someone pointed it out on another video
oooh, Raja is on Risc-V... OK, 1-2 more years and Tenstorrent Risc-V will be dead.
No, Jim will fire Raja in 2 years. RISC-V is a fantastic. Nvidia Grace using ARM cannot come close to AMD Epyc or Tenstorrent.
Wellp, I'm looking forward to it. Hopefully MB prices fall down and self igniting bugs will be fixed by then...
Awesome video, Jim!
Jim, can u kindly tell us when consumer ryzen is going to get more pcie lanes?
Hmm. 3Mb of L2, means you could have 3 threads per core with enough cache to make it perform.
I doubt Zen 5 will be much better than 7800x3d. Maybe wait for Zen 5 with v cache?
I'd like to see AMD move to a large shared L2 on the CCX and move the L3 (and 3D Vcache) to the IO die. This should allow for larger L3 cache sizes and faster clocks on the CCX, but might increase latencies. However, I'm not sure how difficult this would be to design, so it might just be a pipe dream of mine.
No. L3 still on 3DV, no way it's gonna move to IO. If they afraid of Intela adamantine, they can add shared L4 on IO die. Better in latency department.
AMD needs to do something about RTG, CPUs are good enough but they really need to work on GPUs more
You should make a video of how AMD can make a come back in the video cars game. I love your analysis and how smart you are keep up the good work.
An AMD sponsored video car game would be pretty interesting. I'd like to see it.
Now if only AMD can fix that scretchy DDR5 controller (or just give duel CCDs 4 memory channels). And the wonky 3D cache on 1 CCD.
To not have a latency hit is interesting (as thats normally the catch with adding more cache). Caching and branch prediction get complex (branchless code [no If statements] is a big performance optimisation).
I do wonder when AMD will add HBM to a CPU, seems like a naturally evolution to me, I guess 3D cache is a step in this direction.
If it does not burn into your motherboard because you put expo on xD
Good, can't wait for it in laptops. Gives me some solace since nvidia laptop GPUs this gen are a straight scam and AMD is non-existent in laptops (besides the fact that seemingly 7000 series GPUs are bug out in VR) It makes waiting for the next generation of laptops seem worth it.
AMD could create a 10/12 core CCX, which could help a lot in some games.
The thing that I find interesting is that the 30% is plausible if they upgrade all areas of the chip. But based on current leaks from when I'm writing this. It will be closer to 20% because they are not going to get every % due to cost. So a few % they will just ignore and settle for slightly lover gains. A cost efficient scalable architecture. Zen. Has a nice ring too it eh? AMD picked the technology they did for chiplets to reduce price at the cost of performance. Intel is now going to implement their tiles to reduce and optimize power consumption and performance but at a cost. I mean it can save money too. But I think not as much as AMD. Very interesting rn. But in all honesty, I'm cheering for AMD. Lol when I built my 1st AMD PC in 2000, I had no idea we would see this much power in my lifetime! Lol
Mmmm butterdonuts.
PS Thanks Jim.
I believe Jim Keller created the Zen architecture in the beginning, and once he was done he left AMD.
There's still tons of work afterwards even if he created the CPU to make a production sku and given the time difference it does makes some sense.