Find Hidden Bugs In Deep Cycles - Advanced Debug Methodologies for Software-first System Validation

Workshop presented at DVCon U.S. 2022
Presented by Synopsys, Inc.
By Youcef Qassid, Synopsys, Inc.; Andy Jolley, Synopsys, Inc.
With the complexity of today’s software, the length of workloads to validate hardware and software has increased to 100s of billions of cycles. As teams adopt a software-first validation strategy, modern emulation and prototyping platforms are needed to enable the highest performance as well highly efficient debug technology. In this two-part tutorial (part 1: emulation, part 2: prototyping) we will use a multi-processor design case study to illustrate how emulation with ZeBu® EP1 emulation system and HAPS®-100 FPGA prototyping are ideal platforms to achieve software-first system validation. We will show how to rapidly identify design issues using emulation and run extremely long scenarios to find the deep cycle issues using prototyping.
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