You could put several vias under that transistor tab to allow the bottom copper to dissipate its heat also. I also recommend connecting the SMA shells directly to the copper pours.
I think the idea is that open copper on the bottom perimeter makes contact to the SMA thru the enclosure,... But your point is valid. It seems that it will be a tenuous connection without something explicit.
I enjoy seeing someone else execute a design in KiCAD, I used it regularly - but some times there are alternate methods that look easier. Thanks for that.
I like adding all mechanical things to schematics even if it is not on PCB. That way you can have everything in one place and never forget. Fiducials, screws, standoffs, housing, mating connectors, ... Just dedicate one page of schematic for notes and additional material.
I only learned about adding mounting holes as components in KiCAD a few months ago. Cue the statutory facepalm moment, and wishing that I'd learned about them years before. That sort of thing happens a lot when you're self-taught about stuff. You just don't know what you don't know. But hey, no day where you learn something new can ever be said to have been entirely wasted, right?
You didn't need to do two fills for the front and rear grounds. You can do both at the same time... just check both front and rear layers in the popup when you select what the fill connects to... i.e. GND.
pcb need a lot of via! Via around tab of SOT223 for heat transfer to bottom. Via each side of 50ohms trace to connect top and bottom ground. VCC trace, use 7mil wide.
Probably a bit late now but the SMA symbols and footprints are already defined. connector: conn_coaxial for the symbol and in the footprint lib Connector_Coaxial ... there are a couple lok for the edgemount footprints. When I last used them I had to tweak the pin spacing to match the ebay SMA's that I had but not a big issue
I know these videos must all be prepared in advance so any advice cannot be used to advance the work, but here is one thing I note and who knows it may appear anyway since he is not finished,.... Given the RF nature and the requirement for heat sinking I would pepper an array of vias through ground planes especially along the chip TAB and the input/output traces and bypass caps. We shall see.
The only reason for use of L1 is to prevent RF contamination of the power supply chain. L1 in conjunction with C3 forms a RF blocking filter, but lets the DC power enter U1 for the bias current. Series inductor with capacitor to ground forms a low pass filter. C4 is mostly used to filter incoming noise. All standard RF practices.
Easy EDA is a bit of a toy, KiCAD is the best you can get for free. Altium, PADs, Cadence,... are all good to mediocre. Eagle is a joke. OK: Now lets have a CAD opinion WAR!!! Monkeys on the left and Monkeys on the right - FIGHT FIGHT FIGHT.
A lot of people consider RF "black magic". I completely disagree. LOL, RF is easy, it just makes sense to me. However, I HATE laying out circuit boards. PCB design is my black magic.
That way U1 will not get its bias current and the circuit will not work. L1 in conjunction with C3 forms a RF blocking filter but will still let DC current pass through to U1. C4 is used to filter incoming noise.
You could put several vias under that transistor tab to allow the bottom copper to dissipate its heat also. I also recommend connecting the SMA shells directly to the copper pours.
it's only part 4
I think the idea is that open copper on the bottom perimeter makes contact to the SMA thru the enclosure,... But your point is valid. It seems that it will be a tenuous connection without something explicit.
@@mr1enrollment At rf, it is important to avoid large current loops.
What about propagation delay time? Should‘nt the Transistor be lined up in that regard?
@@JoseHernandez-md8tv nah, can't imagine that being a problem. what application would? anyhow we are talking pico-seconds in this case I suspect.
I enjoy seeing someone else execute a design in KiCAD, I used it regularly - but some times there are alternate methods that look easier. Thanks for that.
Who was shouting 15mm haha lovely work mate!
I like adding all mechanical things to schematics even if it is not on PCB. That way you can have everything in one place and never forget. Fiducials, screws, standoffs, housing, mating connectors, ... Just dedicate one page of schematic for notes and additional material.
I only learned about adding mounting holes as components in KiCAD a few months ago. Cue the statutory facepalm moment, and wishing that I'd learned about them years before.
That sort of thing happens a lot when you're self-taught about stuff. You just don't know what you don't know. But hey, no day where you learn something new can ever be said to have been entirely wasted, right?
You didn't need to do two fills for the front and rear grounds. You can do both at the same time... just check both front and rear layers in the popup when you select what the fill connects to... i.e. GND.
I'll check that out next time, thanks
It's only part 4 so I'm not gonna bore you with the stuff we haven't seen yet that needs doing.
pcb need a lot of via!
Via around tab of SOT223 for heat transfer to bottom.
Via each side of 50ohms trace to connect top and bottom ground.
VCC trace, use 7mil wide.
Probably a bit late now but the SMA symbols and footprints are already defined.
connector: conn_coaxial for the symbol and in the footprint lib Connector_Coaxial ... there are a couple lok for the edgemount footprints.
When I last used them I had to tweak the pin spacing to match the ebay SMA's that I had but not a big issue
Good advice as some ebay SMA's are the wrong size and it's hard to tell from the listing.
I know these videos must all be prepared in advance so any advice cannot be used to advance the work, but here is one thing I note and who knows it may appear anyway since he is not finished,....
Given the RF nature and the requirement for heat sinking I would pepper an array of vias through ground planes especially along the chip TAB and the input/output traces and bypass caps. We shall see.
The RF choke / biasing inductor L1 should be placed in between U1 and C2 so that its on the output RF trace as this will avoid any stubs.
The only reason for use of L1 is to prevent RF contamination of the power supply chain. L1 in conjunction with C3 forms a RF blocking filter, but lets the DC power enter U1 for the bias current. Series inductor with capacitor to ground forms a low pass filter. C4 is mostly used to filter incoming noise. All standard RF practices.
Could you make a video about the importance of impedance matching speakers with amplifiers or just impedance matching in general?
Vias!!! Grounds not connected. Rotate power line and uncoupling stuff perpendicular to output signal. But nice demo anyway.
It’s only part 4
@@IMSAIGuy yes sorry you're right i'm being impatient.
I really wish I knew how to do this😢.
What software are you using? - Looks better than EasyEDA that I've been using.
Kicad
That's because it is !
Easy EDA is a bit of a toy, KiCAD is the best you can get for free. Altium, PADs, Cadence,... are all good to mediocre. Eagle is a joke.
OK: Now lets have a CAD opinion WAR!!!
Monkeys on the left and Monkeys on the right - FIGHT FIGHT FIGHT.
@@mr1enrollment I bet 25 gold drakes on the KiCAD team :)
@@mr1enrollment Kicad.
A lot of people consider RF "black magic". I completely disagree. LOL, RF is easy, it just makes sense to me. However, I HATE laying out circuit boards. PCB design is my black magic.
Power wire hole diameter looks small
it's only 100mA, the hole is good for 22 gauge.
@@IMSAIGuy it looked to small for a wire, I screw that up all the time!
C3 and C4 need to be between the power in and the inductor so they can work at RF.
That way U1 will not get its bias current and the circuit will not work. L1 in conjunction with C3 forms a RF blocking filter but will still let DC current pass through to U1. C4 is used to filter incoming noise.