Computer Speeds - Computerphile
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- เผยแพร่เมื่อ 26 ก.ย. 2019
- 2GHz ≠ 2GHz - Well sometimes! Dr Steve Bagley on why the clock cycles of a CPU aren't enough to measure its speed.
/ computerphile
/ computer_phile
This video was filmed and edited by Sean Riley.
Computer Science at the University of Nottingham: bit.ly/nottscomputer
Computerphile is a sister project to Brady Haran's Numberphile. More at www.bradyharan.com
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I've learned so much about computers because of this channel. I'm very grateful.
One punch man anime robot ai
Didn't know you were into Computer Science too. I see you all over the anime community lol
The GHz is how fast the little legs move. But some of the runners can carry more, some go through short cuts... some have longer distance to cover. :P
Right, an Intel (CISC x86_64) CPU will most always have a higher clock speed than that of RISC (let's say aarch64 or armv8) because of the way the CPU is designed. Your phone has a slower clock speed, but the instructions are much more powerful than a CISC style machine. That's why the Raspberry Pi's are so great for how slow of a clock speed they have. (700mHz? For 3B)
@@zac9176 Intel's and AMDs CPU instruction set are cisc, but the actual CPU design is risc, which uses microcode to covert complex cisc instructions into simpler one and executes them instead, as for why Intel and AMD still uses x86/64 instructions set, it's for backwards compatibility
@@zac9176 " Your phone has a slower clock speed, but the instructions are much more powerful than a CISC style machine" - this should've been reversed. The whole point of RISC is having less logic in the CPU itself.
Snow Star source?
The cores is how many legs
Ghz is how fast the legs run
0:12 "Dunno... Anyway, I digest!" Had me in tears
😭😭😭
*digress
Sounds like he tried to explain the "IPO model" to me ;)
(not to be confused with GIGO)
Yes, there's more than one biology-related joke in CS
I heard "anyway, I died yet"
Must've had a big lunch.
A nice analogy I like to show is with engines/motors, the clock speed is the RPM, but the key is that the torque is also important, and that "torque" is defined by the architecture, which is where most of the improvements happen between architectures.
It starts to fail down when you want to consider instructions which take different times, I still think it's helpful as a quick analogy. :)
Each instruction is a module with its own gear, and its execution is complete once the gear does a full 360° turn.
You are talking about what is usually known as microarchitecture, i.e. the implementation of the higher level instruction set (which is also called "architecture"). Performance is also dependent on the (even more) detailed level of physical conductors, transistors, gates, latches, etc.
I could listen to Dr. Bagley talk about this for hours. It's really important and we are now at a point where we literally can't make processors better just by speaking in terms of clock cycles alone. We require entirely new ideas about processor architecture, because the x86 model is done.
At one point x86, Motorola 640x0 and PowerPC were co-existing as PC CPUs. I was rather disappointed when Apple gave up on PowerPC. I don't know how ARM or RISC-V moves into the public marketplace, will people be confused at a smartphone CPU like ARM moving into PC and other spaces?
@@squirlmy arm as pc is already happening.
@@squirlmy It was hard (hard?) for them. Jobs explained it, the lack of commitment from IBM, PowerPC gave up, not Apple.
@@kelthuzad842 30+ years late.
Why do people dislike these videos? They're so informative.
it is 3 years later and the dislike count is gone, are you happy?
"We can make the pipeline longer"
I'm getting visions of Pentium 4...
P4 warming under my desk to this day...
That wasn't the problem with NetBurst, it has 20 stages, Ryzen has 19. ERROR
@@hjembrentkent6181 Record-holder is Pentium 4 Presscott with 31 steps pipeline.
@@darkstar2111 So why does Prescott then have the same problems as NetBurst with 20 stages? Because it's unrelated. It doesn't have enough cache, ALU throughput, retirement station bandwidth, decoder bandwidth, it can't cancel u-ops after mispredictions etc
@@hjembrentkent6181 You are right, but why not use the word capacity or speed instead of bandwith? I mean, the real (or orignal) meaning of bandwith is a frequency span in analog electronics and broadcasting (say 98-108 MHz, or even 99.50 to 99.60 MHz, etc.).
So it's practically impossible to compare processors of similar speeds without benchmark tests and even those are subjective?
Aside from newer means better in just about every case, yes.
Even then, benchmarks need to be done in whatever programs you will be using as programs run differently on different cpus. So do games.
Ha! late 90's, a video card was redesigned to beat benchmarks doing cache of those simple programs, useless ability in real scenarios.
What I learned today is that Fetch -> Decode - Execute is the meaning of FeDEx
Actually that's from Federal Express, your variant would've been neater :}
The bit he left out is that CPU manufacturers have lenghtened the pipeline precisely to allow faster clock speeds.
For example an ARM7 (1995-2005) had less than 10 cycles (about 7 or 9 stages) and because each cyle does more things it's very hard to match timings and get a high clock speed.
So newer ARM Cortex (2005-today) have more than 10 cycles in their pipelines (around 15 or more). With more steps, each is smaller so that the overall clock speed can be increased. But with a longer pipeline, a full refill is a bigger waste (compared to a smaller pipeline) hence the mitigation like branch prediction and superscalar instructions (=instruction-level parallelism). It's all a trade-off that works well for some workloads and less well for others.
It's super weird how these things progress. The 5W, 1.1GHz m3-8100Y in my new laptop outperforms the 105W, 2.4 GHz Q6600 that was in the first desktop I bought in 2008.
More transistors, simple really
For the most part, yes. But having the two extra cores helps the Q6600 beat the m3-8100Y in things like multicore Cinebench (509 vs 413 in R20, 250 vs 197 in R15). And the Q6600 could overclock decently if I recall so it could further improve its lead there quite a bit. The m3-8100Y isn't 1.1GHz under load either but a rather impressive 3.4GHz single core / 2.7GHz dual core turbo with a still thrifty 8W or so power draw.
As for rkan2's comment that "More transistors, simple really", the transistor count is actually similar and probably slightly favors the Q6600 with around 582 million whereas each core in Sky/Kaby (Amber)/Whiskey lake is around 220 million.
Always look at FLOPS
The actual power draw isn't really 5W, also it has a turbo speed of "up to" 3.4 GHz.
I still run the q6600 on my desktop every day, it’s a beast! So ahead of its time. I have newer core i5’s that I feel like don’t noticeably perform much better in day to day regular tasks. Now if you’re really pushing it in gaming or vms obviously there’s a difference but intel really did a fantastic job when that first quad core was released.
My late 2018 mid/low range Octa-core 1.8 GHz Kryo 260 phone absolutely blows away my flagship Quad-core 2.7 GHz Krait 450 one from 2014. It's amazing what more cores and a few years of development can do.
Needed someone to explain this to me properly. Thank you.
All very interesting, but the real question is: what do you do with continuous form paper in 2019? :-)
I sometimes think it's the whole reason this channel was created!
Thank you for explaining that.
Guys please please please make a video about formal verification methods. Great job with this vid!
Where do I get an overview of the present/ latest cpu-architectures so I can learn more about them ? thanx
is that an Amiga in the background?
I really wish you went into more detail on Instructions per clock, Its the reason why a MOS 6502 could beat out a Intel chip of the same period when run at the same clock speed.
8080, you had to waste instructions to move data from/to (A)ccumulator every single operation. I was shocked when I learned 8086 had the same flaw. Big set but very few registers that time. Plus the crazy overlap address segments. I was sure PC wouldnt survive. Buh.
Anyone knows what the title is of the orchestra play?
There is so much things to take into consideration when it comes to comparing architectures and processors.
I do find it partly annoying when people in general look at clock speeds or pure core count, or a multiple of the two. While not taking architectural differences into account.
Though, a lot of people toss ARM under the buss due to it being RISC, and RISC surely is always worse then CISC. (Not really, depends greatly on the application, and the instruction set.)
In the end, comparing two processors can be very hard and vary extremely depending on the application. Heck, even some tasks are faster done on some cheap microcontrollers then on high end architectures...
What's the fastest moderately priced computer I can build, mostly for checking emails and surfing the internet, doing a bit of Photoshop, MS Word, and an occasional video rendering? I currently have an AMD Ryzen 3950x on an Asus Crosshair Hero VI motherboard and an M.2 ssd with Win10 and programs on it, and a secondary internal spinning hard drive for data. What bugs me are the computer glitches created when Windows does an update (I'm sure they do that so people sign up for their tech support program for $150/year), and other various problems. If I update to a newer Asus motherboard will I really see any difference? Also what do you think of Win11? Does it really make anyone's life better? Less glitches is what I need.
So it’s kind of like air lock in a fuel system ? Lol. But not. Lol. Still a great explanation. Great tutorial as usual from this amazing teacher. All these guys and girls are friggin top shelf.
Nice shirt as always
So is this what 'instructions per cycle' is all about?
Mathematical calculations the CPU actually makes, like if you have a video game, drawing the graphics of the game into the screen means the GPU is making geometric calculations to actually draw the game world, so a set of instructions can be a bunch of mathematical operations of arithmetic and geometry
Pretty much.
It's related to it. Actually executing an instruction often takes multiple clock cycles, but if you have enough execution hardware in your processor, you can build one that will average more than one instruction executed in a clock cycle.
For example, if your multiplier takes 3 clock cycles to do a multiply, then a processor with 4 multipliers, and fed a suitable stream of instructions, can do 1.33 multiply instructions per clock.
You cut out the bubble intro :(
At 2:53 was the last shot of paper pre-bubble, it shows: 21_ → 321 → 432 → 543 (simple enough...)
3:36 is the next available shot of paper, but it has something completely different now: _43→5_4→65_→765 (a bit more difficult to grasp!)
What happened in between!? The answer: Bubble. It was not explained what that is. Just used in the next scene without explanation.
Followup comment: At 4:39 there's a short (textual) bubble explanation. I understand it only because I already knew about bubbles.
Are CPU clocks made using crystals? If so, how is it possible to overclock or underclock, since crystals output constant frequencies IIRC? Also how difficult is it for the motherboard to synchronize between components since CPU, RAM, etc. are all clocked differently if I am not mistaken? An in depth video would be cool :)
They use relatively low frequency crystal as a signal source for some PLL or DDR generators. So the CPU clock frequency can be adjusted just by changing division rate without changing input oscillator frequency.
Fast clocks are generated using Phase Locked Loops (PLLs), which allow clock multiplication and can be voltage regulated. Designing features which allow for acceptable tolerances in clock multiplication is the job of an entire team at a semiconductor firm.
Thanks you guys.
I am only familiar with PLL in the Doepfer A-196 module (modular synths). I get that it tries to match the frequency of an internal oscillator with a multiple of the frequency of an input oscillator.
Is the "Loop Filter" the part of the PLL that would need to be voltage controlled to overclock / downclock?
All PLLs are feedback systems which rely on one or more voltage controllers oscillators, clock dividers (to detect phase shifts with different frequency components), comparitors to perform these comparisons, and output stages to combine the results of these comparisons into a new clock signal. The goal of a PLL design team thus involves a variety of digital logic design and analog characterization, at least for multi GHz+ clocks. The goal is a device that takes an input clock and a latched digital value representing a multiplier, and to produce the desired output clock. The way this is done is very clever: the PLL shifts the phases of a number of VCOs, and detects when the original clock is in phase with each of these. The _output of the comparisons_ is the new clock signal.
I'm confused here, my lectures teach me that clock cycles only act to synchronise circuits but play no role in computation, then here it states that they are the drivers of all computation, which is which??
Not only the pipeline.
I did some asm. Well, I admit, before long pipelines and predictive arquitecture I know nothing about.
I remember:
the 8080 where every operation had to be made inside the acummulator, then the Z80 you do ops on any register without the need to move from/to the accumulator saving many instructions.
Then some micros with the ability to switch an entire set of registers making multitask more efficient.
Then the Wang VS 40 bit long instruction, yo do the operation, increment/decrement one/both Mem Addrss Reg, check status (like zero), set a short jump address... in a sigle 40 bit microinstruction.
Then the "RISC" idea, lots more registers (and some cache) area , less microinstructions circuit on complex instructions that are used less than 1% of the time "lets the compiler deal with complex instructions"
Any of those makes the clock comparison useless.
The sound of the pen & paper goes through me, every single video!
ASMR? :)
Is it reasonable to assume that there's an inverse relationship between clock speed and number of logical gates activated per pipeline stage? My understanding has been that there's generally no magical frequency limit but that we could in theory split a pipeline into so many simple stages that it can run at like 10ghz+ while utilizing the same process to build (assuming such a clock can be accurately generated).
I mean, even a single transistor has a maximum frequency it can operate at, although those are much higher. I imagine there are tradeoffs in designing faster gates or excessively many stages in processing though.
The more pipeline stages you have the more it hurts when you have a jump or a bubble.
Heat dissipation, voltage gradients, and physical electron motion are all limits being encountered.
Heat is the main problem with running things at high frequency. Every cycle electricity is goes through the CPU gates. The more you do it there is less time for CPU to cool. Added to this is reduction in size which also speeds up heating. So it's a matter of compromise. There are other factors as well like some people mentioned.
Fact of the matter is, regarding General Purpose Use - Clock speed has had a larger factor in quantifiable CPU throughput than 'design' has - looking all he way back to 8Mhz 286's.
Little things like MMS (remember that?) added little bits - AES-NI is a massive thing - but these are additional ASIC style development really. For the most part - the software you run isn't scaled / compiled well for the architecture capabilities of the CPU you are running on.
UNLESS it's dedicated simulation.
Often true today. But there were many cases where radical design changes gave a real boost in performance, even at the same clock frequency. Such as the quick 80286 compared to the simpler 8088, or the twice as efficient 486 compared to the older 386/286. The original Pentium was also a significant enhancement over the 486, especially in execution of floating point instructions, again at the same clock speed.
And sometimes older is better, such as when comparing early Pentium 4s to Pentium 3 (P6) or Athlon, even at lower clock frequency for the two latter. There are also similar cases, such as Cyrix 6x86 or AMD K6 versus the Pentiums (except for floating point).
How long is a clock cycle is what I'm trying to understand
Can you do a video on microcode and how instructions are decoded and executed?
If I am correct he explained why x86 is faster and arm is slower the x86 can do more single instructions ( per clock) than arm does it in two ( the extended model)
Why are youtube's auto-subs not enabled for this? Is this intentionally disabled by you or did YT didn't get a chance to process it for that yet or... how does that work?
Ask TH-cam why (when auto captions are enabled, which they are here) community subtitles stop auto caps from showing up.... (Hint, you can go watch in the transcriptions.area) >Sean
Would it be possible to make a terahertz chip given a completely simplified architecture?
Lol, it is not frequency of wave.
Probably not with any known technology. There are many physical barriers to frequencies above a few GHz, from the speed of electrons and transistor switching to insulation strength and heat dissipation. (The world record overclock for some time was the AMD FX 8350 under direct liquid nitrogen cooling, that managed approximately 8.5GHz)
Even in the world of radio transmission where simple high frequency generation has been possible for ages, everything changes in the multi GHz range, many satellite dishes work in the 12GHz band but the signal must be generated at the dish and handled via wave guides, where lower frequencies could be sent along coax cable for significant distance.
and this is why concurrency is such a headache for programmers. Beware of using parallel or multiple threads that share data.
Please enable auto-generated CCs
Is this the reason that al digital devices have system clock in them? As in they want the Fetch, decode and execute to be done in a synchronous manner instead being done all at once which can be dangerous.
I digest
Does all this apply to Risk V?
Its apply to all instructions sets like power ISA, x86 ISA, ARM ISA etc...
Having a deja vu, feels like I have been doing the same stuff while hearing this vid once before... of course that can’t be the case but ya know...
I just came here to see what cpu I should buy
You guys should do a video on http3
Please explain MIPS architecture
I see someone else is also taking CprE381
lolz that printer paper is still used ?? :D
It's a cute novelty they throw in there, for Xers to reminisce on their youth.
Please, ADD auto-generated subtitles to this video.
Very good information, but I am not familiar with the gentlemen's accent, hard to decipher in places
The funny thing is the generator won't understand his accent either ^^ bless the people working on recognition software for the UK hehe
Jay, I'd say, his is one of the easier ones: it's not all that far from RP. It's no Scouse or Geordie for sure.
@@jj-or2jn Sorry, I am not from an English speaking country & this exact British accent was really hard sometimes
why subtitle isn't available for this video is beyond me!
Ask TH-cam why (when auto captions are enabled) community subtitles stop auto caps from showing up.... (Hint, you can go watch in the transcriptions.area) >Sean
It's GHz, not Ghz. 1/1 Hz = 1 s, but 1 S = 1/1 Ω.
1/1 Hz = 1 s⁻¹.
1/(1 Hz) = 1 s.
I mean, if you want to get pedantic about notation.
Preview image contains Ghz and Ghz. It should be GHz with a uppercase H.
@0m08s: Same thing, 2x should be GHz.
Comparing processors based on clockspeed is like comparing engines based on max RPM.
Not true if the two processors have similar implementations though. In these cases, the frequency is typically pretty much proportional to instruction throughput, at least for code segments that fits the caches (which is very common).
Why it was not mentioned the most popular term "IPC"?
(and pls, don't try to explain that are instructions per clock... It IS per CYCLE)
No mention of SIMD vectorization or multicore as a design strategy to mitigate the frequency limit (a 24 core CPU with AVX512 instruction set and 2 FMA units can in theory do 768 double precision floating point operations every clock cycle). No mention of the power and thermal limit that restrict clock frequencies.
Personally I dislike how this person in particular is explaining things. Seems to be focusing on various things and skipping important and interesting information all the time.
was hoping to see a video about the utterly amazing speed at which modern processors run and how many billions of things are done in a single second. i don't even think this video even defined what a gigahertz is.
"giga-": SI prefix for 10^9
Hertz: SI unit of frequency, equivalent to 1/s
Ergo, gigahertz = 1 billion per second
Will the speed of light be a limit to clock cycles? Is it already? (Say, for how far the RAM is from the CPU, copper traces, etc)
I ask this because a fraction of a thousandth of a millionth of a light-second is in the ballpark of just a few centimeters.
It is a consideration for parallel buses. This is why most high speed data cable are serial an not parallel, for a given frequency parallel is much faster but the at short wavelengths small changes in conductor length start to mis-align the signal bits. Thus serial bits allow much higher frequency in practical use, more than enough to make up for the reduction in [literal] bandwidth.
Though it is actually the speed of electrical pressure in a conductor, which is significantly lower than light in a vacuum. (and the speed of an individual electron in a wire is only about as fast as you walk)
@@mytech6779 Thanks, that cleared things up. If it was a problem for chip design it would have already been long ago then, but it's a bit mind-boggling to imagine a CPU cycle "propagating" through the chip and computer like water pressure through pipes rather than happening "simultaneously".
In future we could transfer information faster than light :-)
There is one little interesting thing - quantum entanglement. Google it.
@@igorthelight sorry to disappoint you but quantum entanglement specifically cannot be used to transfer information. Not even gravity travels faster than light, nothing does. The only real workaround is to bend spacetime like an Alcubierre Drive does.
Hi, steave...I should glad if you could manage to send one IBM M series keyboard.....pardon me but i can not cantrol my self after seeing that much stuff behind you..!..peace
Is a 2.8Ghz professor of 2019 faster than a 2.8Ghz processor of 2017? I digest.
you know, professors are not so fast
What are you digesting specifically?
MN LOL nice
A 2Ghz Pentium 4 is as fast as a 33Mhz 486...
"Netburst" was appallingly terrible.
RISC would also speed up the execution cycle.
Not today. Modern so called CISC (such as x86) uses the same type of low level execution as RISC processors. Non-RISC processors has _always_ translated "CISC" instructions into simpler microcode sequences, but today, that is done *in parallel* with the actual execution of these generated micro-instructions. CPU like x86 are therefore as fast as RISC (or faster). The downside is that this extra logic draws extra current.
"I digest" 0:13
So is there any way to know how fast a CPU really is compared to others without running tests ourselves?
I mean, that's what benchmarks are for. But generally it's going to depend on what you're doing. There's no one system that's best at everything.
Not unless you have a ton of computing power to simulate the architecture.
Can't focus on the video...am too lost in this man's shirt
what about the name
"I digest" so do i... so do i
ps ilu and i love slips like that.
But can you trigest?
Doesn't this also depend on the instruction set as well and whether it's cisc or risc?
Can you do a video on overclocking?
I feel like that's really not their style.
@@danieljensen2626 why?
@@a.yashwanth over-clocking is more of a practical stuff and it's about trial and error. This channel is more about Science (computer science mostly). Since over-clocking is simply pushing the clock cycle and testing if the CPU can handle there's nothing much to talk about. They could talk about if different models or architectures can handle more or less OC. But I don't think it would be as interesting or informative as most videos
THz computer will be achievable if you get the compute elements down to being a collection of atoms, and the bus wiring to be single carbon or metal nanotubes, a single atom in diameter.
Google "CPU small techprocess" and you will hear about quantum tunneling. Yep! That's the problem why that will not work :-)
A computerphile with mac's? That doesnt compute
🔥
Hz, not hz.
Jiggahurts?
I don't know, I digest. :)
Ok.. explain that again.. only imagine that I have no knowledge of computers.. whatsoever.
then there's in-order vs out of order execution.
@MichaelKingsfordGray "there's" is a contraction of "there is". If you're going to be pedantic, at least be right about it. Also, the possessive "theirs" doesn't have an apostrophe.
Video Description, "...measure it's speed." It's 'its', not 'it's'.
o mai ghod..
"2Ghz" triggers me in so many ways.
From the description:
"aren't enough to measure it's speed"
I think you're missing a comma and this sentence is incomplete. It sounds like you meant "aren't enough to measure, it is speed..." and then you just end the sentence there without finishing it. The more I read the description, the less sense it makes.
And this is why you should use the correct forms of its and it's. Its is possessive. It's is a contraction of it is. Of course it's still comprehensible with "it's" but it's an important distinction. Some may say I'm being pedantic, but if we're not careful about our grammar, it can cause a lot of miscommunication and potential problems. Just look at all of the mess neglecting the Oxford Comma causes.
Diet Coke? You need to give Pepsi Max a try.
"will we ever get terahertz processors" I would guess yes. as moores law breaks down, eventually we're going to hit a limit on how small you can physically make transistors (right now we're already making them something like 40 atoms across, and you cannot realistically go smaller than an atom, right?) at that point to increase computing power we'll have to either make them larger, which might happen, or it's back to the clock speed wars. (I suppose you could also try and push for higher IPC, but that will only get you so far)
It doesn't matter, when the Gallium Arsenide chips instead of silicon everything will be much more faster...
I was promised... last century...
Mmm...
Shouldnt be ready already...? Helloooo???
The basic principles still matter
GIMPS - Great Internet Mersenne Prime Search давай найди все тесты 52 чисел быстрее 8 лет
What does the fox say 🤣
He really does digest
Bill gates looks young in this video
Marry me Steve
Is it just me or is the video extremely quiet
At 00:08 I see Ghz
That must be GHz
A common but annoying mistake.
who cares. normally It would be necessary unless your saying there is another meaning for Ghz
@@brod515 I care! It is with a capital H to honor Mr. Hertz. Spelling errors in SI units look worse than most common spelling mistakes and can cause big problems.
1:07 "hmhm, has only got one ..."
🥴
😰😰😰
Computerphile is so weird. Sometimes it goes into computer science like lambda calculus or programming concepts. Sometimes it's great history. And sometimes it's this... Incredibly basic, consumer information
Hahahaha, if you think this is common knowledge then boy, you are wrong :D. Almost everyone use electronics now but trust me - most of the users have no idea what is happening "under the hood" because you simply don't need to know it to use it. Same with cars - how many drivers know exactly how gearbox works?
@@GrimmerPl Gearbox! What are you a NASA engineer?
How many drivers know how to check the oil or use a tire wrench? Surprisingly few is the sad answer.
This is especially relevant with amd's 64 core 128 thread 7742 server cpu.
2 adverts, really?
This is how you make money don't like it don't watch
What adverts?
- An "Adblock Plus" user
Why does everybody seem to forget about ipc when it comes to speed? While most modern CPUs have ~5ipc, Mill computing will have a CPU with 33 ipc. That's insane!
Ah, what am I thinking? Normies care about the app experience, not the specs LOL
I think you don't know what your doing ,now i know less.
He said in 6 minutes what could've been said in 3 sentences.
Please write down those 3 sentences then
Second
"I digest" a nice Freudian slip ;-)
install Emacs
VIM Gang Rise Up
@@beron_the_colossus vim for life!
Install Gentoo
notepad
VS CODE FOR LIFE
Computers DO NOT need to keep getting faster, "PROGRAMMERS" (drag'n'drop merchants these days!) *NEED* to stop being so SLOPPY AND LAZY.
Computers must get faster, I don't see why they should stagnate in speed. Currently computer speed is increasing more by increasing the core count than clock frequency. Programmers should learn to code for multiple cores as multi-core systems become more common. Your assessment is incredibly oversimplified. Programmers are not lazy.
unlokia NEEDs to buy a game for > 300 dollars on a regularly basis. Then Programmers can be paid better and companies will be able to put more development time into programming the game.
unlokia will like this conclusion, because he doesn't like when programmers are sloppy.
I disagree. First of all everybody would benefit from faster computers. Second in software ENGINEERING time spent developing something also add to the product final cost.
So why would programmers use a faster and lower level language, that takes like 3 or 4 times longer to code than a JS or python that can do the same?
If you want quality software then you have to pay for it. That's why there are companies that charge 20k for a webapp and other that charge 100k