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Yogeshwaran K
เข้าร่วมเมื่อ 21 มิ.ย. 2011
How to use ModelSim for Verilog code Simulation in Tamil
How to use ModelSim for Verilog code Simulation in Tamil.
ModelSim is a Simulation of Hardware Description Languages (HDL) such as VHDL, Verilog, System C and System Verilog.
ModelSim is a Simulation of Hardware Description Languages (HDL) such as VHDL, Verilog, System C and System Verilog.
มุมมอง: 1 192
วีดีโอ
Sir but u have not written testbench code?
Useful nd informative
Good information sir its is very useful for us
Easy to understand
Fantastic
Nice...❤
Very informative...
Useful
Easy to understand this video
Very easy to understand
We Need tiz typ of video Sir!! ❤
This is the best info
Very usefull
Easy to understand
Need more videos like this
Very useful sir
Very useful 👍
Good teaching! EC way...
Easy to understand
Thank you sir 😊
Use full this video and good
👌
Easy to learn
Useful
Easy to understand
very helpful and easy to understand 👍👍👍🎉
Excellent teaching Easy to understand
Very useful to understand
Easy to learn
Easy to understand sir
Very useful
Nice video easy to understand and very knowledgeable
Easy to understand
Easy to understand
Very clear and easy
Easy to learn
Very easy to understand
Very useful
very clear explanation.thankyou for posting modelsim video.
Good video Easy to understand
Video is very useful sir
Sound echo is annoying and making it difficult to understand
Hi sir, Can you please send ppt.
detailed placement is detaaail placement!! lol
next videos yapo sir
sir nice
nice presentation sir....
Dr.P.POONGODI
Good Useful presentation
good video