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can anyone say is the op-amp lectures are completely finished by sir?

this is so so so underrated actually! Amazing explanation at the end

at around 7:40 , why is intrinsic gain gm1ro1 and not gm2ro1? Since in source follower, its 1/gm1 (w.r.t the input mos), here too, should it be 1/gm1 (input mos) * 1/gm2*ro2 (intrinsic gain)

please post the second part

Please correct me if I am wrong @ 10:00 .the equation sum should be equal to Io & not zero??

For cap load and consider lamda, does cascoded FVF improve linearity compared to simple SF?

at 02:36 please provide the video link sir...

I'm confused w.r.t freq domain blowup: last video tells blowing up means amplitude blowing to infinity, in this video it means having sinusoid at that freq

Thanks Chembiyan sir, for clearly explainging the difference between all three, many of the undergraduate planning to do higher studies in India doesn't know this, really thanks for this, One request, I'm a 3rd gen IIT student, and planning to do the masters but I'm very much confused so can you please make a video on explaining the difference between doing masters from India and masters from abroad from a good university. I have been flowing you and your content on youtube and Linkedin for very long, they are really valuable and good.

I have a question. Why are we changing Vi for the source follower circuit? And why are we even bothering about that… source follower in ldo loop hence Vi will only change if input reference will change. Isnt input is fixed in ldo?

hello sir , Till video 10 , I understood everything ,This video i felt 0 again , what to do?

Why is the impedance of inductor taken to be 1/SL but for the capacitor not SC?

Very great video ❤

0:36 Shouldn't the phase start from 0 and reach -180? Sir drew Phase response similar to a LHP zero...

Why is the pole at 20:12 coming to be -1/3RC using the shortcircuiting method?

What is alpha

Why does the smaller impedance dominate in 29:30 in the bode plot?

Hi sir, do you take mock interviews for analog profile ?

wooow

The legend 🎉

😍😍😍🤩🤩🤩🤩

Thanks

In case the input is vi and -vi, the output voltage will be 2vi*1/2 = vi only, not 2vi...

Where can i find the theory of resistance in parallel at 16:10

15:10

Sir, if the drain is open, where does the current go... how to visualize it.

Thank you so much for your effort and commitment to our learning.

Great Explanation with a perfectly curated flow.Thanks a Lot !!!

In the last problem discussed in this lecture, is the output is (+ / -)Vsat or is it at 0V ?

nice video sir ji

too much of maths and preparing for placement jaldi dekhe ke khatam karo

the video is too good but for the purpose of placement just take basics and move on they won't ask such deep questions. 😅

Great video

why did I find this video so late!!!!

Thank u sir

Hi... @10:30 ... shouldn't input resistance looking onto "left transitor" ="1/gm" be also considered.?

In the second example problem in this lecture with frequency wx, sir says the output has 2 different frequencies. But from concepts of sinusoidal steady state analysis, if we feed a sinusoidal input to a linear circuit, won't the response also be a sinusoid of the same frequency with the changes occurring only in magnitude and phase? So how can we have two different frequencies in the output voltage signal ?

In VIDEO u said low slop has high chances of false triggering , but u are choosing non zero trigger point how it will reduce false triggering ?

waiting for part 2 !

What a explanation ❤

Thanks for the insights mate.

Great intro for op-amps❤

sir you had vast knowledge and can you start a document how to start what nptel lecture are necessary that should be completed in order to be a commendable designer

Dear chembian T, thank you for your videos!!! Could you please explain how to design a SSF for a given bandwidth. Or refer an article or textbook? Thanks again

25:13

Awesome lecture sir

21:55

How can we make duty cycle balanced in this circuit across corners

very informative thanks

this is so awesome . i never used negative feedback in correspondance to finding DC gain! The fact that u use the feedback loop gain to gain insights on existence of negative feedback and thus virtual ground is so cool. Also the intuitive approach is nice for time efficiency . thanks a lot